Tom Rini | 53633a8 | 2024-02-29 12:33:36 -0500 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0-or-later |
| 2 | /* |
| 3 | * at91-cosino.dtsi - Device Tree file for Cosino core module |
| 4 | * |
| 5 | * Copyright (C) 2013 - Rodolfo Giometti <giometti@linux.it> |
| 6 | * HCE Engineering |
| 7 | * |
| 8 | * Derived from at91sam9x5ek.dtsi by: |
| 9 | * Copyright (C) 2012 Atmel, |
| 10 | * 2012 Nicolas Ferre <nicolas.ferre@atmel.com> |
| 11 | */ |
| 12 | |
| 13 | #include "at91sam9g35.dtsi" |
| 14 | |
| 15 | / { |
| 16 | model = "HCE Cosino core module"; |
| 17 | compatible = "hce,cosino", "atmel,at91sam9x5", "atmel,at91sam9"; |
| 18 | |
| 19 | chosen { |
| 20 | bootargs = "console=ttyS0,115200 root=/dev/mmcblk0p2 rw rootfstype=ext3 rootwait"; |
| 21 | }; |
| 22 | |
| 23 | memory@20000000 { |
| 24 | reg = <0x20000000 0x8000000>; |
| 25 | }; |
| 26 | |
| 27 | clocks { |
| 28 | slow_xtal { |
| 29 | clock-frequency = <32768>; |
| 30 | }; |
| 31 | |
| 32 | main_xtal { |
| 33 | clock-frequency = <12000000>; |
| 34 | }; |
| 35 | }; |
| 36 | }; |
| 37 | |
| 38 | &adc0 { |
| 39 | atmel,adc-ts-wires = <4>; |
| 40 | atmel,adc-ts-pressure-threshold = <10000>; |
| 41 | status = "okay"; |
| 42 | }; |
| 43 | |
| 44 | &dbgu { |
| 45 | status = "okay"; |
| 46 | }; |
| 47 | |
| 48 | &ebi { |
| 49 | pinctrl-0 = <&pinctrl_ebi_addr_nand |
| 50 | &pinctrl_ebi_data_0_7>; |
| 51 | pinctrl-names = "default"; |
| 52 | status = "okay"; |
| 53 | |
| 54 | nand-controller { |
| 55 | pinctrl-0 = <&pinctrl_nand_oe_we |
| 56 | &pinctrl_nand_cs |
| 57 | &pinctrl_nand_rb>; |
| 58 | pinctrl-names = "default"; |
| 59 | status = "okay"; |
| 60 | |
| 61 | nand@3 { |
| 62 | reg = <0x3 0x0 0x800000>; |
| 63 | rb-gpios = <&pioD 5 GPIO_ACTIVE_HIGH>; |
| 64 | cs-gpios = <&pioD 4 GPIO_ACTIVE_HIGH>; |
| 65 | nand-bus-width = <8>; |
| 66 | nand-ecc-mode = "hw"; |
| 67 | nand-ecc-strength = <4>; |
| 68 | nand-ecc-step-size = <512>; |
| 69 | nand-on-flash-bbt; |
| 70 | label = "atmel_nand"; |
| 71 | |
| 72 | partitions { |
| 73 | compatible = "fixed-partitions"; |
| 74 | #address-cells = <1>; |
| 75 | #size-cells = <1>; |
| 76 | |
| 77 | at91bootstrap@0 { |
| 78 | label = "at91bootstrap"; |
| 79 | reg = <0x0 0x40000>; |
| 80 | }; |
| 81 | |
| 82 | uboot@40000 { |
| 83 | label = "u-boot"; |
| 84 | reg = <0x40000 0x80000>; |
| 85 | }; |
| 86 | |
| 87 | ubootenv@c0000 { |
| 88 | label = "U-Boot Env"; |
| 89 | reg = <0xc0000 0x140000>; |
| 90 | }; |
| 91 | |
| 92 | kernel@200000 { |
| 93 | label = "kernel"; |
| 94 | reg = <0x200000 0x600000>; |
| 95 | }; |
| 96 | |
| 97 | rootfs@800000 { |
| 98 | label = "rootfs"; |
| 99 | reg = <0x800000 0x0f800000>; |
| 100 | }; |
| 101 | }; |
| 102 | }; |
| 103 | }; |
| 104 | }; |
| 105 | |
| 106 | &i2c0 { |
| 107 | status = "okay"; |
| 108 | }; |
| 109 | |
| 110 | &mmc0 { |
| 111 | pinctrl-0 = < |
| 112 | &pinctrl_board_mmc0 |
| 113 | &pinctrl_mmc0_slot0_clk_cmd_dat0 |
| 114 | &pinctrl_mmc0_slot0_dat1_3>; |
| 115 | pinctrl-names = "default"; |
| 116 | status = "okay"; |
| 117 | |
| 118 | slot@0 { |
| 119 | reg = <0>; |
| 120 | bus-width = <4>; |
| 121 | cd-gpios = <&pioD 15 GPIO_ACTIVE_HIGH>; |
| 122 | }; |
| 123 | }; |
| 124 | |
| 125 | &pinctrl { |
| 126 | mmc0 { |
| 127 | pinctrl_board_mmc0: mmc0-board { |
| 128 | atmel,pins = |
| 129 | <AT91_PIOD 15 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP_DEGLITCH>; /* PD15 gpio CD pin pull up and deglitch */ |
| 130 | }; |
| 131 | }; |
| 132 | }; |
| 133 | |
| 134 | &tcb0 { |
| 135 | timer@0 { |
| 136 | compatible = "atmel,tcb-timer"; |
| 137 | reg = <0>; |
| 138 | }; |
| 139 | |
| 140 | timer@1 { |
| 141 | compatible = "atmel,tcb-timer"; |
| 142 | reg = <1>; |
| 143 | }; |
| 144 | }; |
| 145 | |
| 146 | &usart0 { |
| 147 | status = "okay"; |
| 148 | }; |
| 149 | |
| 150 | &watchdog { |
| 151 | status = "okay"; |
| 152 | }; |