Tom Rini | 53633a8 | 2024-02-29 12:33:36 -0500 | [diff] [blame] | 1 | // SPDX-License-Identifier: ISC |
| 2 | /* |
| 3 | * Device Tree file for Intel XScale Network Processors |
| 4 | * in the IXP45x and IXP46x series. This series has 64 interrupts and adds a |
| 5 | * few more peripherals over the 42x and 43x series so this extends the |
| 6 | * basic IXP4xx DTSI. |
| 7 | */ |
| 8 | #include "intel-ixp4xx.dtsi" |
| 9 | |
| 10 | / { |
| 11 | soc { |
| 12 | bus@c4000000 { |
| 13 | compatible = "intel,ixp46x-expansion-bus-controller", "syscon"; |
| 14 | /* Uses at least up to 0x124 */ |
| 15 | reg = <0xc4000000 0x1000>; |
| 16 | }; |
| 17 | |
| 18 | rng@70002100 { |
| 19 | compatible = "intel,ixp46x-rng"; |
| 20 | reg = <0x70002100 4>; |
| 21 | }; |
| 22 | |
| 23 | interrupt-controller@c8003000 { |
| 24 | compatible = "intel,ixp43x-interrupt"; |
| 25 | }; |
| 26 | |
| 27 | /* |
| 28 | * This is the USB Device Mode (UDC) controller, which is used |
| 29 | * to present the IXP4xx as a device on a USB bus. |
| 30 | */ |
| 31 | usb@c800b000 { |
| 32 | compatible = "intel,ixp4xx-udc"; |
| 33 | reg = <0xc800b000 0x1000>; |
| 34 | interrupts = <12 IRQ_TYPE_LEVEL_HIGH>; |
| 35 | status = "disabled"; |
| 36 | }; |
| 37 | |
| 38 | i2c@c8011000 { |
| 39 | compatible = "intel,ixp4xx-i2c"; |
| 40 | reg = <0xc8011000 0x18>; |
| 41 | interrupts = <33 IRQ_TYPE_LEVEL_HIGH>; |
| 42 | status = "disabled"; |
| 43 | }; |
| 44 | |
| 45 | /* This is known as EthB1 */ |
| 46 | ethernet@c800d000 { |
| 47 | compatible = "intel,ixp4xx-ethernet"; |
| 48 | reg = <0xc800d000 0x1000>; |
| 49 | status = "disabled"; |
| 50 | intel,npe = <1>; |
| 51 | /* Dummy values that depend on firmware */ |
| 52 | queue-rx = <&qmgr 0>; |
| 53 | queue-txready = <&qmgr 0>; |
| 54 | }; |
| 55 | |
| 56 | /* This is known as EthB2 */ |
| 57 | ethernet@c800e000 { |
| 58 | compatible = "intel,ixp4xx-ethernet"; |
| 59 | reg = <0xc800e000 0x1000>; |
| 60 | status = "disabled"; |
| 61 | intel,npe = <2>; |
| 62 | /* Dummy values that depend on firmware */ |
| 63 | queue-rx = <&qmgr 0>; |
| 64 | queue-txready = <&qmgr 0>; |
| 65 | }; |
| 66 | |
| 67 | /* This is known as EthB3 */ |
| 68 | ethernet@c800f000 { |
| 69 | compatible = "intel,ixp4xx-ethernet"; |
| 70 | reg = <0xc800f000 0x1000>; |
| 71 | status = "disabled"; |
| 72 | intel,npe = <3>; |
| 73 | /* Dummy values that depend on firmware */ |
| 74 | queue-rx = <&qmgr 0>; |
| 75 | queue-txready = <&qmgr 0>; |
| 76 | }; |
| 77 | |
| 78 | ptp-timer@c8010000 { |
| 79 | compatible = "intel,ixp46x-ptp-timer"; |
| 80 | reg = <0xc8010000 0x1000>; |
| 81 | interrupt-parent = <&gpio0>; |
| 82 | interrupts = <8 IRQ_TYPE_EDGE_FALLING>, <7 IRQ_TYPE_EDGE_FALLING>; |
| 83 | interrupt-names = "master", "slave"; |
| 84 | }; |
| 85 | }; |
| 86 | }; |