| Tom Rini | 53633a8 | 2024-02-29 12:33:36 -0500 | [diff] [blame] | 1 | // SPDX-License-Identifier: ISC |
| 2 | /* |
| 3 | * Device Tree file for Netgear WG302v2 based on IXP422BB |
| 4 | * Derived from boardfiles written by Imre Kaloz |
| 5 | */ |
| 6 | |
| 7 | /dts-v1/; |
| 8 | |
| 9 | #include "intel-ixp42x.dtsi" |
| 10 | #include <dt-bindings/input/input.h> |
| 11 | |
| 12 | / { |
| 13 | model = "Netgear WG302 v1"; |
| 14 | compatible = "netgear,wg302v1", "intel,ixp42x"; |
| 15 | #address-cells = <1>; |
| 16 | #size-cells = <1>; |
| 17 | |
| 18 | memory@0 { |
| 19 | /* 32 MB SDRAM according to boot arguments */ |
| 20 | device_type = "memory"; |
| 21 | reg = <0x00000000 0x02000000>; |
| 22 | }; |
| 23 | |
| 24 | chosen { |
| 25 | /* The RedBoot comes up in 9600 baud so let's keep this */ |
| 26 | bootargs = "console=ttyS0,9600n8"; |
| 27 | stdout-path = "uart1:9600n8"; |
| 28 | }; |
| 29 | |
| 30 | aliases { |
| 31 | /* These are switched around */ |
| 32 | serial0 = &uart1; |
| 33 | }; |
| 34 | |
| 35 | soc { |
| 36 | bus@c4000000 { |
| 37 | flash@0,0 { |
| 38 | compatible = "intel,ixp4xx-flash", "cfi-flash"; |
| 39 | bank-width = <2>; |
| 40 | /* |
| 41 | * 8 MB of Flash in 64 0x20000 sized blocks |
| 42 | * mapped in at CS0. |
| 43 | */ |
| 44 | reg = <0 0x00000000 0x800000>; |
| 45 | |
| 46 | /* Configure expansion bus to allow writes */ |
| 47 | intel,ixp4xx-eb-write-enable = <1>; |
| 48 | |
| 49 | partitions { |
| 50 | compatible = "redboot-fis"; |
| 51 | fis-index-block = <0x3f>; |
| 52 | }; |
| 53 | }; |
| 54 | }; |
| 55 | |
| 56 | pci@c0000000 { |
| 57 | status = "okay"; |
| 58 | |
| 59 | /* |
| 60 | * Taken from WG302 v2 PCI boardfile (wg302v2-pci.c) |
| 61 | * We have slots (IDSEL) 1 and 2 with one assigned IRQ |
| 62 | * each handling all IRQs. |
| 63 | */ |
| 64 | #interrupt-cells = <1>; |
| 65 | interrupt-map-mask = <0xf800 0 0 7>; |
| 66 | interrupt-map = |
| 67 | /* IDSEL 1 */ |
| 68 | <0x0800 0 0 1 &gpio0 8 IRQ_TYPE_LEVEL_LOW>, /* INT A on slot 1 is irq 8 */ |
| 69 | <0x0800 0 0 2 &gpio0 8 IRQ_TYPE_LEVEL_LOW>, /* INT B on slot 1 is irq 8 */ |
| 70 | <0x0800 0 0 3 &gpio0 8 IRQ_TYPE_LEVEL_LOW>, /* INT C on slot 1 is irq 8 */ |
| 71 | <0x0800 0 0 4 &gpio0 8 IRQ_TYPE_LEVEL_LOW>, /* INT D on slot 1 is irq 8 */ |
| 72 | /* IDSEL 2 */ |
| 73 | <0x1000 0 0 1 &gpio0 9 IRQ_TYPE_LEVEL_LOW>, /* INT A on slot 2 is irq 9 */ |
| 74 | <0x1000 0 0 2 &gpio0 9 IRQ_TYPE_LEVEL_LOW>, /* INT B on slot 2 is irq 9 */ |
| 75 | <0x1000 0 0 3 &gpio0 9 IRQ_TYPE_LEVEL_LOW>, /* INT C on slot 2 is irq 9 */ |
| 76 | <0x1000 0 0 4 &gpio0 9 IRQ_TYPE_LEVEL_LOW>; /* INT D on slot 2 is irq 9 */ |
| 77 | }; |
| 78 | |
| 79 | ethernet@c8009000 { |
| 80 | status = "okay"; |
| 81 | queue-rx = <&qmgr 3>; |
| 82 | queue-txready = <&qmgr 20>; |
| 83 | phy-mode = "rgmii"; |
| 84 | phy-handle = <&phy30>; |
| 85 | |
| 86 | mdio { |
| 87 | #address-cells = <1>; |
| 88 | #size-cells = <0>; |
| 89 | |
| 90 | phy30: ethernet-phy@30 { |
| 91 | reg = <30>; |
| 92 | }; |
| 93 | }; |
| 94 | }; |
| 95 | }; |
| 96 | }; |