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git01.mediatek.com / filogic / uboot / c31f901b7c095a32d4809608d6598ecd8fee50e4 / . / dts / upstream / src / arm / aspeed / aspeed-bmc-opp-witherspoon.dts
blob: a20a532fc2805fe17726969bba611ee173866705 [file] [log] [blame]
Tom Rini53633a82024-02-29 12:33:36 -0500[diff] [blame]1// SPDX-License-Identifier: GPL-2.0+
2/dts-v1/;
3#include "aspeed-g5.dtsi"
4#include <dt-bindings/gpio/aspeed-gpio.h>
5#include <dt-bindings/leds/leds-pca955x.h>
6
7/ {
8 model = "Witherspoon BMC";
9 compatible = "ibm,witherspoon-bmc", "aspeed,ast2500";
10
11 chosen {
12 stdout-path = &uart5;
13 bootargs = "console=ttyS4,115200 earlycon";
14 };
15
16 memory@80000000 {
17 reg = <0x80000000 0x20000000>;
18 };
19
20 reserved-memory {
21 #address-cells = <1>;
22 #size-cells = <1>;
23 ranges;
24
25 flash_memory: region@98000000 {
26 no-map;
27 reg = <0x98000000 0x04000000>; /* 64M */
28 };
29
30 vga_memory: region@9f000000 {
31 no-map;
32 compatible = "shared-dma-pool";
33 reg = <0x9f000000 0x01000000>; /* 16M */
34 };
35
36 gfx_memory: framebuffer {
37 size = <0x01000000>;
38 alignment = <0x01000000>;
39 compatible = "shared-dma-pool";
40 reusable;
41 };
42
43 video_engine_memory: jpegbuffer {
44 size = <0x02000000>; /* 32MM */
45 alignment = <0x01000000>;
46 compatible = "shared-dma-pool";
47 reusable;
48 };
49 };
50
51 gpio-keys {
52 compatible = "gpio-keys";
53
54 event-air-water {
55 label = "air-water";
56 gpios = <&gpio ASPEED_GPIO(B, 5) GPIO_ACTIVE_LOW>;
57 linux,code = <ASPEED_GPIO(B, 5)>;
58 };
59
60 event-checkstop {
61 label = "checkstop";
62 gpios = <&gpio ASPEED_GPIO(J, 2) GPIO_ACTIVE_LOW>;
63 linux,code = <ASPEED_GPIO(J, 2)>;
64 };
65
66 event-ps0-presence {
67 label = "ps0-presence";
68 gpios = <&gpio ASPEED_GPIO(P, 7) GPIO_ACTIVE_LOW>;
69 linux,code = <ASPEED_GPIO(P, 7)>;
70 };
71
72 event-ps1-presence {
73 label = "ps1-presence";
74 gpios = <&gpio ASPEED_GPIO(N, 0) GPIO_ACTIVE_LOW>;
75 linux,code = <ASPEED_GPIO(N, 0)>;
76 };
77 };
78
79 iio-hwmon-battery {
80 compatible = "iio-hwmon";
81 io-channels = <&adc 12>;
82 };
83
84 gpio-keys-polled {
85 compatible = "gpio-keys-polled";
86 poll-interval = <1000>;
87
88 event-fan0-presence {
89 label = "fan0-presence";
90 gpios = <&pca0 4 GPIO_ACTIVE_LOW>;
91 linux,code = <4>;
92 };
93
94 event-fan1-presence {
95 label = "fan1-presence";
96 gpios = <&pca0 5 GPIO_ACTIVE_LOW>;
97 linux,code = <5>;
98 };
99
100 event-fan2-presence {
101 label = "fan2-presence";
102 gpios = <&pca0 6 GPIO_ACTIVE_LOW>;
103 linux,code = <6>;
104 };
105
106 event-fan3-presence {
107 label = "fan3-presence";
108 gpios = <&pca0 7 GPIO_ACTIVE_LOW>;
109 linux,code = <7>;
110 };
111 };
112
113 leds {
114 compatible = "gpio-leds";
115
116 fan0 {
117 retain-state-shutdown;
118 default-state = "keep";
119 gpios = <&pca0 0 GPIO_ACTIVE_LOW>;
120 };
121
122 fan1 {
123 retain-state-shutdown;
124 default-state = "keep";
125 gpios = <&pca0 1 GPIO_ACTIVE_LOW>;
126 };
127
128 fan2 {
129 retain-state-shutdown;
130 default-state = "keep";
131 gpios = <&pca0 2 GPIO_ACTIVE_LOW>;
132 };
133
134 fan3 {
135 retain-state-shutdown;
136 default-state = "keep";
137 gpios = <&pca0 3 GPIO_ACTIVE_LOW>;
138 };
139
140 front-fault {
141 retain-state-shutdown;
142 default-state = "keep";
143 gpios = <&pca0 13 GPIO_ACTIVE_LOW>;
144 };
145
146 front-power {
147 retain-state-shutdown;
148 default-state = "keep";
149 gpios = <&pca0 14 GPIO_ACTIVE_LOW>;
150 };
151
152 front-id {
153 retain-state-shutdown;
154 default-state = "keep";
155 gpios = <&pca0 15 GPIO_ACTIVE_LOW>;
156 };
157
158 rear-fault {
159 gpios = <&gpio ASPEED_GPIO(N, 2) GPIO_ACTIVE_LOW>;
160 };
161
162 rear-id {
163 gpios = <&gpio ASPEED_GPIO(N, 4) GPIO_ACTIVE_LOW>;
164 };
165
166 rear-power {
167 gpios = <&gpio ASPEED_GPIO(N, 3) GPIO_ACTIVE_LOW>;
168 };
169
170 power-button {
171 gpios = <&gpio ASPEED_GPIO(R, 5) GPIO_ACTIVE_LOW>;
172 };
173 };
174
175 fsi: gpio-fsi {
176 compatible = "fsi-master-gpio", "fsi-master";
177 #address-cells = <2>;
178 #size-cells = <0>;
179 no-gpio-delays;
180
181 clock-gpios = <&gpio ASPEED_GPIO(AA, 0) GPIO_ACTIVE_HIGH>;
182 data-gpios = <&gpio ASPEED_GPIO(E, 0) GPIO_ACTIVE_HIGH>;
183 mux-gpios = <&gpio ASPEED_GPIO(A, 6) GPIO_ACTIVE_HIGH>;
184 enable-gpios = <&gpio ASPEED_GPIO(D, 0) GPIO_ACTIVE_HIGH>;
185 trans-gpios = <&gpio ASPEED_GPIO(R, 2) GPIO_ACTIVE_HIGH>;
186 };
187
188 iio-hwmon-dps310 {
189 compatible = "iio-hwmon";
190 io-channels = <&dps 0>;
191 };
192
193 iio-hwmon-bmp280 {
194 compatible = "iio-hwmon";
195 io-channels = <&bmp 1>;
196 };
197
198};
199
200&gpio {
201 gpio-line-names =
202 /*A0-A7*/ "","cfam-reset","","","","","fsi-mux","",
203 /*B0-B7*/ "","","","","","air-water","","",
204 /*C0-C7*/ "","","","","","","","",
205 /*D0-D7*/ "fsi-enable","","","","","","","",
206 /*E0-E7*/ "fsi-data","","","","","","","",
207 /*F0-F7*/ "","","","","","","","",
208 /*G0-G7*/ "","","","","","","","",
209 /*H0-H7*/ "","","","","","","","",
210 /*I0-I7*/ "","","","","","","","",
211 /*J0-J7*/ "","","checkstop","","","","","",
212 /*K0-K7*/ "","","","","","","","",
213 /*L0-L7*/ "","","","","","","","",
214 /*M0-M7*/ "","","","","","","","",
215 /*N0-N7*/ "presence-ps1","","led-rear-fault","led-rear-power",
216 "led-rear-id","","","",
217 /*O0-O7*/ "","","","","","","","",
218 /*P0-P7*/ "","","","","","","","presence-ps0",
219 /*Q0-Q7*/ "","","","","","","","",
220 /*R0-R7*/ "","","fsi-trans","","","power-button","","",
221 /*S0-S7*/ "","","","","","","","",
222 /*T0-T7*/ "","","","","","","","",
223 /*U0-U7*/ "","","","","","","","",
224 /*V0-V7*/ "","","","","","","","",
225 /*W0-W7*/ "","","","","","","","",
226 /*X0-X7*/ "","","","","","","","",
227 /*Y0-Y7*/ "","","","","","","","",
228 /*Z0-Z7*/ "","","","","","","","",
229 /*AA0-AA7*/ "fsi-clock","","","","","","","",
230 /*AB0-AB7*/ "","","","","","","","",
231 /*AC0-AC7*/ "","","","","","","","";
232};
233
234&fmc {
235 status = "okay";
236
237 flash@0 {
238 status = "okay";
239 label = "bmc";
240 m25p,fast-read;
241 spi-max-frequency = <50000000>;
242
243 partitions {
244 #address-cells = < 1 >;
245 #size-cells = < 1 >;
246 compatible = "fixed-partitions";
247 u-boot@0 {
248 reg = < 0 0x60000 >;
249 label = "u-boot";
250 };
251 u-boot-env@60000 {
252 reg = < 0x60000 0x20000 >;
253 label = "u-boot-env";
254 };
255 obmc-ubi@80000 {
256 reg = < 0x80000 0x1F80000 >;
257 label = "obmc-ubi";
258 };
259 };
260 };
261
262 flash@1 {
263 status = "okay";
264 label = "alt-bmc";
265 m25p,fast-read;
266 spi-max-frequency = <50000000>;
267
268 partitions {
269 #address-cells = < 1 >;
270 #size-cells = < 1 >;
271 compatible = "fixed-partitions";
272 u-boot@0 {
273 reg = < 0 0x60000 >;
274 label = "alt-u-boot";
275 };
276 u-boot-env@60000 {
277 reg = < 0x60000 0x20000 >;
278 label = "alt-u-boot-env";
279 };
280 obmc-ubi@80000 {
281 reg = < 0x80000 0x1F80000 >;
282 label = "alt-obmc-ubi";
283 };
284 };
285 };
286};
287
288&spi1 {
289 status = "okay";
290 pinctrl-names = "default";
291 pinctrl-0 = <&pinctrl_spi1_default>;
292
293 flash@0 {
294 status = "okay";
295 label = "pnor";
296 m25p,fast-read;
297 spi-max-frequency = <100000000>;
298 };
299};
300
301&uart1 {
302 /* Rear RS-232 connector */
303 status = "okay";
304 pinctrl-names = "default";
305 pinctrl-0 = <&pinctrl_txd1_default
306 &pinctrl_rxd1_default
307 &pinctrl_nrts1_default
308 &pinctrl_ndtr1_default
309 &pinctrl_ndsr1_default
310 &pinctrl_ncts1_default
311 &pinctrl_ndcd1_default
312 &pinctrl_nri1_default>;
313};
314
315&uart2 {
316 /* APSS */
317 status = "okay";
318 pinctrl-names = "default";
319 pinctrl-0 = <&pinctrl_txd2_default &pinctrl_rxd2_default>;
320};
321
322&uart5 {
323 status = "okay";
324};
325
326&lpc_ctrl {
327 status = "okay";
328 memory-region = <&flash_memory>;
329 flash = <&spi1>;
330};
331
332&mac0 {
333 status = "okay";
334 pinctrl-names = "default";
335 pinctrl-0 = <&pinctrl_rmii1_default>;
336 clocks = <&syscon ASPEED_CLK_GATE_MAC1CLK>,
337 <&syscon ASPEED_CLK_MAC1RCLK>;
338 clock-names = "MACCLK", "RCLK";
339 use-ncsi;
340};
341
342&i2c2 {
343 status = "okay";
344
345 /* MUX ->
346 * Samtec 1
347 * Samtec 2
348 */
349};
350
351&i2c3 {
352 status = "okay";
353
354 bmp: bmp280@77 {
355 compatible = "bosch,bmp280";
356 reg = <0x77>;
357 #io-channel-cells = <1>;
358 };
359
360 max31785@52 {
361 compatible = "maxim,max31785a";
362 reg = <0x52>;
363 #address-cells = <1>;
364 #size-cells = <0>;
365 };
366
367 dps: dps310@76 {
368 compatible = "infineon,dps310";
369 reg = <0x76>;
370 #io-channel-cells = <0>;
371 };
372
373 pca0: pca9552@60 {
374 compatible = "nxp,pca9552";
375 reg = <0x60>;
376 #address-cells = <1>;
377 #size-cells = <0>;
378
379 gpio-controller;
380 #gpio-cells = <2>;
381
382 gpio@0 {
383 reg = <0>;
384 type = <PCA955X_TYPE_GPIO>;
385 };
386
387 gpio@1 {
388 reg = <1>;
389 type = <PCA955X_TYPE_GPIO>;
390 };
391
392 gpio@2 {
393 reg = <2>;
394 type = <PCA955X_TYPE_GPIO>;
395 };
396
397 gpio@3 {
398 reg = <3>;
399 type = <PCA955X_TYPE_GPIO>;
400 };
401
402 gpio@4 {
403 reg = <4>;
404 type = <PCA955X_TYPE_GPIO>;
405 };
406
407 gpio@5 {
408 reg = <5>;
409 type = <PCA955X_TYPE_GPIO>;
410 };
411
412 gpio@6 {
413 reg = <6>;
414 type = <PCA955X_TYPE_GPIO>;
415 };
416
417 gpio@7 {
418 reg = <7>;
419 type = <PCA955X_TYPE_GPIO>;
420 };
421
422 gpio@8 {
423 reg = <8>;
424 type = <PCA955X_TYPE_GPIO>;
425 };
426
427 gpio@9 {
428 reg = <9>;
429 type = <PCA955X_TYPE_GPIO>;
430 };
431
432 gpio@10 {
433 reg = <10>;
434 type = <PCA955X_TYPE_GPIO>;
435 };
436
437 gpio@11 {
438 reg = <11>;
439 type = <PCA955X_TYPE_GPIO>;
440 };
441
442 gpio@12 {
443 reg = <12>;
444 type = <PCA955X_TYPE_GPIO>;
445 };
446
447 gpio@13 {
448 reg = <13>;
449 type = <PCA955X_TYPE_GPIO>;
450 };
451
452 gpio@14 {
453 reg = <14>;
454 type = <PCA955X_TYPE_GPIO>;
455 };
456
457 gpio@15 {
458 reg = <15>;
459 type = <PCA955X_TYPE_GPIO>;
460 };
461 };
462
463 power-supply@68 {
464 compatible = "ibm,cffps1";
465 reg = <0x68>;
466 };
467
468 power-supply@69 {
469 compatible = "ibm,cffps1";
470 reg = <0x69>;
471 };
472};
473
474&i2c4 {
475 status = "okay";
476
477 tmp423a@4c {
478 compatible = "ti,tmp423";
479 reg = <0x4c>;
480 };
481
482 ir35221@70 {
483 compatible = "infineon,ir35221";
484 reg = <0x70>;
485 };
486
487 ir35221@71 {
488 compatible = "infineon,ir35221";
489 reg = <0x71>;
490 };
491};
492
493
494&i2c5 {
495 status = "okay";
496
497 tmp423a@4c {
498 compatible = "ti,tmp423";
499 reg = <0x4c>;
500 };
501
502 ir35221@70 {
503 compatible = "infineon,ir35221";
504 reg = <0x70>;
505 };
506
507 ir35221@71 {
508 compatible = "infineon,ir35221";
509 reg = <0x71>;
510 };
511};
512
513&i2c9 {
514 status = "okay";
515
516 tmp275@4a {
517 compatible = "ti,tmp275";
518 reg = <0x4a>;
519 };
520};
521
522&i2c10 {
523 /* MUX
524 * -> PCIe Slot 3
525 * -> PCIe Slot 4
526 */
527 status = "okay";
528};
529
530&i2c11 {
531 status = "okay";
532
533 pca9552: pca9552@60 {
534 compatible = "nxp,pca9552";
535 reg = <0x60>;
536 #address-cells = <1>;
537 #size-cells = <0>;
538 gpio-controller;
539 #gpio-cells = <2>;
540
541 gpio-line-names = "PS_SMBUS_RESET_N", "APSS_RESET_N",
542 "GPU0_TH_OVERT_N_BUFF", "GPU1_TH_OVERT_N_BUFF",
543 "GPU2_TH_OVERT_N_BUFF", "GPU3_TH_OVERT_N_BUFF",
544 "GPU4_TH_OVERT_N_BUFF", "GPU5_TH_OVERT_N_BUFF",
545 "GPU0_PWR_GOOD_BUFF", "GPU1_PWR_GOOD_BUFF",
546 "GPU2_PWR_GOOD_BUFF", "GPU3_PWR_GOOD_BUFF",
547 "GPU4_PWR_GOOD_BUFF", "GPU5_PWR_GOOD_BUFF",
548 "12V_BREAKER_FLT_N", "THROTTLE_UNLATCHED_N";
549
550 gpio@0 {
551 reg = <0>;
552 type = <PCA955X_TYPE_GPIO>;
553 };
554
555 gpio@1 {
556 reg = <1>;
557 type = <PCA955X_TYPE_GPIO>;
558 };
559
560 gpio@2 {
561 reg = <2>;
562 type = <PCA955X_TYPE_GPIO>;
563 };
564
565 gpio@3 {
566 reg = <3>;
567 type = <PCA955X_TYPE_GPIO>;
568 };
569
570 gpio@4 {
571 reg = <4>;
572 type = <PCA955X_TYPE_GPIO>;
573 };
574
575 gpio@5 {
576 reg = <5>;
577 type = <PCA955X_TYPE_GPIO>;
578 };
579
580 gpio@6 {
581 reg = <6>;
582 type = <PCA955X_TYPE_GPIO>;
583 };
584
585 gpio@7 {
586 reg = <7>;
587 type = <PCA955X_TYPE_GPIO>;
588 };
589
590 gpio@8 {
591 reg = <8>;
592 type = <PCA955X_TYPE_GPIO>;
593 };
594
595 gpio@9 {
596 reg = <9>;
597 type = <PCA955X_TYPE_GPIO>;
598 };
599
600 gpio@10 {
601 reg = <10>;
602 type = <PCA955X_TYPE_GPIO>;
603 };
604
605 gpio@11 {
606 reg = <11>;
607 type = <PCA955X_TYPE_GPIO>;
608 };
609
610 gpio@12 {
611 reg = <12>;
612 type = <PCA955X_TYPE_GPIO>;
613 };
614
615 gpio@13 {
616 reg = <13>;
617 type = <PCA955X_TYPE_GPIO>;
618 };
619
620 gpio@14 {
621 reg = <14>;
622 type = <PCA955X_TYPE_GPIO>;
623 };
624
625 gpio@15 {
626 reg = <15>;
627 type = <PCA955X_TYPE_GPIO>;
628 };
629 };
630
631 rtc@32 {
632 compatible = "epson,rx8900";
633 reg = <0x32>;
634 };
635
636 eeprom@51 {
637 compatible = "atmel,24c64";
638 reg = <0x51>;
639 };
640
641 ucd90160@64 {
642 compatible = "ti,ucd90160";
643 reg = <0x64>;
644 };
645};
646
647&i2c12 {
648 status = "okay";
649};
650
651&i2c13 {
652 status = "okay";
653};
654
655&vuart {
656 status = "okay";
657};
658
659&gfx {
660 status = "okay";
661 memory-region = <&gfx_memory>;
662};
663
664&pinctrl {
665 aspeed,external-nodes = <&gfx &lhc>;
666};
667
668&wdt1 {
669 aspeed,reset-type = "none";
670 aspeed,external-signal;
671 aspeed,ext-push-pull;
672 aspeed,ext-active-high;
673
674 pinctrl-names = "default";
675 pinctrl-0 = <&pinctrl_wdtrst1_default>;
676};
677
678&wdt2 {
679 aspeed,alt-boot;
680};
681
682&ibt {
683 status = "okay";
684};
685
686&adc {
687 status = "okay";
688};
689
690&vhub {
691 status = "okay";
692};
693
694&video {
695 status = "okay";
696 memory-region = <&video_engine_memory>;
697};
698
699&xdma {
700 status = "okay";
701 memory-region = <&vga_memory>;
702};
703
704#include "ibm-power9-dual.dtsi"