| Tom Rini | 53633a8 | 2024-02-29 12:33:36 -0500 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */ |
| 2 | /* |
| 3 | * cs35l45.h -- CS35L45 ALSA SoC audio driver DT bindings header |
| 4 | * |
| 5 | * Copyright 2022 Cirrus Logic, Inc. |
| 6 | */ |
| 7 | |
| 8 | #ifndef DT_CS35L45_H |
| 9 | #define DT_CS35L45_H |
| 10 | |
| 11 | /* |
| 12 | * cirrus,asp-sdout-hiz-ctrl |
| 13 | * |
| 14 | * TX_HIZ_UNUSED: TX pin high-impedance during unused slots. |
| 15 | * TX_HIZ_DISABLED: TX pin high-impedance when all channels disabled. |
| 16 | */ |
| 17 | #define CS35L45_ASP_TX_HIZ_UNUSED 0x1 |
| 18 | #define CS35L45_ASP_TX_HIZ_DISABLED 0x2 |
| 19 | |
| 20 | /* |
| 21 | * Optional GPIOX Sub-nodes: |
| 22 | * The cs35l45 node can have up to three "cirrus,gpio-ctrlX" ('X' = [1,2,3]) |
| 23 | * sub-nodes for configuring the GPIO pins. |
| 24 | * |
| 25 | * - gpio-dir : GPIO pin direction. Valid only when 'gpio-ctrl' |
| 26 | * is 1. |
| 27 | * 0 = Output |
| 28 | * 1 = Input (Default) |
| 29 | * |
| 30 | * - gpio-lvl : GPIO level. Valid only when 'gpio-ctrl' is 1 and 'gpio-dir' is 0. |
| 31 | * |
| 32 | * 0 = Low (Default) |
| 33 | * 1 = High |
| 34 | * |
| 35 | * - gpio-op-cfg : GPIO output configuration. Valid only when 'gpio-ctrl' is 1 |
| 36 | * and 'gpio-dir' is 0. |
| 37 | * |
| 38 | * 0 = CMOS (Default) |
| 39 | * 1 = Open Drain |
| 40 | * |
| 41 | * - gpio-pol : GPIO output polarity select. Valid only when 'gpio-ctrl' is 1 |
| 42 | * and 'gpio-dir' is 0. |
| 43 | * |
| 44 | * 0 = Non-inverted, Active High (Default) |
| 45 | * 1 = Inverted, Active Low |
| 46 | * |
| 47 | * - gpio-invert : Defines the polarity of the GPIO pin if configured |
| 48 | * as input. |
| 49 | * |
| 50 | * 0 = Not inverted (Default) |
| 51 | * 1 = Inverted |
| 52 | * |
| 53 | * - gpio-ctrl : Defines the function of the GPIO pin. |
| 54 | * |
| 55 | * GPIO1: |
| 56 | * 0 = High impedance input (Default) |
| 57 | * 1 = Pin acts as a GPIO, direction controlled by 'gpio-dir' |
| 58 | * 2 = Pin acts as MDSYNC, direction controlled by MDSYNC |
| 59 | * 3-7 = Reserved |
| 60 | * |
| 61 | * GPIO2: |
| 62 | * 0 = High impedance input (Default) |
| 63 | * 1 = Pin acts as a GPIO, direction controlled by 'gpio-dir' |
| 64 | * 2 = Pin acts as open drain INT |
| 65 | * 3 = Reserved |
| 66 | * 4 = Pin acts as push-pull output INT. Active low. |
| 67 | * 5 = Pin acts as push-pull output INT. Active high. |
| 68 | * 6,7 = Reserved |
| 69 | * |
| 70 | * GPIO3: |
| 71 | * 0 = High impedance input (Default) |
| 72 | * 1 = Pin acts as a GPIO, direction controlled by 'gpio-dir' |
| 73 | * 2-7 = Reserved |
| 74 | */ |
| 75 | #define CS35L45_NUM_GPIOS 0x3 |
| 76 | |
| 77 | #endif /* DT_CS35L45_H */ |