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git01.mediatek.com / filogic / uboot / c2ed2e3f81e0a3873d33eb857dc51c01a33476ca / . / dts / upstream / src / arm64 / ti / k3-am62x-sk-common.dtsi
blob: 96378b19c4197921057c3330a59a3313568ab00f [file] [log] [blame]
Tom Rini6bb92fc2024-05-20 09:54:58 -0600[diff] [blame]1// SPDX-License-Identifier: GPL-2.0-only OR MIT
Tom Rini53633a82024-02-29 12:33:36 -0500[diff] [blame]2/*
3 * Common dtsi for AM62x SK and derivatives
4 *
Tom Rini6bb92fc2024-05-20 09:54:58 -0600[diff] [blame]5 * Copyright (C) 2021-2024 Texas Instruments Incorporated - https://www.ti.com/
Tom Rini53633a82024-02-29 12:33:36 -0500[diff] [blame]6 */
7
8#include <dt-bindings/leds/common.h>
9#include <dt-bindings/gpio/gpio.h>
10#include <dt-bindings/net/ti-dp83867.h>
11#include "k3-am625.dtsi"
12
13/ {
14 aliases {
15 serial2 = &main_uart0;
16 mmc0 = &sdhci0;
17 mmc1 = &sdhci1;
18 mmc2 = &sdhci2;
19 spi0 = &ospi0;
20 ethernet0 = &cpsw_port1;
21 ethernet1 = &cpsw_port2;
22 usb0 = &usb0;
23 usb1 = &usb1;
24 };
25
26 chosen {
27 stdout-path = "serial2:115200n8";
28 };
29
30 memory@80000000 {
31 bootph-pre-ram;
32 device_type = "memory";
33 /* 2G RAM */
34 reg = <0x00000000 0x80000000 0x00000000 0x80000000>;
35 };
36
37 reserved-memory {
38 #address-cells = <2>;
39 #size-cells = <2>;
40 ranges;
41
42 ramoops@9ca00000 {
43 compatible = "ramoops";
44 reg = <0x00 0x9ca00000 0x00 0x00100000>;
45 record-size = <0x8000>;
46 console-size = <0x8000>;
47 ftrace-size = <0x00>;
48 pmsg-size = <0x8000>;
49 };
50
51 secure_tfa_ddr: tfa@9e780000 {
52 reg = <0x00 0x9e780000 0x00 0x80000>;
53 alignment = <0x1000>;
54 no-map;
55 };
56
57 secure_ddr: optee@9e800000 {
58 reg = <0x00 0x9e800000 0x00 0x01800000>; /* for OP-TEE */
59 alignment = <0x1000>;
60 no-map;
61 };
62
63 wkup_r5fss0_core0_dma_memory_region: r5f-dma-memory@9db00000 {
64 compatible = "shared-dma-pool";
65 reg = <0x00 0x9db00000 0x00 0xc00000>;
66 no-map;
67 };
68 };
69
70 leds {
71 compatible = "gpio-leds";
72 pinctrl-names = "default";
73 pinctrl-0 = <&usr_led_pins_default>;
74
75 led-0 {
76 label = "am62-sk:green:heartbeat";
77 gpios = <&main_gpio1 49 GPIO_ACTIVE_HIGH>;
78 linux,default-trigger = "heartbeat";
79 function = LED_FUNCTION_HEARTBEAT;
80 default-state = "off";
81 };
82 };
83
84 tlv320_mclk: clk-0 {
85 #clock-cells = <0>;
86 compatible = "fixed-clock";
87 clock-frequency = <12288000>;
88 };
89
90 codec_audio: sound {
91 compatible = "simple-audio-card";
92 simple-audio-card,name = "AM62x-SKEVM";
93 simple-audio-card,widgets =
94 "Headphone", "Headphone Jack",
95 "Line", "Line In",
96 "Microphone", "Microphone Jack";
97 simple-audio-card,routing =
98 "Headphone Jack", "HPLOUT",
99 "Headphone Jack", "HPROUT",
100 "LINE1L", "Line In",
101 "LINE1R", "Line In",
102 "MIC3R", "Microphone Jack",
103 "Microphone Jack", "Mic Bias";
104 simple-audio-card,format = "dsp_b";
105 simple-audio-card,bitclock-master = <&sound_master>;
106 simple-audio-card,frame-master = <&sound_master>;
107 simple-audio-card,bitclock-inversion;
108
109 simple-audio-card,cpu {
110 sound-dai = <&mcasp1>;
111 };
112
113 sound_master: simple-audio-card,codec {
114 sound-dai = <&tlv320aic3106>;
115 clocks = <&tlv320_mclk>;
116 };
117 };
118
119 hdmi0: connector-hdmi {
120 compatible = "hdmi-connector";
121 label = "hdmi";
122 type = "a";
123 port {
124 hdmi_connector_in: endpoint {
125 remote-endpoint = <&sii9022_out>;
126 };
127 };
128 };
129};
130
Chintan Vankar4c069b62024-08-26 15:55:15 +0530[diff] [blame]131&phy_gmii_sel {
132 bootph-all;
133};
134
Tom Rini53633a82024-02-29 12:33:36 -0500[diff] [blame]135&main_pmx0 {
136 /* First pad number is ALW package and second is AMC package */
137 main_uart0_pins_default: main-uart0-default-pins {
138 bootph-all;
139 pinctrl-single,pins = <
140 AM62X_IOPAD(0x1c8, PIN_INPUT, 0) /* (D14/A13) UART0_RXD */
141 AM62X_IOPAD(0x1cc, PIN_OUTPUT, 0) /* (E14/E11) UART0_TXD */
142 >;
143 };
144
145 main_uart1_pins_default: main-uart1-default-pins {
146 bootph-pre-ram;
147 pinctrl-single,pins = <
148 AM62X_IOPAD(0x194, PIN_INPUT, 2) /* (B19/B18) MCASP0_AXR3.UART1_CTSn */
149 AM62X_IOPAD(0x198, PIN_OUTPUT, 2) /* (A19/B17) MCASP0_AXR2.UART1_RTSn */
150 AM62X_IOPAD(0x1ac, PIN_INPUT, 2) /* (E19/D15) MCASP0_AFSR.UART1_RXD */
151 AM62X_IOPAD(0x1b0, PIN_OUTPUT, 2) /* (A20/D16) MCASP0_ACLKR.UART1_TXD */
152 >;
153 };
154
155 main_i2c0_pins_default: main-i2c0-default-pins {
156 pinctrl-single,pins = <
157 AM62X_IOPAD(0x1e0, PIN_INPUT_PULLUP, 0) /* (B16/E12) I2C0_SCL */
158 AM62X_IOPAD(0x1e4, PIN_INPUT_PULLUP, 0) /* (A16/D14) I2C0_SDA */
159 >;
160 };
161
162 main_i2c1_pins_default: main-i2c1-default-pins {
163 pinctrl-single,pins = <
164 AM62X_IOPAD(0x1e8, PIN_INPUT_PULLUP, 0) /* (B17/A17) I2C1_SCL */
165 AM62X_IOPAD(0x1ec, PIN_INPUT_PULLUP, 0) /* (A17/A16) I2C1_SDA */
166 >;
167 };
168
169 main_i2c2_pins_default: main-i2c2-default-pins {
170 pinctrl-single,pins = <
171 AM62X_IOPAD(0x0b0, PIN_INPUT_PULLUP, 1) /* (K22/H18) GPMC0_CSn2.I2C2_SCL */
172 AM62X_IOPAD(0x0b4, PIN_INPUT_PULLUP, 1) /* (K24/H19) GPMC0_CSn3.I2C2_SDA */
173 >;
174 };
175
176 main_mmc0_pins_default: main-mmc0-default-pins {
177 bootph-all;
178 pinctrl-single,pins = <
179 AM62X_IOPAD(0x220, PIN_INPUT, 0) /* (Y3/V3) MMC0_CMD */
180 AM62X_IOPAD(0x218, PIN_INPUT, 0) /* (AB1/Y1) MMC0_CLK */
181 AM62X_IOPAD(0x214, PIN_INPUT, 0) /* (AA2/V2) MMC0_DAT0 */
182 AM62X_IOPAD(0x210, PIN_INPUT, 0) /* (AA1/V1) MMC0_DAT1 */
183 AM62X_IOPAD(0x20c, PIN_INPUT, 0) /* (AA3/W2) MMC0_DAT2 */
184 AM62X_IOPAD(0x208, PIN_INPUT, 0) /* (Y4/W1) MMC0_DAT3 */
185 AM62X_IOPAD(0x204, PIN_INPUT, 0) /* (AB2/Y2) MMC0_DAT4 */
186 AM62X_IOPAD(0x200, PIN_INPUT, 0) /* (AC1/W3) MMC0_DAT5 */
187 AM62X_IOPAD(0x1fc, PIN_INPUT, 0) /* (AD2/W4) MMC0_DAT6 */
188 AM62X_IOPAD(0x1f8, PIN_INPUT, 0) /* (AC2/V4) MMC0_DAT7 */
189 >;
190 };
191
192 main_mmc1_pins_default: main-mmc1-default-pins {
193 bootph-all;
194 pinctrl-single,pins = <
195 AM62X_IOPAD(0x23c, PIN_INPUT, 0) /* (A21/C18) MMC1_CMD */
196 AM62X_IOPAD(0x234, PIN_INPUT, 0) /* (B22/A20) MMC1_CLK */
197 AM62X_IOPAD(0x230, PIN_INPUT, 0) /* (A22/A19) MMC1_DAT0 */
198 AM62X_IOPAD(0x22c, PIN_INPUT, 0) /* (B21/B19) MMC1_DAT1 */
199 AM62X_IOPAD(0x228, PIN_INPUT, 0) /* (C21/B20) MMC1_DAT2 */
200 AM62X_IOPAD(0x224, PIN_INPUT, 0) /* (D22/C19) MMC1_DAT3 */
201 AM62X_IOPAD(0x240, PIN_INPUT, 0) /* (D17/C15) MMC1_SDCD */
202 >;
203 };
204
205 usr_led_pins_default: usr-led-default-pins {
206 pinctrl-single,pins = <
207 AM62X_IOPAD(0x244, PIN_OUTPUT, 7) /* (C17/B15) MMC1_SDWP.GPIO1_49 */
208 >;
209 };
210
211 main_mdio1_pins_default: main-mdio1-default-pins {
212 pinctrl-single,pins = <
213 AM62X_IOPAD(0x160, PIN_OUTPUT, 0) /* (AD24/V17) MDIO0_MDC */
214 AM62X_IOPAD(0x15c, PIN_INPUT, 0) /* (AB22/U16) MDIO0_MDIO */
215 >;
216 };
217
218 main_rgmii1_pins_default: main-rgmii1-default-pins {
219 bootph-all;
220 pinctrl-single,pins = <
221 AM62X_IOPAD(0x14c, PIN_INPUT, 0) /* (AB17/W15) RGMII1_RD0 */
222 AM62X_IOPAD(0x150, PIN_INPUT, 0) /* (AC17/Y16) RGMII1_RD1 */
223 AM62X_IOPAD(0x154, PIN_INPUT, 0) /* (AB16/AA17) RGMII1_RD2 */
224 AM62X_IOPAD(0x158, PIN_INPUT, 0) /* (AA15/Y15) RGMII1_RD3 */
225 AM62X_IOPAD(0x148, PIN_INPUT, 0) /* (AD17/AA16) RGMII1_RXC */
226 AM62X_IOPAD(0x144, PIN_INPUT, 0) /* (AE17/W14) RGMII1_RX_CTL */
227 AM62X_IOPAD(0x134, PIN_OUTPUT, 0) /* (AE20/U14) RGMII1_TD0 */
228 AM62X_IOPAD(0x138, PIN_OUTPUT, 0) /* (AD20/AA19) RGMII1_TD1 */
229 AM62X_IOPAD(0x13c, PIN_OUTPUT, 0) /* (AE18/Y17) RGMII1_TD2 */
230 AM62X_IOPAD(0x140, PIN_OUTPUT, 0) /* (AD18/AA18) RGMII1_TD3 */
231 AM62X_IOPAD(0x130, PIN_OUTPUT, 0) /* (AE19/W16) RGMII1_TXC */
232 AM62X_IOPAD(0x12c, PIN_OUTPUT, 0) /* (AD19/V15) RGMII1_TX_CTL */
233 >;
234 };
235
236 main_usb1_pins_default: main-usb1-default-pins {
237 pinctrl-single,pins = <
238 AM62X_IOPAD(0x0258, PIN_OUTPUT, 0) /* (F18/E16) USB1_DRVVBUS */
239 >;
240 };
241
242 main_mcasp1_pins_default: main-mcasp1-default-pins {
243 pinctrl-single,pins = <
244 AM62X_IOPAD(0x090, PIN_INPUT, 2) /* (M24/K17) GPMC0_BE0N_CLE.MCASP1_ACLKX */
245 AM62X_IOPAD(0x098, PIN_INPUT, 2) /* (U23/P21) GPMC0_WAIT0.MCASP1_AFSX */
246 AM62X_IOPAD(0x08c, PIN_OUTPUT, 2) /* (L25/J17) GPMC0_WEN.MCASP1_AXR0 */
247 AM62X_IOPAD(0x084, PIN_INPUT, 2) /* (L23/K20) GPMC0_ADVN_ALE.MCASP1_AXR2 */
248 >;
249 };
250
251 main_dss0_pins_default: main-dss0-default-pins {
252 pinctrl-single,pins = <
253 AM62X_IOPAD(0x100, PIN_OUTPUT, 0) /* (AC25) VOUT0_VSYNC */
254 AM62X_IOPAD(0x0f8, PIN_OUTPUT, 0) /* (AB24) VOUT0_HSYNC */
255 AM62X_IOPAD(0x104, PIN_OUTPUT, 0) /* (AC24) VOUT0_PCLK */
256 AM62X_IOPAD(0x0fc, PIN_OUTPUT, 0) /* (Y20) VOUT0_DE */
257 AM62X_IOPAD(0x0b8, PIN_OUTPUT, 0) /* (U22) VOUT0_DATA0 */
258 AM62X_IOPAD(0x0bc, PIN_OUTPUT, 0) /* (V24) VOUT0_DATA1 */
259 AM62X_IOPAD(0x0c0, PIN_OUTPUT, 0) /* (W25) VOUT0_DATA2 */
260 AM62X_IOPAD(0x0c4, PIN_OUTPUT, 0) /* (W24) VOUT0_DATA3 */
261 AM62X_IOPAD(0x0c8, PIN_OUTPUT, 0) /* (Y25) VOUT0_DATA4 */
262 AM62X_IOPAD(0x0cc, PIN_OUTPUT, 0) /* (Y24) VOUT0_DATA5 */
263 AM62X_IOPAD(0x0d0, PIN_OUTPUT, 0) /* (Y23) VOUT0_DATA6 */
264 AM62X_IOPAD(0x0d4, PIN_OUTPUT, 0) /* (AA25) VOUT0_DATA7 */
265 AM62X_IOPAD(0x0d8, PIN_OUTPUT, 0) /* (V21) VOUT0_DATA8 */
266 AM62X_IOPAD(0x0dc, PIN_OUTPUT, 0) /* (W21) VOUT0_DATA9 */
267 AM62X_IOPAD(0x0e0, PIN_OUTPUT, 0) /* (V20) VOUT0_DATA10 */
268 AM62X_IOPAD(0x0e4, PIN_OUTPUT, 0) /* (AA23) VOUT0_DATA11 */
269 AM62X_IOPAD(0x0e8, PIN_OUTPUT, 0) /* (AB25) VOUT0_DATA12 */
270 AM62X_IOPAD(0x0ec, PIN_OUTPUT, 0) /* (AA24) VOUT0_DATA13 */
271 AM62X_IOPAD(0x0f0, PIN_OUTPUT, 0) /* (Y22) VOUT0_DATA14 */
272 AM62X_IOPAD(0x0f4, PIN_OUTPUT, 0) /* (AA21) VOUT0_DATA15 */
273 AM62X_IOPAD(0x05c, PIN_OUTPUT, 1) /* (R24) GPMC0_AD8.VOUT0_DATA16 */
274 AM62X_IOPAD(0x060, PIN_OUTPUT, 1) /* (R25) GPMC0_AD9.VOUT0_DATA17 */
275 AM62X_IOPAD(0x064, PIN_OUTPUT, 1) /* (T25) GPMC0_AD10.VOUT0_DATA18 */
276 AM62X_IOPAD(0x068, PIN_OUTPUT, 1) /* (R21) GPMC0_AD11.VOUT0_DATA19 */
277 AM62X_IOPAD(0x06c, PIN_OUTPUT, 1) /* (T22) GPMC0_AD12.VOUT0_DATA20 */
278 AM62X_IOPAD(0x070, PIN_OUTPUT, 1) /* (T24) GPMC0_AD13.VOUT0_DATA21 */
279 AM62X_IOPAD(0x074, PIN_OUTPUT, 1) /* (U25) GPMC0_AD14.VOUT0_DATA22 */
280 AM62X_IOPAD(0x078, PIN_OUTPUT, 1) /* (U24) GPMC0_AD15.VOUT0_DATA23 */
281 >;
282 };
283};
284
285&mcu_pmx0 {
286 wkup_uart0_pins_default: wkup-uart0-default-pins {
287 bootph-pre-ram;
288 pinctrl-single,pins = <
289 AM62X_MCU_IOPAD(0x02c, PIN_INPUT, 0) /* (C6/A7) WKUP_UART0_CTSn */
290 AM62X_MCU_IOPAD(0x030, PIN_OUTPUT, 0) /* (A4/B4) WKUP_UART0_RTSn */
291 AM62X_MCU_IOPAD(0x024, PIN_INPUT, 0) /* (B4/B5) WKUP_UART0_RXD */
292 AM62X_MCU_IOPAD(0x028, PIN_OUTPUT, 0) /* (C5/C6) WKUP_UART0_TXD */
293 >;
294 };
295};
296
297&wkup_uart0 {
298 /* WKUP UART0 is used by DM firmware */
299 bootph-pre-ram;
300 status = "reserved";
301 pinctrl-names = "default";
302 pinctrl-0 = <&wkup_uart0_pins_default>;
303};
304
305&main_uart0 {
306 bootph-all;
307 status = "okay";
308 pinctrl-names = "default";
309 pinctrl-0 = <&main_uart0_pins_default>;
310};
311
312&main_uart1 {
313 /* Main UART1 is used by TIFS firmware */
314 bootph-pre-ram;
315 status = "reserved";
316 pinctrl-names = "default";
317 pinctrl-0 = <&main_uart1_pins_default>;
318};
319
320&main_i2c0 {
321 status = "okay";
322 pinctrl-names = "default";
323 pinctrl-0 = <&main_i2c0_pins_default>;
324 clock-frequency = <400000>;
325
326 eeprom@51 {
327 /* AT24C512C-MAHM-T or M24512-DFMC6TG */
328 compatible = "atmel,24c512";
329 reg = <0x51>;
330 };
331
332 typec_pd0: tps6598x@3f {
333 compatible = "ti,tps6598x";
334 reg = <0x3f>;
335
336 connector {
337 compatible = "usb-c-connector";
338 label = "USB-C";
339 self-powered;
340 data-role = "dual";
341 power-role = "sink";
342 ports {
343 #address-cells = <1>;
344 #size-cells = <0>;
345
346 port@0 {
347 reg = <0>;
348 usb_con_hs: endpoint {
349 remote-endpoint = <&usb0_hs_ep>;
350 };
351 };
352 };
353 };
354 };
355};
356
357&main_i2c1 {
358 status = "okay";
359 pinctrl-names = "default";
360 pinctrl-0 = <&main_i2c1_pins_default>;
361 clock-frequency = <100000>;
362
363 tlv320aic3106: audio-codec@1b {
364 #sound-dai-cells = <0>;
365 compatible = "ti,tlv320aic3106";
366 reg = <0x1b>;
367 ai3x-micbias-vg = <1>; /* 2.0V */
368
369 /* Regulators */
370 AVDD-supply = <&vcc_3v3_sys>;
371 IOVDD-supply = <&vcc_3v3_sys>;
372 DRVDD-supply = <&vcc_3v3_sys>;
373 };
374
375 sii9022: bridge-hdmi@3b {
376 compatible = "sil,sii9022";
377 reg = <0x3b>;
378 interrupt-parent = <&exp1>;
379 interrupts = <16 IRQ_TYPE_EDGE_FALLING>;
380 #sound-dai-cells = <0>;
381 sil,i2s-data-lanes = < 0 >;
382
383 ports {
384 #address-cells = <1>;
385 #size-cells = <0>;
386
387 port@0 {
388 reg = <0>;
389
390 sii9022_in: endpoint {
391 remote-endpoint = <&dpi1_out>;
392 };
393 };
394
395 port@1 {
396 reg = <1>;
397
398 sii9022_out: endpoint {
399 remote-endpoint = <&hdmi_connector_in>;
400 };
401 };
402 };
403 };
404};
405
Tom Rini93743d22024-04-01 09:08:13 -0400[diff] [blame]406&main_i2c2 {
407 status = "okay";
408 pinctrl-names = "default";
409 pinctrl-0 = <&main_i2c2_pins_default>;
410 clock-frequency = <400000>;
411};
412
Tom Rini53633a82024-02-29 12:33:36 -0500[diff] [blame]413&sdhci0 {
414 bootph-all;
415 status = "okay";
416 pinctrl-names = "default";
417 pinctrl-0 = <&main_mmc0_pins_default>;
Tom Rini53633a82024-02-29 12:33:36 -0500[diff] [blame]418 disable-wp;
419};
420
421&sdhci1 {
422 /* SD/MMC */
423 bootph-all;
424 status = "okay";
425 pinctrl-names = "default";
426 pinctrl-0 = <&main_mmc1_pins_default>;
Tom Rini53633a82024-02-29 12:33:36 -0500[diff] [blame]427 disable-wp;
428};
429
430&cpsw3g {
431 bootph-all;
432 pinctrl-names = "default";
433 pinctrl-0 = <&main_rgmii1_pins_default>;
434};
435
436&cpsw_port1 {
437 bootph-all;
438 phy-mode = "rgmii-rxid";
439 phy-handle = <&cpsw3g_phy0>;
440};
441
442&cpsw3g_mdio {
443 bootph-all;
444 status = "okay";
445 pinctrl-names = "default";
446 pinctrl-0 = <&main_mdio1_pins_default>;
447
448 cpsw3g_phy0: ethernet-phy@0 {
449 bootph-all;
450 reg = <0>;
451 ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
452 ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
453 ti,min-output-impedance;
454 };
455};
456
457&mailbox0_cluster0 {
458 mbox_m4_0: mbox-m4-0 {
459 ti,mbox-rx = <0 0 0>;
460 ti,mbox-tx = <1 0 0>;
461 };
462};
463
464&usbss0 {
Tom Rini6bb92fc2024-05-20 09:54:58 -0600[diff] [blame]465 bootph-all;
Tom Rini53633a82024-02-29 12:33:36 -0500[diff] [blame]466 status = "okay";
467 ti,vbus-divider;
468};
469
470&usbss1 {
471 status = "okay";
472 ti,vbus-divider;
473};
474
475&usb0 {
Tom Rini6bb92fc2024-05-20 09:54:58 -0600[diff] [blame]476 bootph-all;
Tom Rini53633a82024-02-29 12:33:36 -0500[diff] [blame]477 #address-cells = <1>;
478 #size-cells = <0>;
479 usb-role-switch;
480
481 port@0 {
482 reg = <0>;
483 usb0_hs_ep: endpoint {
484 remote-endpoint = <&usb_con_hs>;
485 };
486 };
487};
488
489&usb1 {
490 dr_mode = "host";
491 pinctrl-names = "default";
492 pinctrl-0 = <&main_usb1_pins_default>;
493};
494
495&mcasp1 {
496 status = "okay";
497 #sound-dai-cells = <0>;
498
499 pinctrl-names = "default";
500 pinctrl-0 = <&main_mcasp1_pins_default>;
501
502 op-mode = <0>; /* MCASP_IIS_MODE */
503 tdm-slots = <2>;
504
505 serial-dir = < /* 0: INACTIVE, 1: TX, 2: RX */
506 1 0 2 0
507 0 0 0 0
508 0 0 0 0
509 0 0 0 0
510 >;
511 tx-num-evt = <32>;
512 rx-num-evt = <32>;
513};
514
515&dss {
516 status = "okay";
517 pinctrl-names = "default";
518 pinctrl-0 = <&main_dss0_pins_default>;
519};
520
521&dss_ports {
522 /* VP2: DPI Output */
523 port@1 {
524 reg = <1>;
525
526 dpi1_out: endpoint {
527 remote-endpoint = <&sii9022_in>;
528 };
529 };
530};
Tom Rini93743d22024-04-01 09:08:13 -0400[diff] [blame]531
532/* mcu_gpio0 and mcu_gpio_intr are reserved for mcu firmware usage */
533&mcu_gpio0 {
534 status = "reserved";
535};
536
537&mcu_gpio_intr {
538 status = "reserved";
539};