Tom Rini | 53633a8 | 2024-02-29 12:33:36 -0500 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0 |
| 2 | /* |
| 3 | * Device Tree Source for the R-Car V3U (R8A779A0) SoC |
| 4 | * |
| 5 | * Copyright (C) 2020 Renesas Electronics Corp. |
| 6 | */ |
| 7 | |
| 8 | #include <dt-bindings/clock/r8a779a0-cpg-mssr.h> |
| 9 | #include <dt-bindings/interrupt-controller/arm-gic.h> |
| 10 | #include <dt-bindings/power/r8a779a0-sysc.h> |
| 11 | |
| 12 | / { |
| 13 | compatible = "renesas,r8a779a0"; |
| 14 | #address-cells = <2>; |
| 15 | #size-cells = <2>; |
| 16 | |
| 17 | /* External CAN clock - to be overridden by boards that provide it */ |
| 18 | can_clk: can { |
| 19 | compatible = "fixed-clock"; |
| 20 | #clock-cells = <0>; |
| 21 | clock-frequency = <0>; |
| 22 | }; |
| 23 | |
| 24 | cpus { |
| 25 | #address-cells = <1>; |
| 26 | #size-cells = <0>; |
| 27 | |
| 28 | a76_0: cpu@0 { |
| 29 | compatible = "arm,cortex-a76"; |
| 30 | reg = <0>; |
| 31 | device_type = "cpu"; |
| 32 | power-domains = <&sysc R8A779A0_PD_A1E0D0C0>; |
| 33 | next-level-cache = <&L3_CA76_0>; |
| 34 | clocks = <&cpg CPG_CORE R8A779A0_CLK_Z0>; |
| 35 | }; |
| 36 | |
| 37 | L3_CA76_0: cache-controller-0 { |
| 38 | compatible = "cache"; |
| 39 | power-domains = <&sysc R8A779A0_PD_A2E0D0>; |
| 40 | cache-unified; |
| 41 | cache-level = <3>; |
| 42 | }; |
| 43 | }; |
| 44 | |
| 45 | extal_clk: extal { |
| 46 | compatible = "fixed-clock"; |
| 47 | #clock-cells = <0>; |
| 48 | /* This value must be overridden by the board */ |
| 49 | clock-frequency = <0>; |
| 50 | }; |
| 51 | |
| 52 | extalr_clk: extalr { |
| 53 | compatible = "fixed-clock"; |
| 54 | #clock-cells = <0>; |
| 55 | /* This value must be overridden by the board */ |
| 56 | clock-frequency = <0>; |
| 57 | }; |
| 58 | |
| 59 | pmu_a76 { |
| 60 | compatible = "arm,cortex-a76-pmu"; |
| 61 | interrupts-extended = <&gic GIC_PPI 7 IRQ_TYPE_LEVEL_LOW>; |
| 62 | }; |
| 63 | |
| 64 | /* External SCIF clock - to be overridden by boards that provide it */ |
| 65 | scif_clk: scif { |
| 66 | compatible = "fixed-clock"; |
| 67 | #clock-cells = <0>; |
| 68 | clock-frequency = <0>; |
| 69 | }; |
| 70 | |
| 71 | soc: soc { |
| 72 | compatible = "simple-bus"; |
| 73 | interrupt-parent = <&gic>; |
| 74 | #address-cells = <2>; |
| 75 | #size-cells = <2>; |
| 76 | ranges; |
| 77 | |
| 78 | rwdt: watchdog@e6020000 { |
| 79 | compatible = "renesas,r8a779a0-wdt", |
| 80 | "renesas,rcar-gen4-wdt"; |
| 81 | reg = <0 0xe6020000 0 0x0c>; |
| 82 | interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>; |
| 83 | clocks = <&cpg CPG_MOD 907>; |
| 84 | power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; |
| 85 | resets = <&cpg 907>; |
| 86 | status = "disabled"; |
| 87 | }; |
| 88 | |
| 89 | pfc: pinctrl@e6050000 { |
| 90 | compatible = "renesas,pfc-r8a779a0"; |
| 91 | reg = <0 0xe6050000 0 0x16c>, <0 0xe6050800 0 0x16c>, |
| 92 | <0 0xe6058000 0 0x16c>, <0 0xe6058800 0 0x16c>, |
| 93 | <0 0xe6060000 0 0x16c>, <0 0xe6060800 0 0x16c>, |
| 94 | <0 0xe6068000 0 0x16c>, <0 0xe6068800 0 0x16c>, |
| 95 | <0 0xe6069000 0 0x16c>, <0 0xe6069800 0 0x16c>; |
| 96 | }; |
| 97 | |
| 98 | gpio0: gpio@e6058180 { |
| 99 | compatible = "renesas,gpio-r8a779a0", |
| 100 | "renesas,rcar-gen4-gpio"; |
| 101 | reg = <0 0xe6058180 0 0x54>; |
| 102 | interrupts = <GIC_SPI 832 IRQ_TYPE_LEVEL_HIGH>; |
| 103 | clocks = <&cpg CPG_MOD 916>; |
| 104 | power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; |
| 105 | resets = <&cpg 916>; |
| 106 | gpio-controller; |
| 107 | #gpio-cells = <2>; |
| 108 | gpio-ranges = <&pfc 0 0 28>; |
| 109 | interrupt-controller; |
| 110 | #interrupt-cells = <2>; |
| 111 | }; |
| 112 | |
| 113 | gpio1: gpio@e6050180 { |
| 114 | compatible = "renesas,gpio-r8a779a0", |
| 115 | "renesas,rcar-gen4-gpio"; |
| 116 | reg = <0 0xe6050180 0 0x54>; |
| 117 | interrupts = <GIC_SPI 836 IRQ_TYPE_LEVEL_HIGH>; |
| 118 | clocks = <&cpg CPG_MOD 915>; |
| 119 | power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; |
| 120 | resets = <&cpg 915>; |
| 121 | gpio-controller; |
| 122 | #gpio-cells = <2>; |
| 123 | gpio-ranges = <&pfc 0 32 31>; |
| 124 | interrupt-controller; |
| 125 | #interrupt-cells = <2>; |
| 126 | }; |
| 127 | |
| 128 | gpio2: gpio@e6050980 { |
| 129 | compatible = "renesas,gpio-r8a779a0", |
| 130 | "renesas,rcar-gen4-gpio"; |
| 131 | reg = <0 0xe6050980 0 0x54>; |
| 132 | interrupts = <GIC_SPI 840 IRQ_TYPE_LEVEL_HIGH>; |
| 133 | clocks = <&cpg CPG_MOD 915>; |
| 134 | power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; |
| 135 | resets = <&cpg 915>; |
| 136 | gpio-controller; |
| 137 | #gpio-cells = <2>; |
| 138 | gpio-ranges = <&pfc 0 64 25>; |
| 139 | interrupt-controller; |
| 140 | #interrupt-cells = <2>; |
| 141 | }; |
| 142 | |
| 143 | gpio3: gpio@e6058980 { |
| 144 | compatible = "renesas,gpio-r8a779a0", |
| 145 | "renesas,rcar-gen4-gpio"; |
| 146 | reg = <0 0xe6058980 0 0x54>; |
| 147 | interrupts = <GIC_SPI 844 IRQ_TYPE_LEVEL_HIGH>; |
| 148 | clocks = <&cpg CPG_MOD 916>; |
| 149 | power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; |
| 150 | resets = <&cpg 916>; |
| 151 | gpio-controller; |
| 152 | #gpio-cells = <2>; |
| 153 | gpio-ranges = <&pfc 0 96 17>; |
| 154 | interrupt-controller; |
| 155 | #interrupt-cells = <2>; |
| 156 | }; |
| 157 | |
| 158 | gpio4: gpio@e6060180 { |
| 159 | compatible = "renesas,gpio-r8a779a0", |
| 160 | "renesas,rcar-gen4-gpio"; |
| 161 | reg = <0 0xe6060180 0 0x54>; |
| 162 | interrupts = <GIC_SPI 848 IRQ_TYPE_LEVEL_HIGH>; |
| 163 | clocks = <&cpg CPG_MOD 917>; |
| 164 | power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; |
| 165 | resets = <&cpg 917>; |
| 166 | gpio-controller; |
| 167 | #gpio-cells = <2>; |
| 168 | gpio-ranges = <&pfc 0 128 27>; |
| 169 | interrupt-controller; |
| 170 | #interrupt-cells = <2>; |
| 171 | }; |
| 172 | |
| 173 | gpio5: gpio@e6060980 { |
| 174 | compatible = "renesas,gpio-r8a779a0", |
| 175 | "renesas,rcar-gen4-gpio"; |
| 176 | reg = <0 0xe6060980 0 0x54>; |
| 177 | interrupts = <GIC_SPI 852 IRQ_TYPE_LEVEL_HIGH>; |
| 178 | clocks = <&cpg CPG_MOD 917>; |
| 179 | power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; |
| 180 | resets = <&cpg 917>; |
| 181 | gpio-controller; |
| 182 | #gpio-cells = <2>; |
| 183 | gpio-ranges = <&pfc 0 160 21>; |
| 184 | interrupt-controller; |
| 185 | #interrupt-cells = <2>; |
| 186 | }; |
| 187 | |
| 188 | gpio6: gpio@e6068180 { |
| 189 | compatible = "renesas,gpio-r8a779a0", |
| 190 | "renesas,rcar-gen4-gpio"; |
| 191 | reg = <0 0xe6068180 0 0x54>; |
| 192 | interrupts = <GIC_SPI 856 IRQ_TYPE_LEVEL_HIGH>; |
| 193 | clocks = <&cpg CPG_MOD 918>; |
| 194 | power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; |
| 195 | resets = <&cpg 918>; |
| 196 | gpio-controller; |
| 197 | #gpio-cells = <2>; |
| 198 | gpio-ranges = <&pfc 0 192 21>; |
| 199 | interrupt-controller; |
| 200 | #interrupt-cells = <2>; |
| 201 | }; |
| 202 | |
| 203 | gpio7: gpio@e6068980 { |
| 204 | compatible = "renesas,gpio-r8a779a0", |
| 205 | "renesas,rcar-gen4-gpio"; |
| 206 | reg = <0 0xe6068980 0 0x54>; |
| 207 | interrupts = <GIC_SPI 860 IRQ_TYPE_LEVEL_HIGH>; |
| 208 | clocks = <&cpg CPG_MOD 918>; |
| 209 | power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; |
| 210 | resets = <&cpg 918>; |
| 211 | gpio-controller; |
| 212 | #gpio-cells = <2>; |
| 213 | gpio-ranges = <&pfc 0 224 21>; |
| 214 | interrupt-controller; |
| 215 | #interrupt-cells = <2>; |
| 216 | }; |
| 217 | |
| 218 | gpio8: gpio@e6069180 { |
| 219 | compatible = "renesas,gpio-r8a779a0", |
| 220 | "renesas,rcar-gen4-gpio"; |
| 221 | reg = <0 0xe6069180 0 0x54>; |
| 222 | interrupts = <GIC_SPI 864 IRQ_TYPE_LEVEL_HIGH>; |
| 223 | clocks = <&cpg CPG_MOD 918>; |
| 224 | power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; |
| 225 | resets = <&cpg 918>; |
| 226 | gpio-controller; |
| 227 | #gpio-cells = <2>; |
| 228 | gpio-ranges = <&pfc 0 256 21>; |
| 229 | interrupt-controller; |
| 230 | #interrupt-cells = <2>; |
| 231 | }; |
| 232 | |
| 233 | gpio9: gpio@e6069980 { |
| 234 | compatible = "renesas,gpio-r8a779a0", |
| 235 | "renesas,rcar-gen4-gpio"; |
| 236 | reg = <0 0xe6069980 0 0x54>; |
| 237 | interrupts = <GIC_SPI 868 IRQ_TYPE_LEVEL_HIGH>; |
| 238 | clocks = <&cpg CPG_MOD 918>; |
| 239 | power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; |
| 240 | resets = <&cpg 918>; |
| 241 | gpio-controller; |
| 242 | #gpio-cells = <2>; |
| 243 | gpio-ranges = <&pfc 0 288 21>; |
| 244 | interrupt-controller; |
| 245 | #interrupt-cells = <2>; |
| 246 | }; |
| 247 | |
| 248 | cmt0: timer@e60f0000 { |
| 249 | compatible = "renesas,r8a779a0-cmt0", |
| 250 | "renesas,rcar-gen4-cmt0"; |
| 251 | reg = <0 0xe60f0000 0 0x1004>; |
| 252 | interrupts = <GIC_SPI 500 IRQ_TYPE_LEVEL_HIGH>, |
| 253 | <GIC_SPI 501 IRQ_TYPE_LEVEL_HIGH>; |
| 254 | clocks = <&cpg CPG_MOD 910>; |
| 255 | clock-names = "fck"; |
| 256 | power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; |
| 257 | resets = <&cpg 910>; |
| 258 | status = "disabled"; |
| 259 | }; |
| 260 | |
| 261 | cmt1: timer@e6130000 { |
| 262 | compatible = "renesas,r8a779a0-cmt1", |
| 263 | "renesas,rcar-gen4-cmt1"; |
| 264 | reg = <0 0xe6130000 0 0x1004>; |
| 265 | interrupts = <GIC_SPI 448 IRQ_TYPE_LEVEL_HIGH>, |
| 266 | <GIC_SPI 449 IRQ_TYPE_LEVEL_HIGH>, |
| 267 | <GIC_SPI 450 IRQ_TYPE_LEVEL_HIGH>, |
| 268 | <GIC_SPI 451 IRQ_TYPE_LEVEL_HIGH>, |
| 269 | <GIC_SPI 452 IRQ_TYPE_LEVEL_HIGH>, |
| 270 | <GIC_SPI 453 IRQ_TYPE_LEVEL_HIGH>, |
| 271 | <GIC_SPI 454 IRQ_TYPE_LEVEL_HIGH>, |
| 272 | <GIC_SPI 455 IRQ_TYPE_LEVEL_HIGH>; |
| 273 | clocks = <&cpg CPG_MOD 911>; |
| 274 | clock-names = "fck"; |
| 275 | power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; |
| 276 | resets = <&cpg 911>; |
| 277 | status = "disabled"; |
| 278 | }; |
| 279 | |
| 280 | cmt2: timer@e6140000 { |
| 281 | compatible = "renesas,r8a779a0-cmt1", |
| 282 | "renesas,rcar-gen4-cmt1"; |
| 283 | reg = <0 0xe6140000 0 0x1004>; |
| 284 | interrupts = <GIC_SPI 456 IRQ_TYPE_LEVEL_HIGH>, |
| 285 | <GIC_SPI 457 IRQ_TYPE_LEVEL_HIGH>, |
| 286 | <GIC_SPI 458 IRQ_TYPE_LEVEL_HIGH>, |
| 287 | <GIC_SPI 459 IRQ_TYPE_LEVEL_HIGH>, |
| 288 | <GIC_SPI 460 IRQ_TYPE_LEVEL_HIGH>, |
| 289 | <GIC_SPI 461 IRQ_TYPE_LEVEL_HIGH>, |
| 290 | <GIC_SPI 462 IRQ_TYPE_LEVEL_HIGH>, |
| 291 | <GIC_SPI 463 IRQ_TYPE_LEVEL_HIGH>; |
| 292 | clocks = <&cpg CPG_MOD 912>; |
| 293 | clock-names = "fck"; |
| 294 | power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; |
| 295 | resets = <&cpg 912>; |
| 296 | status = "disabled"; |
| 297 | }; |
| 298 | |
| 299 | cmt3: timer@e6148000 { |
| 300 | compatible = "renesas,r8a779a0-cmt1", |
| 301 | "renesas,rcar-gen4-cmt1"; |
| 302 | reg = <0 0xe6148000 0 0x1004>; |
| 303 | interrupts = <GIC_SPI 464 IRQ_TYPE_LEVEL_HIGH>, |
| 304 | <GIC_SPI 465 IRQ_TYPE_LEVEL_HIGH>, |
| 305 | <GIC_SPI 466 IRQ_TYPE_LEVEL_HIGH>, |
| 306 | <GIC_SPI 467 IRQ_TYPE_LEVEL_HIGH>, |
| 307 | <GIC_SPI 468 IRQ_TYPE_LEVEL_HIGH>, |
| 308 | <GIC_SPI 469 IRQ_TYPE_LEVEL_HIGH>, |
| 309 | <GIC_SPI 470 IRQ_TYPE_LEVEL_HIGH>, |
| 310 | <GIC_SPI 471 IRQ_TYPE_LEVEL_HIGH>; |
| 311 | clocks = <&cpg CPG_MOD 913>; |
| 312 | clock-names = "fck"; |
| 313 | power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; |
| 314 | resets = <&cpg 913>; |
| 315 | status = "disabled"; |
| 316 | }; |
| 317 | |
| 318 | cpg: clock-controller@e6150000 { |
| 319 | compatible = "renesas,r8a779a0-cpg-mssr"; |
| 320 | reg = <0 0xe6150000 0 0x4000>; |
| 321 | clocks = <&extal_clk>, <&extalr_clk>; |
| 322 | clock-names = "extal", "extalr"; |
| 323 | #clock-cells = <2>; |
| 324 | #power-domain-cells = <0>; |
| 325 | #reset-cells = <1>; |
| 326 | }; |
| 327 | |
| 328 | rst: reset-controller@e6160000 { |
| 329 | compatible = "renesas,r8a779a0-rst"; |
| 330 | reg = <0 0xe6160000 0 0x4000>; |
| 331 | }; |
| 332 | |
| 333 | sysc: system-controller@e6180000 { |
| 334 | compatible = "renesas,r8a779a0-sysc"; |
| 335 | reg = <0 0xe6180000 0 0x4000>; |
| 336 | #power-domain-cells = <1>; |
| 337 | }; |
| 338 | |
| 339 | tsc: thermal@e6190000 { |
| 340 | compatible = "renesas,r8a779a0-thermal"; |
| 341 | reg = <0 0xe6190000 0 0x200>, |
| 342 | <0 0xe6198000 0 0x200>, |
| 343 | <0 0xe61a0000 0 0x200>, |
| 344 | <0 0xe61a8000 0 0x200>, |
| 345 | <0 0xe61b0000 0 0x200>; |
| 346 | clocks = <&cpg CPG_MOD 919>; |
| 347 | power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; |
| 348 | resets = <&cpg 919>; |
| 349 | #thermal-sensor-cells = <1>; |
| 350 | }; |
| 351 | |
| 352 | intc_ex: interrupt-controller@e61c0000 { |
| 353 | compatible = "renesas,intc-ex-r8a779a0", "renesas,irqc"; |
| 354 | #interrupt-cells = <2>; |
| 355 | interrupt-controller; |
| 356 | reg = <0 0xe61c0000 0 0x200>; |
| 357 | interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>, |
| 358 | <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>, |
| 359 | <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>, |
| 360 | <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>, |
| 361 | <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>, |
| 362 | <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>; |
| 363 | clocks = <&cpg CPG_CORE R8A779A0_CLK_CP>; |
| 364 | power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; |
| 365 | }; |
| 366 | |
| 367 | tmu0: timer@e61e0000 { |
| 368 | compatible = "renesas,tmu-r8a779a0", "renesas,tmu"; |
| 369 | reg = <0 0xe61e0000 0 0x30>; |
| 370 | interrupts = <GIC_SPI 512 IRQ_TYPE_LEVEL_HIGH>, |
| 371 | <GIC_SPI 513 IRQ_TYPE_LEVEL_HIGH>, |
| 372 | <GIC_SPI 514 IRQ_TYPE_LEVEL_HIGH>; |
Tom Rini | 6bb92fc | 2024-05-20 09:54:58 -0600 | [diff] [blame] | 373 | interrupt-names = "tuni0", "tuni1", "tuni2"; |
Tom Rini | 53633a8 | 2024-02-29 12:33:36 -0500 | [diff] [blame] | 374 | clocks = <&cpg CPG_MOD 713>; |
| 375 | clock-names = "fck"; |
| 376 | power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; |
| 377 | resets = <&cpg 713>; |
| 378 | status = "disabled"; |
| 379 | }; |
| 380 | |
| 381 | tmu1: timer@e6fc0000 { |
| 382 | compatible = "renesas,tmu-r8a779a0", "renesas,tmu"; |
| 383 | reg = <0 0xe6fc0000 0 0x30>; |
| 384 | interrupts = <GIC_SPI 504 IRQ_TYPE_LEVEL_HIGH>, |
| 385 | <GIC_SPI 505 IRQ_TYPE_LEVEL_HIGH>, |
Tom Rini | 6bb92fc | 2024-05-20 09:54:58 -0600 | [diff] [blame] | 386 | <GIC_SPI 506 IRQ_TYPE_LEVEL_HIGH>, |
| 387 | <GIC_SPI 507 IRQ_TYPE_LEVEL_HIGH>; |
| 388 | interrupt-names = "tuni0", "tuni1", "tuni2", "ticpi2"; |
Tom Rini | 53633a8 | 2024-02-29 12:33:36 -0500 | [diff] [blame] | 389 | clocks = <&cpg CPG_MOD 714>; |
| 390 | clock-names = "fck"; |
| 391 | power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; |
| 392 | resets = <&cpg 714>; |
| 393 | status = "disabled"; |
| 394 | }; |
| 395 | |
| 396 | tmu2: timer@e6fd0000 { |
| 397 | compatible = "renesas,tmu-r8a779a0", "renesas,tmu"; |
| 398 | reg = <0 0xe6fd0000 0 0x30>; |
| 399 | interrupts = <GIC_SPI 508 IRQ_TYPE_LEVEL_HIGH>, |
| 400 | <GIC_SPI 509 IRQ_TYPE_LEVEL_HIGH>, |
Tom Rini | 6bb92fc | 2024-05-20 09:54:58 -0600 | [diff] [blame] | 401 | <GIC_SPI 510 IRQ_TYPE_LEVEL_HIGH>, |
| 402 | <GIC_SPI 511 IRQ_TYPE_LEVEL_HIGH>; |
| 403 | interrupt-names = "tuni0", "tuni1", "tuni2", "ticpi2"; |
Tom Rini | 53633a8 | 2024-02-29 12:33:36 -0500 | [diff] [blame] | 404 | clocks = <&cpg CPG_MOD 715>; |
| 405 | clock-names = "fck"; |
| 406 | power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; |
| 407 | resets = <&cpg 715>; |
| 408 | status = "disabled"; |
| 409 | }; |
| 410 | |
| 411 | tmu3: timer@e6fe0000 { |
| 412 | compatible = "renesas,tmu-r8a779a0", "renesas,tmu"; |
| 413 | reg = <0 0xe6fe0000 0 0x30>; |
| 414 | interrupts = <GIC_SPI 472 IRQ_TYPE_LEVEL_HIGH>, |
| 415 | <GIC_SPI 473 IRQ_TYPE_LEVEL_HIGH>, |
Tom Rini | 6bb92fc | 2024-05-20 09:54:58 -0600 | [diff] [blame] | 416 | <GIC_SPI 474 IRQ_TYPE_LEVEL_HIGH>, |
| 417 | <GIC_SPI 475 IRQ_TYPE_LEVEL_HIGH>; |
| 418 | interrupt-names = "tuni0", "tuni1", "tuni2", "ticpi2"; |
Tom Rini | 53633a8 | 2024-02-29 12:33:36 -0500 | [diff] [blame] | 419 | clocks = <&cpg CPG_MOD 716>; |
| 420 | clock-names = "fck"; |
| 421 | power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; |
| 422 | resets = <&cpg 716>; |
| 423 | status = "disabled"; |
| 424 | }; |
| 425 | |
| 426 | tmu4: timer@ffc00000 { |
| 427 | compatible = "renesas,tmu-r8a779a0", "renesas,tmu"; |
| 428 | reg = <0 0xffc00000 0 0x30>; |
| 429 | interrupts = <GIC_SPI 476 IRQ_TYPE_LEVEL_HIGH>, |
| 430 | <GIC_SPI 477 IRQ_TYPE_LEVEL_HIGH>, |
Tom Rini | 6bb92fc | 2024-05-20 09:54:58 -0600 | [diff] [blame] | 431 | <GIC_SPI 478 IRQ_TYPE_LEVEL_HIGH>, |
| 432 | <GIC_SPI 479 IRQ_TYPE_LEVEL_HIGH>; |
| 433 | interrupt-names = "tuni0", "tuni1", "tuni2", "ticpi2"; |
Tom Rini | 53633a8 | 2024-02-29 12:33:36 -0500 | [diff] [blame] | 434 | clocks = <&cpg CPG_MOD 717>; |
| 435 | clock-names = "fck"; |
| 436 | power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; |
| 437 | resets = <&cpg 717>; |
| 438 | status = "disabled"; |
| 439 | }; |
| 440 | |
| 441 | i2c0: i2c@e6500000 { |
| 442 | compatible = "renesas,i2c-r8a779a0", |
| 443 | "renesas,rcar-gen4-i2c"; |
| 444 | reg = <0 0xe6500000 0 0x40>; |
| 445 | interrupts = <GIC_SPI 238 IRQ_TYPE_LEVEL_HIGH>; |
| 446 | clocks = <&cpg CPG_MOD 518>; |
| 447 | power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; |
| 448 | resets = <&cpg 518>; |
| 449 | dmas = <&dmac1 0x91>, <&dmac1 0x90>; |
| 450 | dma-names = "tx", "rx"; |
| 451 | i2c-scl-internal-delay-ns = <110>; |
| 452 | #address-cells = <1>; |
| 453 | #size-cells = <0>; |
| 454 | status = "disabled"; |
| 455 | }; |
| 456 | |
| 457 | i2c1: i2c@e6508000 { |
| 458 | compatible = "renesas,i2c-r8a779a0", |
| 459 | "renesas,rcar-gen4-i2c"; |
| 460 | reg = <0 0xe6508000 0 0x40>; |
| 461 | interrupts = <GIC_SPI 239 IRQ_TYPE_LEVEL_HIGH>; |
| 462 | clocks = <&cpg CPG_MOD 519>; |
| 463 | power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; |
| 464 | resets = <&cpg 519>; |
| 465 | dmas = <&dmac1 0x93>, <&dmac1 0x92>; |
| 466 | dma-names = "tx", "rx"; |
| 467 | i2c-scl-internal-delay-ns = <110>; |
| 468 | #address-cells = <1>; |
| 469 | #size-cells = <0>; |
| 470 | status = "disabled"; |
| 471 | }; |
| 472 | |
| 473 | i2c2: i2c@e6510000 { |
| 474 | compatible = "renesas,i2c-r8a779a0", |
| 475 | "renesas,rcar-gen4-i2c"; |
| 476 | reg = <0 0xe6510000 0 0x40>; |
| 477 | interrupts = <GIC_SPI 240 IRQ_TYPE_LEVEL_HIGH>; |
| 478 | clocks = <&cpg CPG_MOD 520>; |
| 479 | power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; |
| 480 | resets = <&cpg 520>; |
| 481 | dmas = <&dmac1 0x95>, <&dmac1 0x94>; |
| 482 | dma-names = "tx", "rx"; |
| 483 | i2c-scl-internal-delay-ns = <110>; |
| 484 | #address-cells = <1>; |
| 485 | #size-cells = <0>; |
| 486 | status = "disabled"; |
| 487 | }; |
| 488 | |
| 489 | i2c3: i2c@e66d0000 { |
| 490 | compatible = "renesas,i2c-r8a779a0", |
| 491 | "renesas,rcar-gen4-i2c"; |
| 492 | reg = <0 0xe66d0000 0 0x40>; |
| 493 | interrupts = <GIC_SPI 241 IRQ_TYPE_LEVEL_HIGH>; |
| 494 | clocks = <&cpg CPG_MOD 521>; |
| 495 | power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; |
| 496 | resets = <&cpg 521>; |
| 497 | dmas = <&dmac1 0x97>, <&dmac1 0x96>; |
| 498 | dma-names = "tx", "rx"; |
| 499 | i2c-scl-internal-delay-ns = <110>; |
| 500 | #address-cells = <1>; |
| 501 | #size-cells = <0>; |
| 502 | status = "disabled"; |
| 503 | }; |
| 504 | |
| 505 | i2c4: i2c@e66d8000 { |
| 506 | compatible = "renesas,i2c-r8a779a0", |
| 507 | "renesas,rcar-gen4-i2c"; |
| 508 | reg = <0 0xe66d8000 0 0x40>; |
| 509 | interrupts = <GIC_SPI 242 IRQ_TYPE_LEVEL_HIGH>; |
| 510 | clocks = <&cpg CPG_MOD 522>; |
| 511 | power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; |
| 512 | resets = <&cpg 522>; |
| 513 | dmas = <&dmac1 0x99>, <&dmac1 0x98>; |
| 514 | dma-names = "tx", "rx"; |
| 515 | i2c-scl-internal-delay-ns = <110>; |
| 516 | #address-cells = <1>; |
| 517 | #size-cells = <0>; |
| 518 | status = "disabled"; |
| 519 | }; |
| 520 | |
| 521 | i2c5: i2c@e66e0000 { |
| 522 | compatible = "renesas,i2c-r8a779a0", |
| 523 | "renesas,rcar-gen4-i2c"; |
| 524 | reg = <0 0xe66e0000 0 0x40>; |
| 525 | interrupts = <GIC_SPI 243 IRQ_TYPE_LEVEL_HIGH>; |
| 526 | clocks = <&cpg CPG_MOD 523>; |
| 527 | power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; |
| 528 | resets = <&cpg 523>; |
| 529 | dmas = <&dmac1 0x9b>, <&dmac1 0x9a>; |
| 530 | dma-names = "tx", "rx"; |
| 531 | i2c-scl-internal-delay-ns = <110>; |
| 532 | #address-cells = <1>; |
| 533 | #size-cells = <0>; |
| 534 | status = "disabled"; |
| 535 | }; |
| 536 | |
| 537 | i2c6: i2c@e66e8000 { |
| 538 | compatible = "renesas,i2c-r8a779a0", |
| 539 | "renesas,rcar-gen4-i2c"; |
| 540 | reg = <0 0xe66e8000 0 0x40>; |
| 541 | interrupts = <GIC_SPI 244 IRQ_TYPE_LEVEL_HIGH>; |
| 542 | clocks = <&cpg CPG_MOD 524>; |
| 543 | power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; |
| 544 | resets = <&cpg 524>; |
| 545 | dmas = <&dmac1 0x9d>, <&dmac1 0x9c>; |
| 546 | dma-names = "tx", "rx"; |
| 547 | i2c-scl-internal-delay-ns = <110>; |
| 548 | #address-cells = <1>; |
| 549 | #size-cells = <0>; |
| 550 | status = "disabled"; |
| 551 | }; |
| 552 | |
| 553 | hscif0: serial@e6540000 { |
| 554 | compatible = "renesas,hscif-r8a779a0", |
| 555 | "renesas,rcar-gen4-hscif", "renesas,hscif"; |
| 556 | reg = <0 0xe6540000 0 0x60>; |
| 557 | interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>; |
| 558 | clocks = <&cpg CPG_MOD 514>, |
| 559 | <&cpg CPG_CORE R8A779A0_CLK_S1D2>, |
| 560 | <&scif_clk>; |
| 561 | clock-names = "fck", "brg_int", "scif_clk"; |
| 562 | dmas = <&dmac1 0x31>, <&dmac1 0x30>; |
| 563 | dma-names = "tx", "rx"; |
| 564 | power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; |
| 565 | resets = <&cpg 514>; |
| 566 | status = "disabled"; |
| 567 | }; |
| 568 | |
| 569 | hscif1: serial@e6550000 { |
| 570 | compatible = "renesas,hscif-r8a779a0", |
| 571 | "renesas,rcar-gen4-hscif", "renesas,hscif"; |
| 572 | reg = <0 0xe6550000 0 0x60>; |
| 573 | interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>; |
| 574 | clocks = <&cpg CPG_MOD 515>, |
| 575 | <&cpg CPG_CORE R8A779A0_CLK_S1D2>, |
| 576 | <&scif_clk>; |
| 577 | clock-names = "fck", "brg_int", "scif_clk"; |
| 578 | dmas = <&dmac1 0x33>, <&dmac1 0x32>; |
| 579 | dma-names = "tx", "rx"; |
| 580 | power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; |
| 581 | resets = <&cpg 515>; |
| 582 | status = "disabled"; |
| 583 | }; |
| 584 | |
| 585 | hscif2: serial@e6560000 { |
| 586 | compatible = "renesas,hscif-r8a779a0", |
| 587 | "renesas,rcar-gen4-hscif", "renesas,hscif"; |
| 588 | reg = <0 0xe6560000 0 0x60>; |
| 589 | interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>; |
| 590 | clocks = <&cpg CPG_MOD 516>, |
| 591 | <&cpg CPG_CORE R8A779A0_CLK_S1D2>, |
| 592 | <&scif_clk>; |
| 593 | clock-names = "fck", "brg_int", "scif_clk"; |
| 594 | dmas = <&dmac1 0x35>, <&dmac1 0x34>; |
| 595 | dma-names = "tx", "rx"; |
| 596 | power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; |
| 597 | resets = <&cpg 516>; |
| 598 | status = "disabled"; |
| 599 | }; |
| 600 | |
| 601 | hscif3: serial@e66a0000 { |
| 602 | compatible = "renesas,hscif-r8a779a0", |
| 603 | "renesas,rcar-gen4-hscif", "renesas,hscif"; |
| 604 | reg = <0 0xe66a0000 0 0x60>; |
| 605 | interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>; |
| 606 | clocks = <&cpg CPG_MOD 517>, |
| 607 | <&cpg CPG_CORE R8A779A0_CLK_S1D2>, |
| 608 | <&scif_clk>; |
| 609 | clock-names = "fck", "brg_int", "scif_clk"; |
| 610 | dmas = <&dmac1 0x37>, <&dmac1 0x36>; |
| 611 | dma-names = "tx", "rx"; |
| 612 | power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; |
| 613 | resets = <&cpg 517>; |
| 614 | status = "disabled"; |
| 615 | }; |
| 616 | |
| 617 | canfd: can@e6660000 { |
| 618 | compatible = "renesas,r8a779a0-canfd", |
| 619 | "renesas,rcar-gen4-canfd"; |
| 620 | reg = <0 0xe6660000 0 0x8000>; |
| 621 | interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>, |
| 622 | <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>; |
| 623 | interrupt-names = "ch_int", "g_int"; |
| 624 | clocks = <&cpg CPG_MOD 328>, |
| 625 | <&cpg CPG_CORE R8A779A0_CLK_CANFD>, |
| 626 | <&can_clk>; |
| 627 | clock-names = "fck", "canfd", "can_clk"; |
| 628 | assigned-clocks = <&cpg CPG_CORE R8A779A0_CLK_CANFD>; |
| 629 | assigned-clock-rates = <80000000>; |
| 630 | power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; |
| 631 | resets = <&cpg 328>; |
| 632 | status = "disabled"; |
| 633 | |
| 634 | channel0 { |
| 635 | status = "disabled"; |
| 636 | }; |
| 637 | |
| 638 | channel1 { |
| 639 | status = "disabled"; |
| 640 | }; |
| 641 | |
| 642 | channel2 { |
| 643 | status = "disabled"; |
| 644 | }; |
| 645 | |
| 646 | channel3 { |
| 647 | status = "disabled"; |
| 648 | }; |
| 649 | |
| 650 | channel4 { |
| 651 | status = "disabled"; |
| 652 | }; |
| 653 | |
| 654 | channel5 { |
| 655 | status = "disabled"; |
| 656 | }; |
| 657 | |
| 658 | channel6 { |
| 659 | status = "disabled"; |
| 660 | }; |
| 661 | |
| 662 | channel7 { |
| 663 | status = "disabled"; |
| 664 | }; |
| 665 | }; |
| 666 | |
| 667 | avb0: ethernet@e6800000 { |
| 668 | compatible = "renesas,etheravb-r8a779a0", |
| 669 | "renesas,etheravb-rcar-gen4"; |
Tom Rini | 6bb92fc | 2024-05-20 09:54:58 -0600 | [diff] [blame] | 670 | reg = <0 0xe6800000 0 0x1000>; |
Tom Rini | 53633a8 | 2024-02-29 12:33:36 -0500 | [diff] [blame] | 671 | interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>, |
| 672 | <GIC_SPI 257 IRQ_TYPE_LEVEL_HIGH>, |
| 673 | <GIC_SPI 258 IRQ_TYPE_LEVEL_HIGH>, |
| 674 | <GIC_SPI 259 IRQ_TYPE_LEVEL_HIGH>, |
| 675 | <GIC_SPI 260 IRQ_TYPE_LEVEL_HIGH>, |
| 676 | <GIC_SPI 261 IRQ_TYPE_LEVEL_HIGH>, |
| 677 | <GIC_SPI 262 IRQ_TYPE_LEVEL_HIGH>, |
| 678 | <GIC_SPI 263 IRQ_TYPE_LEVEL_HIGH>, |
| 679 | <GIC_SPI 264 IRQ_TYPE_LEVEL_HIGH>, |
| 680 | <GIC_SPI 265 IRQ_TYPE_LEVEL_HIGH>, |
| 681 | <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>, |
| 682 | <GIC_SPI 267 IRQ_TYPE_LEVEL_HIGH>, |
| 683 | <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>, |
| 684 | <GIC_SPI 269 IRQ_TYPE_LEVEL_HIGH>, |
| 685 | <GIC_SPI 270 IRQ_TYPE_LEVEL_HIGH>, |
| 686 | <GIC_SPI 271 IRQ_TYPE_LEVEL_HIGH>, |
| 687 | <GIC_SPI 272 IRQ_TYPE_LEVEL_HIGH>, |
| 688 | <GIC_SPI 273 IRQ_TYPE_LEVEL_HIGH>, |
| 689 | <GIC_SPI 274 IRQ_TYPE_LEVEL_HIGH>, |
| 690 | <GIC_SPI 275 IRQ_TYPE_LEVEL_HIGH>, |
| 691 | <GIC_SPI 276 IRQ_TYPE_LEVEL_HIGH>, |
| 692 | <GIC_SPI 277 IRQ_TYPE_LEVEL_HIGH>, |
| 693 | <GIC_SPI 278 IRQ_TYPE_LEVEL_HIGH>, |
| 694 | <GIC_SPI 279 IRQ_TYPE_LEVEL_HIGH>, |
| 695 | <GIC_SPI 280 IRQ_TYPE_LEVEL_HIGH>; |
| 696 | interrupt-names = "ch0", "ch1", "ch2", "ch3", |
| 697 | "ch4", "ch5", "ch6", "ch7", |
| 698 | "ch8", "ch9", "ch10", "ch11", |
| 699 | "ch12", "ch13", "ch14", "ch15", |
| 700 | "ch16", "ch17", "ch18", "ch19", |
| 701 | "ch20", "ch21", "ch22", "ch23", |
| 702 | "ch24"; |
| 703 | clocks = <&cpg CPG_MOD 211>; |
| 704 | clock-names = "fck"; |
| 705 | power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; |
| 706 | resets = <&cpg 211>; |
| 707 | phy-mode = "rgmii"; |
| 708 | rx-internal-delay-ps = <0>; |
| 709 | tx-internal-delay-ps = <0>; |
| 710 | #address-cells = <1>; |
| 711 | #size-cells = <0>; |
| 712 | status = "disabled"; |
| 713 | }; |
| 714 | |
| 715 | avb1: ethernet@e6810000 { |
| 716 | compatible = "renesas,etheravb-r8a779a0", |
| 717 | "renesas,etheravb-rcar-gen4"; |
Tom Rini | 6bb92fc | 2024-05-20 09:54:58 -0600 | [diff] [blame] | 718 | reg = <0 0xe6810000 0 0x1000>; |
Tom Rini | 53633a8 | 2024-02-29 12:33:36 -0500 | [diff] [blame] | 719 | interrupts = <GIC_SPI 281 IRQ_TYPE_LEVEL_HIGH>, |
| 720 | <GIC_SPI 282 IRQ_TYPE_LEVEL_HIGH>, |
| 721 | <GIC_SPI 283 IRQ_TYPE_LEVEL_HIGH>, |
| 722 | <GIC_SPI 284 IRQ_TYPE_LEVEL_HIGH>, |
| 723 | <GIC_SPI 285 IRQ_TYPE_LEVEL_HIGH>, |
| 724 | <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>, |
| 725 | <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>, |
| 726 | <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>, |
| 727 | <GIC_SPI 289 IRQ_TYPE_LEVEL_HIGH>, |
| 728 | <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>, |
| 729 | <GIC_SPI 291 IRQ_TYPE_LEVEL_HIGH>, |
| 730 | <GIC_SPI 292 IRQ_TYPE_LEVEL_HIGH>, |
| 731 | <GIC_SPI 293 IRQ_TYPE_LEVEL_HIGH>, |
| 732 | <GIC_SPI 294 IRQ_TYPE_LEVEL_HIGH>, |
| 733 | <GIC_SPI 295 IRQ_TYPE_LEVEL_HIGH>, |
| 734 | <GIC_SPI 296 IRQ_TYPE_LEVEL_HIGH>, |
| 735 | <GIC_SPI 297 IRQ_TYPE_LEVEL_HIGH>, |
| 736 | <GIC_SPI 298 IRQ_TYPE_LEVEL_HIGH>, |
| 737 | <GIC_SPI 299 IRQ_TYPE_LEVEL_HIGH>, |
| 738 | <GIC_SPI 300 IRQ_TYPE_LEVEL_HIGH>, |
| 739 | <GIC_SPI 301 IRQ_TYPE_LEVEL_HIGH>, |
| 740 | <GIC_SPI 302 IRQ_TYPE_LEVEL_HIGH>, |
| 741 | <GIC_SPI 303 IRQ_TYPE_LEVEL_HIGH>, |
| 742 | <GIC_SPI 304 IRQ_TYPE_LEVEL_HIGH>, |
| 743 | <GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>; |
| 744 | interrupt-names = "ch0", "ch1", "ch2", "ch3", |
| 745 | "ch4", "ch5", "ch6", "ch7", |
| 746 | "ch8", "ch9", "ch10", "ch11", |
| 747 | "ch12", "ch13", "ch14", "ch15", |
| 748 | "ch16", "ch17", "ch18", "ch19", |
| 749 | "ch20", "ch21", "ch22", "ch23", |
| 750 | "ch24"; |
| 751 | clocks = <&cpg CPG_MOD 212>; |
| 752 | clock-names = "fck"; |
| 753 | power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; |
| 754 | resets = <&cpg 212>; |
| 755 | phy-mode = "rgmii"; |
| 756 | rx-internal-delay-ps = <0>; |
| 757 | tx-internal-delay-ps = <0>; |
| 758 | #address-cells = <1>; |
| 759 | #size-cells = <0>; |
| 760 | status = "disabled"; |
| 761 | }; |
| 762 | |
| 763 | avb2: ethernet@e6820000 { |
| 764 | compatible = "renesas,etheravb-r8a779a0", |
| 765 | "renesas,etheravb-rcar-gen4"; |
| 766 | reg = <0 0xe6820000 0 0x1000>; |
| 767 | interrupts = <GIC_SPI 306 IRQ_TYPE_LEVEL_HIGH>, |
| 768 | <GIC_SPI 307 IRQ_TYPE_LEVEL_HIGH>, |
| 769 | <GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>, |
| 770 | <GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH>, |
| 771 | <GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH>, |
| 772 | <GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH>, |
| 773 | <GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH>, |
| 774 | <GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH>, |
| 775 | <GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH>, |
| 776 | <GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH>, |
| 777 | <GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH>, |
| 778 | <GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH>, |
| 779 | <GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>, |
| 780 | <GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>, |
| 781 | <GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH>, |
| 782 | <GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH>, |
| 783 | <GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH>, |
| 784 | <GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH>, |
| 785 | <GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH>, |
| 786 | <GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH>, |
| 787 | <GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH>, |
| 788 | <GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH>, |
| 789 | <GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH>, |
| 790 | <GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH>, |
| 791 | <GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>; |
| 792 | interrupt-names = "ch0", "ch1", "ch2", "ch3", |
| 793 | "ch4", "ch5", "ch6", "ch7", |
| 794 | "ch8", "ch9", "ch10", "ch11", |
| 795 | "ch12", "ch13", "ch14", "ch15", |
| 796 | "ch16", "ch17", "ch18", "ch19", |
| 797 | "ch20", "ch21", "ch22", "ch23", |
| 798 | "ch24"; |
| 799 | clocks = <&cpg CPG_MOD 213>; |
| 800 | clock-names = "fck"; |
| 801 | power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; |
| 802 | resets = <&cpg 213>; |
| 803 | phy-mode = "rgmii"; |
| 804 | rx-internal-delay-ps = <0>; |
| 805 | tx-internal-delay-ps = <0>; |
| 806 | #address-cells = <1>; |
| 807 | #size-cells = <0>; |
| 808 | status = "disabled"; |
| 809 | }; |
| 810 | |
| 811 | avb3: ethernet@e6830000 { |
| 812 | compatible = "renesas,etheravb-r8a779a0", |
| 813 | "renesas,etheravb-rcar-gen4"; |
| 814 | reg = <0 0xe6830000 0 0x1000>; |
| 815 | interrupts = <GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH>, |
| 816 | <GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>, |
| 817 | <GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH>, |
| 818 | <GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH>, |
| 819 | <GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>, |
| 820 | <GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH>, |
| 821 | <GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH>, |
| 822 | <GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH>, |
| 823 | <GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH>, |
| 824 | <GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH>, |
| 825 | <GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH>, |
| 826 | <GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH>, |
| 827 | <GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH>, |
| 828 | <GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH>, |
| 829 | <GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>, |
| 830 | <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH>, |
| 831 | <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH>, |
| 832 | <GIC_SPI 348 IRQ_TYPE_LEVEL_HIGH>, |
| 833 | <GIC_SPI 349 IRQ_TYPE_LEVEL_HIGH>, |
| 834 | <GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH>, |
| 835 | <GIC_SPI 351 IRQ_TYPE_LEVEL_HIGH>, |
| 836 | <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>, |
| 837 | <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>, |
| 838 | <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>, |
| 839 | <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>; |
| 840 | interrupt-names = "ch0", "ch1", "ch2", "ch3", |
| 841 | "ch4", "ch5", "ch6", "ch7", |
| 842 | "ch8", "ch9", "ch10", "ch11", |
| 843 | "ch12", "ch13", "ch14", "ch15", |
| 844 | "ch16", "ch17", "ch18", "ch19", |
| 845 | "ch20", "ch21", "ch22", "ch23", |
| 846 | "ch24"; |
| 847 | clocks = <&cpg CPG_MOD 214>; |
| 848 | clock-names = "fck"; |
| 849 | power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; |
| 850 | resets = <&cpg 214>; |
| 851 | phy-mode = "rgmii"; |
| 852 | rx-internal-delay-ps = <0>; |
| 853 | tx-internal-delay-ps = <0>; |
| 854 | #address-cells = <1>; |
| 855 | #size-cells = <0>; |
| 856 | status = "disabled"; |
| 857 | }; |
| 858 | |
| 859 | avb4: ethernet@e6840000 { |
| 860 | compatible = "renesas,etheravb-r8a779a0", |
| 861 | "renesas,etheravb-rcar-gen4"; |
| 862 | reg = <0 0xe6840000 0 0x1000>; |
| 863 | interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>, |
| 864 | <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>, |
| 865 | <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>, |
| 866 | <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>, |
| 867 | <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>, |
| 868 | <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>, |
| 869 | <GIC_SPI 362 IRQ_TYPE_LEVEL_HIGH>, |
| 870 | <GIC_SPI 363 IRQ_TYPE_LEVEL_HIGH>, |
| 871 | <GIC_SPI 364 IRQ_TYPE_LEVEL_HIGH>, |
| 872 | <GIC_SPI 365 IRQ_TYPE_LEVEL_HIGH>, |
| 873 | <GIC_SPI 366 IRQ_TYPE_LEVEL_HIGH>, |
| 874 | <GIC_SPI 367 IRQ_TYPE_LEVEL_HIGH>, |
| 875 | <GIC_SPI 368 IRQ_TYPE_LEVEL_HIGH>, |
| 876 | <GIC_SPI 369 IRQ_TYPE_LEVEL_HIGH>, |
| 877 | <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>, |
| 878 | <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>, |
| 879 | <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>, |
| 880 | <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>, |
| 881 | <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>, |
| 882 | <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>, |
| 883 | <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>, |
| 884 | <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>, |
| 885 | <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>, |
| 886 | <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>, |
| 887 | <GIC_SPI 380 IRQ_TYPE_LEVEL_HIGH>; |
| 888 | interrupt-names = "ch0", "ch1", "ch2", "ch3", |
| 889 | "ch4", "ch5", "ch6", "ch7", |
| 890 | "ch8", "ch9", "ch10", "ch11", |
| 891 | "ch12", "ch13", "ch14", "ch15", |
| 892 | "ch16", "ch17", "ch18", "ch19", |
| 893 | "ch20", "ch21", "ch22", "ch23", |
| 894 | "ch24"; |
| 895 | clocks = <&cpg CPG_MOD 215>; |
| 896 | clock-names = "fck"; |
| 897 | power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; |
| 898 | resets = <&cpg 215>; |
| 899 | phy-mode = "rgmii"; |
| 900 | rx-internal-delay-ps = <0>; |
| 901 | tx-internal-delay-ps = <0>; |
| 902 | #address-cells = <1>; |
| 903 | #size-cells = <0>; |
| 904 | status = "disabled"; |
| 905 | }; |
| 906 | |
| 907 | avb5: ethernet@e6850000 { |
| 908 | compatible = "renesas,etheravb-r8a779a0", |
| 909 | "renesas,etheravb-rcar-gen4"; |
| 910 | reg = <0 0xe6850000 0 0x1000>; |
| 911 | interrupts = <GIC_SPI 381 IRQ_TYPE_LEVEL_HIGH>, |
| 912 | <GIC_SPI 382 IRQ_TYPE_LEVEL_HIGH>, |
| 913 | <GIC_SPI 383 IRQ_TYPE_LEVEL_HIGH>, |
| 914 | <GIC_SPI 384 IRQ_TYPE_LEVEL_HIGH>, |
| 915 | <GIC_SPI 385 IRQ_TYPE_LEVEL_HIGH>, |
| 916 | <GIC_SPI 386 IRQ_TYPE_LEVEL_HIGH>, |
| 917 | <GIC_SPI 387 IRQ_TYPE_LEVEL_HIGH>, |
| 918 | <GIC_SPI 388 IRQ_TYPE_LEVEL_HIGH>, |
| 919 | <GIC_SPI 389 IRQ_TYPE_LEVEL_HIGH>, |
| 920 | <GIC_SPI 390 IRQ_TYPE_LEVEL_HIGH>, |
| 921 | <GIC_SPI 391 IRQ_TYPE_LEVEL_HIGH>, |
| 922 | <GIC_SPI 392 IRQ_TYPE_LEVEL_HIGH>, |
| 923 | <GIC_SPI 393 IRQ_TYPE_LEVEL_HIGH>, |
| 924 | <GIC_SPI 394 IRQ_TYPE_LEVEL_HIGH>, |
| 925 | <GIC_SPI 395 IRQ_TYPE_LEVEL_HIGH>, |
| 926 | <GIC_SPI 396 IRQ_TYPE_LEVEL_HIGH>, |
| 927 | <GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>, |
| 928 | <GIC_SPI 398 IRQ_TYPE_LEVEL_HIGH>, |
| 929 | <GIC_SPI 399 IRQ_TYPE_LEVEL_HIGH>, |
| 930 | <GIC_SPI 400 IRQ_TYPE_LEVEL_HIGH>, |
| 931 | <GIC_SPI 401 IRQ_TYPE_LEVEL_HIGH>, |
| 932 | <GIC_SPI 402 IRQ_TYPE_LEVEL_HIGH>, |
| 933 | <GIC_SPI 403 IRQ_TYPE_LEVEL_HIGH>, |
| 934 | <GIC_SPI 404 IRQ_TYPE_LEVEL_HIGH>, |
| 935 | <GIC_SPI 405 IRQ_TYPE_LEVEL_HIGH>; |
| 936 | interrupt-names = "ch0", "ch1", "ch2", "ch3", |
| 937 | "ch4", "ch5", "ch6", "ch7", |
| 938 | "ch8", "ch9", "ch10", "ch11", |
| 939 | "ch12", "ch13", "ch14", "ch15", |
| 940 | "ch16", "ch17", "ch18", "ch19", |
| 941 | "ch20", "ch21", "ch22", "ch23", |
| 942 | "ch24"; |
| 943 | clocks = <&cpg CPG_MOD 216>; |
| 944 | clock-names = "fck"; |
| 945 | power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; |
| 946 | resets = <&cpg 216>; |
| 947 | phy-mode = "rgmii"; |
| 948 | rx-internal-delay-ps = <0>; |
| 949 | tx-internal-delay-ps = <0>; |
| 950 | #address-cells = <1>; |
| 951 | #size-cells = <0>; |
| 952 | status = "disabled"; |
| 953 | }; |
| 954 | |
| 955 | pwm0: pwm@e6e30000 { |
| 956 | compatible = "renesas,pwm-r8a779a0", "renesas,pwm-rcar"; |
| 957 | reg = <0 0xe6e30000 0 0x10>; |
| 958 | #pwm-cells = <2>; |
| 959 | clocks = <&cpg CPG_MOD 628>; |
| 960 | power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; |
| 961 | resets = <&cpg 628>; |
| 962 | status = "disabled"; |
| 963 | }; |
| 964 | |
| 965 | pwm1: pwm@e6e31000 { |
| 966 | compatible = "renesas,pwm-r8a779a0", "renesas,pwm-rcar"; |
| 967 | reg = <0 0xe6e31000 0 0x10>; |
| 968 | #pwm-cells = <2>; |
| 969 | clocks = <&cpg CPG_MOD 628>; |
| 970 | power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; |
| 971 | resets = <&cpg 628>; |
| 972 | status = "disabled"; |
| 973 | }; |
| 974 | |
| 975 | pwm2: pwm@e6e32000 { |
| 976 | compatible = "renesas,pwm-r8a779a0", "renesas,pwm-rcar"; |
| 977 | reg = <0 0xe6e32000 0 0x10>; |
| 978 | #pwm-cells = <2>; |
| 979 | clocks = <&cpg CPG_MOD 628>; |
| 980 | power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; |
| 981 | resets = <&cpg 628>; |
| 982 | status = "disabled"; |
| 983 | }; |
| 984 | |
| 985 | pwm3: pwm@e6e33000 { |
| 986 | compatible = "renesas,pwm-r8a779a0", "renesas,pwm-rcar"; |
| 987 | reg = <0 0xe6e33000 0 0x10>; |
| 988 | #pwm-cells = <2>; |
| 989 | clocks = <&cpg CPG_MOD 628>; |
| 990 | power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; |
| 991 | resets = <&cpg 628>; |
| 992 | status = "disabled"; |
| 993 | }; |
| 994 | |
| 995 | pwm4: pwm@e6e34000 { |
| 996 | compatible = "renesas,pwm-r8a779a0", "renesas,pwm-rcar"; |
| 997 | reg = <0 0xe6e34000 0 0x10>; |
| 998 | #pwm-cells = <2>; |
| 999 | clocks = <&cpg CPG_MOD 628>; |
| 1000 | power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; |
| 1001 | resets = <&cpg 628>; |
| 1002 | status = "disabled"; |
| 1003 | }; |
| 1004 | |
| 1005 | scif0: serial@e6e60000 { |
| 1006 | compatible = "renesas,scif-r8a779a0", |
| 1007 | "renesas,rcar-gen4-scif", "renesas,scif"; |
| 1008 | reg = <0 0xe6e60000 0 64>; |
| 1009 | interrupts = <GIC_SPI 251 IRQ_TYPE_LEVEL_HIGH>; |
| 1010 | clocks = <&cpg CPG_MOD 702>, |
| 1011 | <&cpg CPG_CORE R8A779A0_CLK_S1D2>, |
| 1012 | <&scif_clk>; |
| 1013 | clock-names = "fck", "brg_int", "scif_clk"; |
| 1014 | dmas = <&dmac1 0x51>, <&dmac1 0x50>; |
| 1015 | dma-names = "tx", "rx"; |
| 1016 | power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; |
| 1017 | resets = <&cpg 702>; |
| 1018 | status = "disabled"; |
| 1019 | }; |
| 1020 | |
| 1021 | scif1: serial@e6e68000 { |
| 1022 | compatible = "renesas,scif-r8a779a0", |
| 1023 | "renesas,rcar-gen4-scif", "renesas,scif"; |
| 1024 | reg = <0 0xe6e68000 0 64>; |
| 1025 | interrupts = <GIC_SPI 252 IRQ_TYPE_LEVEL_HIGH>; |
| 1026 | clocks = <&cpg CPG_MOD 703>, |
| 1027 | <&cpg CPG_CORE R8A779A0_CLK_S1D2>, |
| 1028 | <&scif_clk>; |
| 1029 | clock-names = "fck", "brg_int", "scif_clk"; |
| 1030 | dmas = <&dmac1 0x53>, <&dmac1 0x52>; |
| 1031 | dma-names = "tx", "rx"; |
| 1032 | power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; |
| 1033 | resets = <&cpg 703>; |
| 1034 | status = "disabled"; |
| 1035 | }; |
| 1036 | |
| 1037 | scif3: serial@e6c50000 { |
| 1038 | compatible = "renesas,scif-r8a779a0", |
| 1039 | "renesas,rcar-gen4-scif", "renesas,scif"; |
| 1040 | reg = <0 0xe6c50000 0 64>; |
| 1041 | interrupts = <GIC_SPI 253 IRQ_TYPE_LEVEL_HIGH>; |
| 1042 | clocks = <&cpg CPG_MOD 704>, |
| 1043 | <&cpg CPG_CORE R8A779A0_CLK_S1D2>, |
| 1044 | <&scif_clk>; |
| 1045 | clock-names = "fck", "brg_int", "scif_clk"; |
| 1046 | dmas = <&dmac1 0x57>, <&dmac1 0x56>; |
| 1047 | dma-names = "tx", "rx"; |
| 1048 | power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; |
| 1049 | resets = <&cpg 704>; |
| 1050 | status = "disabled"; |
| 1051 | }; |
| 1052 | |
| 1053 | scif4: serial@e6c40000 { |
| 1054 | compatible = "renesas,scif-r8a779a0", |
| 1055 | "renesas,rcar-gen4-scif", "renesas,scif"; |
| 1056 | reg = <0 0xe6c40000 0 64>; |
| 1057 | interrupts = <GIC_SPI 254 IRQ_TYPE_LEVEL_HIGH>; |
| 1058 | clocks = <&cpg CPG_MOD 705>, |
| 1059 | <&cpg CPG_CORE R8A779A0_CLK_S1D2>, |
| 1060 | <&scif_clk>; |
| 1061 | clock-names = "fck", "brg_int", "scif_clk"; |
| 1062 | dmas = <&dmac1 0x59>, <&dmac1 0x58>; |
| 1063 | dma-names = "tx", "rx"; |
| 1064 | power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; |
| 1065 | resets = <&cpg 705>; |
| 1066 | status = "disabled"; |
| 1067 | }; |
| 1068 | |
| 1069 | tpu: pwm@e6e80000 { |
| 1070 | compatible = "renesas,tpu-r8a779a0", "renesas,tpu"; |
| 1071 | reg = <0 0xe6e80000 0 0x148>; |
| 1072 | interrupts = <GIC_SPI 515 IRQ_TYPE_LEVEL_HIGH>; |
| 1073 | clocks = <&cpg CPG_MOD 718>; |
| 1074 | power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; |
| 1075 | resets = <&cpg 718>; |
| 1076 | #pwm-cells = <3>; |
| 1077 | status = "disabled"; |
| 1078 | }; |
| 1079 | |
| 1080 | msiof0: spi@e6e90000 { |
| 1081 | compatible = "renesas,msiof-r8a779a0", |
| 1082 | "renesas,rcar-gen4-msiof"; |
| 1083 | reg = <0 0xe6e90000 0 0x0064>; |
| 1084 | interrupts = <GIC_SPI 245 IRQ_TYPE_LEVEL_HIGH>; |
| 1085 | clocks = <&cpg CPG_MOD 618>; |
| 1086 | power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; |
| 1087 | resets = <&cpg 618>; |
| 1088 | dmas = <&dmac1 0x41>, <&dmac1 0x40>; |
| 1089 | dma-names = "tx", "rx"; |
| 1090 | #address-cells = <1>; |
| 1091 | #size-cells = <0>; |
| 1092 | status = "disabled"; |
| 1093 | }; |
| 1094 | |
| 1095 | msiof1: spi@e6ea0000 { |
| 1096 | compatible = "renesas,msiof-r8a779a0", |
| 1097 | "renesas,rcar-gen4-msiof"; |
| 1098 | reg = <0 0xe6ea0000 0 0x0064>; |
| 1099 | interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>; |
| 1100 | clocks = <&cpg CPG_MOD 619>; |
| 1101 | power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; |
| 1102 | resets = <&cpg 619>; |
| 1103 | dmas = <&dmac1 0x43>, <&dmac1 0x42>; |
| 1104 | dma-names = "tx", "rx"; |
| 1105 | #address-cells = <1>; |
| 1106 | #size-cells = <0>; |
| 1107 | status = "disabled"; |
| 1108 | }; |
| 1109 | |
| 1110 | msiof2: spi@e6c00000 { |
| 1111 | compatible = "renesas,msiof-r8a779a0", |
| 1112 | "renesas,rcar-gen4-msiof"; |
| 1113 | reg = <0 0xe6c00000 0 0x0064>; |
| 1114 | interrupts = <GIC_SPI 247 IRQ_TYPE_LEVEL_HIGH>; |
| 1115 | clocks = <&cpg CPG_MOD 620>; |
| 1116 | power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; |
| 1117 | resets = <&cpg 620>; |
| 1118 | dmas = <&dmac1 0x45>, <&dmac1 0x44>; |
| 1119 | dma-names = "tx", "rx"; |
| 1120 | #address-cells = <1>; |
| 1121 | #size-cells = <0>; |
| 1122 | status = "disabled"; |
| 1123 | }; |
| 1124 | |
| 1125 | msiof3: spi@e6c10000 { |
| 1126 | compatible = "renesas,msiof-r8a779a0", |
| 1127 | "renesas,rcar-gen4-msiof"; |
| 1128 | reg = <0 0xe6c10000 0 0x0064>; |
| 1129 | interrupts = <GIC_SPI 248 IRQ_TYPE_LEVEL_HIGH>; |
| 1130 | clocks = <&cpg CPG_MOD 621>; |
| 1131 | power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; |
| 1132 | resets = <&cpg 621>; |
| 1133 | dmas = <&dmac1 0x47>, <&dmac1 0x46>; |
| 1134 | dma-names = "tx", "rx"; |
| 1135 | #address-cells = <1>; |
| 1136 | #size-cells = <0>; |
| 1137 | status = "disabled"; |
| 1138 | }; |
| 1139 | |
| 1140 | msiof4: spi@e6c20000 { |
| 1141 | compatible = "renesas,msiof-r8a779a0", |
| 1142 | "renesas,rcar-gen4-msiof"; |
| 1143 | reg = <0 0xe6c20000 0 0x0064>; |
| 1144 | interrupts = <GIC_SPI 249 IRQ_TYPE_LEVEL_HIGH>; |
| 1145 | clocks = <&cpg CPG_MOD 622>; |
| 1146 | power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; |
| 1147 | resets = <&cpg 622>; |
| 1148 | dmas = <&dmac1 0x49>, <&dmac1 0x48>; |
| 1149 | dma-names = "tx", "rx"; |
| 1150 | #address-cells = <1>; |
| 1151 | #size-cells = <0>; |
| 1152 | status = "disabled"; |
| 1153 | }; |
| 1154 | |
| 1155 | msiof5: spi@e6c28000 { |
| 1156 | compatible = "renesas,msiof-r8a779a0", |
| 1157 | "renesas,rcar-gen4-msiof"; |
| 1158 | reg = <0 0xe6c28000 0 0x0064>; |
| 1159 | interrupts = <GIC_SPI 250 IRQ_TYPE_LEVEL_HIGH>; |
| 1160 | clocks = <&cpg CPG_MOD 623>; |
| 1161 | power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; |
| 1162 | resets = <&cpg 623>; |
| 1163 | dmas = <&dmac1 0x4b>, <&dmac1 0x4a>; |
| 1164 | dma-names = "tx", "rx"; |
| 1165 | #address-cells = <1>; |
| 1166 | #size-cells = <0>; |
| 1167 | status = "disabled"; |
| 1168 | }; |
| 1169 | |
| 1170 | vin00: video@e6ef0000 { |
| 1171 | compatible = "renesas,vin-r8a779a0"; |
| 1172 | reg = <0 0xe6ef0000 0 0x1000>; |
| 1173 | interrupts = <GIC_SPI 160 IRQ_TYPE_LEVEL_HIGH>; |
| 1174 | clocks = <&cpg CPG_MOD 730>; |
| 1175 | power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; |
| 1176 | resets = <&cpg 730>; |
| 1177 | renesas,id = <0>; |
| 1178 | status = "disabled"; |
| 1179 | |
| 1180 | ports { |
| 1181 | #address-cells = <1>; |
| 1182 | #size-cells = <0>; |
| 1183 | |
| 1184 | port@2 { |
| 1185 | #address-cells = <1>; |
| 1186 | #size-cells = <0>; |
| 1187 | |
| 1188 | reg = <2>; |
| 1189 | |
| 1190 | vin00isp0: endpoint@0 { |
| 1191 | reg = <0>; |
| 1192 | remote-endpoint = <&isp0vin00>; |
| 1193 | }; |
| 1194 | }; |
| 1195 | }; |
| 1196 | }; |
| 1197 | |
| 1198 | vin01: video@e6ef1000 { |
| 1199 | compatible = "renesas,vin-r8a779a0"; |
| 1200 | reg = <0 0xe6ef1000 0 0x1000>; |
| 1201 | interrupts = <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>; |
| 1202 | clocks = <&cpg CPG_MOD 731>; |
| 1203 | power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; |
| 1204 | resets = <&cpg 731>; |
| 1205 | renesas,id = <1>; |
| 1206 | status = "disabled"; |
| 1207 | |
| 1208 | ports { |
| 1209 | #address-cells = <1>; |
| 1210 | #size-cells = <0>; |
| 1211 | |
| 1212 | port@2 { |
| 1213 | #address-cells = <1>; |
| 1214 | #size-cells = <0>; |
| 1215 | |
| 1216 | reg = <2>; |
| 1217 | |
| 1218 | vin01isp0: endpoint@0 { |
| 1219 | reg = <0>; |
| 1220 | remote-endpoint = <&isp0vin01>; |
| 1221 | }; |
| 1222 | }; |
| 1223 | }; |
| 1224 | }; |
| 1225 | |
| 1226 | vin02: video@e6ef2000 { |
| 1227 | compatible = "renesas,vin-r8a779a0"; |
| 1228 | reg = <0 0xe6ef2000 0 0x1000>; |
| 1229 | interrupts = <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>; |
| 1230 | clocks = <&cpg CPG_MOD 800>; |
| 1231 | power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; |
| 1232 | resets = <&cpg 800>; |
| 1233 | renesas,id = <2>; |
| 1234 | status = "disabled"; |
| 1235 | |
| 1236 | ports { |
| 1237 | #address-cells = <1>; |
| 1238 | #size-cells = <0>; |
| 1239 | |
| 1240 | port@2 { |
| 1241 | #address-cells = <1>; |
| 1242 | #size-cells = <0>; |
| 1243 | |
| 1244 | reg = <2>; |
| 1245 | |
| 1246 | vin02isp0: endpoint@0 { |
| 1247 | reg = <0>; |
| 1248 | remote-endpoint = <&isp0vin02>; |
| 1249 | }; |
| 1250 | }; |
| 1251 | }; |
| 1252 | }; |
| 1253 | |
| 1254 | vin03: video@e6ef3000 { |
| 1255 | compatible = "renesas,vin-r8a779a0"; |
| 1256 | reg = <0 0xe6ef3000 0 0x1000>; |
| 1257 | interrupts = <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>; |
| 1258 | clocks = <&cpg CPG_MOD 801>; |
| 1259 | power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; |
| 1260 | resets = <&cpg 801>; |
| 1261 | renesas,id = <3>; |
| 1262 | status = "disabled"; |
| 1263 | |
| 1264 | ports { |
| 1265 | #address-cells = <1>; |
| 1266 | #size-cells = <0>; |
| 1267 | |
| 1268 | port@2 { |
| 1269 | #address-cells = <1>; |
| 1270 | #size-cells = <0>; |
| 1271 | |
| 1272 | reg = <2>; |
| 1273 | |
| 1274 | vin03isp0: endpoint@0 { |
| 1275 | reg = <0>; |
| 1276 | remote-endpoint = <&isp0vin03>; |
| 1277 | }; |
| 1278 | }; |
| 1279 | }; |
| 1280 | }; |
| 1281 | |
| 1282 | vin04: video@e6ef4000 { |
| 1283 | compatible = "renesas,vin-r8a779a0"; |
| 1284 | reg = <0 0xe6ef4000 0 0x1000>; |
| 1285 | interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>; |
| 1286 | clocks = <&cpg CPG_MOD 802>; |
| 1287 | power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; |
| 1288 | resets = <&cpg 802>; |
| 1289 | renesas,id = <4>; |
| 1290 | status = "disabled"; |
| 1291 | |
| 1292 | ports { |
| 1293 | #address-cells = <1>; |
| 1294 | #size-cells = <0>; |
| 1295 | |
| 1296 | port@2 { |
| 1297 | #address-cells = <1>; |
| 1298 | #size-cells = <0>; |
| 1299 | |
| 1300 | reg = <2>; |
| 1301 | |
| 1302 | vin04isp0: endpoint@0 { |
| 1303 | reg = <0>; |
| 1304 | remote-endpoint = <&isp0vin04>; |
| 1305 | }; |
| 1306 | }; |
| 1307 | }; |
| 1308 | }; |
| 1309 | |
| 1310 | vin05: video@e6ef5000 { |
| 1311 | compatible = "renesas,vin-r8a779a0"; |
| 1312 | reg = <0 0xe6ef5000 0 0x1000>; |
| 1313 | interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>; |
| 1314 | clocks = <&cpg CPG_MOD 803>; |
| 1315 | power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; |
| 1316 | resets = <&cpg 803>; |
| 1317 | renesas,id = <5>; |
| 1318 | status = "disabled"; |
| 1319 | |
| 1320 | ports { |
| 1321 | #address-cells = <1>; |
| 1322 | #size-cells = <0>; |
| 1323 | |
| 1324 | port@2 { |
| 1325 | #address-cells = <1>; |
| 1326 | #size-cells = <0>; |
| 1327 | |
| 1328 | reg = <2>; |
| 1329 | |
| 1330 | vin05isp0: endpoint@0 { |
| 1331 | reg = <0>; |
| 1332 | remote-endpoint = <&isp0vin05>; |
| 1333 | }; |
| 1334 | }; |
| 1335 | }; |
| 1336 | }; |
| 1337 | |
| 1338 | vin06: video@e6ef6000 { |
| 1339 | compatible = "renesas,vin-r8a779a0"; |
| 1340 | reg = <0 0xe6ef6000 0 0x1000>; |
| 1341 | interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>; |
| 1342 | clocks = <&cpg CPG_MOD 804>; |
| 1343 | power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; |
| 1344 | resets = <&cpg 804>; |
| 1345 | renesas,id = <6>; |
| 1346 | status = "disabled"; |
| 1347 | |
| 1348 | ports { |
| 1349 | #address-cells = <1>; |
| 1350 | #size-cells = <0>; |
| 1351 | |
| 1352 | port@2 { |
| 1353 | #address-cells = <1>; |
| 1354 | #size-cells = <0>; |
| 1355 | |
| 1356 | reg = <2>; |
| 1357 | |
| 1358 | vin06isp0: endpoint@0 { |
| 1359 | reg = <0>; |
| 1360 | remote-endpoint = <&isp0vin06>; |
| 1361 | }; |
| 1362 | }; |
| 1363 | }; |
| 1364 | }; |
| 1365 | |
| 1366 | vin07: video@e6ef7000 { |
| 1367 | compatible = "renesas,vin-r8a779a0"; |
| 1368 | reg = <0 0xe6ef7000 0 0x1000>; |
| 1369 | interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>; |
| 1370 | clocks = <&cpg CPG_MOD 805>; |
| 1371 | power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; |
| 1372 | resets = <&cpg 805>; |
| 1373 | renesas,id = <7>; |
| 1374 | status = "disabled"; |
| 1375 | |
| 1376 | ports { |
| 1377 | #address-cells = <1>; |
| 1378 | #size-cells = <0>; |
| 1379 | |
| 1380 | port@2 { |
| 1381 | #address-cells = <1>; |
| 1382 | #size-cells = <0>; |
| 1383 | |
| 1384 | reg = <2>; |
| 1385 | |
| 1386 | vin07isp0: endpoint@0 { |
| 1387 | reg = <0>; |
| 1388 | remote-endpoint = <&isp0vin07>; |
| 1389 | }; |
| 1390 | }; |
| 1391 | }; |
| 1392 | }; |
| 1393 | |
| 1394 | vin08: video@e6ef8000 { |
| 1395 | compatible = "renesas,vin-r8a779a0"; |
| 1396 | reg = <0 0xe6ef8000 0 0x1000>; |
| 1397 | interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>; |
| 1398 | clocks = <&cpg CPG_MOD 806>; |
| 1399 | power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; |
| 1400 | resets = <&cpg 806>; |
| 1401 | renesas,id = <8>; |
| 1402 | status = "disabled"; |
| 1403 | |
| 1404 | ports { |
| 1405 | #address-cells = <1>; |
| 1406 | #size-cells = <0>; |
| 1407 | |
| 1408 | port@2 { |
| 1409 | #address-cells = <1>; |
| 1410 | #size-cells = <0>; |
| 1411 | |
| 1412 | reg = <2>; |
| 1413 | |
| 1414 | vin08isp1: endpoint@1 { |
| 1415 | reg = <1>; |
| 1416 | remote-endpoint = <&isp1vin08>; |
| 1417 | }; |
| 1418 | }; |
| 1419 | }; |
| 1420 | }; |
| 1421 | |
| 1422 | vin09: video@e6ef9000 { |
| 1423 | compatible = "renesas,vin-r8a779a0"; |
| 1424 | reg = <0 0xe6ef9000 0 0x1000>; |
| 1425 | interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>; |
| 1426 | clocks = <&cpg CPG_MOD 807>; |
| 1427 | power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; |
| 1428 | resets = <&cpg 807>; |
| 1429 | renesas,id = <9>; |
| 1430 | status = "disabled"; |
| 1431 | |
| 1432 | ports { |
| 1433 | #address-cells = <1>; |
| 1434 | #size-cells = <0>; |
| 1435 | |
| 1436 | port@2 { |
| 1437 | #address-cells = <1>; |
| 1438 | #size-cells = <0>; |
| 1439 | |
| 1440 | reg = <2>; |
| 1441 | |
| 1442 | vin09isp1: endpoint@1 { |
| 1443 | reg = <1>; |
| 1444 | remote-endpoint = <&isp1vin09>; |
| 1445 | }; |
| 1446 | }; |
| 1447 | }; |
| 1448 | }; |
| 1449 | |
| 1450 | vin10: video@e6efa000 { |
| 1451 | compatible = "renesas,vin-r8a779a0"; |
| 1452 | reg = <0 0xe6efa000 0 0x1000>; |
| 1453 | interrupts = <GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH>; |
| 1454 | clocks = <&cpg CPG_MOD 808>; |
| 1455 | power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; |
| 1456 | resets = <&cpg 808>; |
| 1457 | renesas,id = <10>; |
| 1458 | status = "disabled"; |
| 1459 | |
| 1460 | ports { |
| 1461 | #address-cells = <1>; |
| 1462 | #size-cells = <0>; |
| 1463 | |
| 1464 | port@2 { |
| 1465 | #address-cells = <1>; |
| 1466 | #size-cells = <0>; |
| 1467 | |
| 1468 | reg = <2>; |
| 1469 | |
| 1470 | vin10isp1: endpoint@1 { |
| 1471 | reg = <1>; |
| 1472 | remote-endpoint = <&isp1vin10>; |
| 1473 | }; |
| 1474 | }; |
| 1475 | }; |
| 1476 | }; |
| 1477 | |
| 1478 | vin11: video@e6efb000 { |
| 1479 | compatible = "renesas,vin-r8a779a0"; |
| 1480 | reg = <0 0xe6efb000 0 0x1000>; |
| 1481 | interrupts = <GIC_SPI 171 IRQ_TYPE_LEVEL_HIGH>; |
| 1482 | clocks = <&cpg CPG_MOD 809>; |
| 1483 | power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; |
| 1484 | resets = <&cpg 809>; |
| 1485 | renesas,id = <11>; |
| 1486 | status = "disabled"; |
| 1487 | |
| 1488 | ports { |
| 1489 | #address-cells = <1>; |
| 1490 | #size-cells = <0>; |
| 1491 | |
| 1492 | port@2 { |
| 1493 | #address-cells = <1>; |
| 1494 | #size-cells = <0>; |
| 1495 | |
| 1496 | reg = <2>; |
| 1497 | |
| 1498 | vin11isp1: endpoint@1 { |
| 1499 | reg = <1>; |
| 1500 | remote-endpoint = <&isp1vin11>; |
| 1501 | }; |
| 1502 | }; |
| 1503 | }; |
| 1504 | }; |
| 1505 | |
| 1506 | vin12: video@e6efc000 { |
| 1507 | compatible = "renesas,vin-r8a779a0"; |
| 1508 | reg = <0 0xe6efc000 0 0x1000>; |
| 1509 | interrupts = <GIC_SPI 172 IRQ_TYPE_LEVEL_HIGH>; |
| 1510 | clocks = <&cpg CPG_MOD 810>; |
| 1511 | power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; |
| 1512 | resets = <&cpg 810>; |
| 1513 | renesas,id = <12>; |
| 1514 | status = "disabled"; |
| 1515 | |
| 1516 | ports { |
| 1517 | #address-cells = <1>; |
| 1518 | #size-cells = <0>; |
| 1519 | |
| 1520 | port@2 { |
| 1521 | #address-cells = <1>; |
| 1522 | #size-cells = <0>; |
| 1523 | |
| 1524 | reg = <2>; |
| 1525 | |
| 1526 | vin12isp1: endpoint@1 { |
| 1527 | reg = <1>; |
| 1528 | remote-endpoint = <&isp1vin12>; |
| 1529 | }; |
| 1530 | }; |
| 1531 | }; |
| 1532 | }; |
| 1533 | |
| 1534 | vin13: video@e6efd000 { |
| 1535 | compatible = "renesas,vin-r8a779a0"; |
| 1536 | reg = <0 0xe6efd000 0 0x1000>; |
| 1537 | interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>; |
| 1538 | clocks = <&cpg CPG_MOD 811>; |
| 1539 | power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; |
| 1540 | resets = <&cpg 811>; |
| 1541 | renesas,id = <13>; |
| 1542 | status = "disabled"; |
| 1543 | |
| 1544 | ports { |
| 1545 | #address-cells = <1>; |
| 1546 | #size-cells = <0>; |
| 1547 | |
| 1548 | port@2 { |
| 1549 | #address-cells = <1>; |
| 1550 | #size-cells = <0>; |
| 1551 | |
| 1552 | reg = <2>; |
| 1553 | |
| 1554 | vin13isp1: endpoint@1 { |
| 1555 | reg = <1>; |
| 1556 | remote-endpoint = <&isp1vin13>; |
| 1557 | }; |
| 1558 | }; |
| 1559 | }; |
| 1560 | }; |
| 1561 | |
| 1562 | vin14: video@e6efe000 { |
| 1563 | compatible = "renesas,vin-r8a779a0"; |
| 1564 | reg = <0 0xe6efe000 0 0x1000>; |
| 1565 | interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>; |
| 1566 | clocks = <&cpg CPG_MOD 812>; |
| 1567 | power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; |
| 1568 | resets = <&cpg 812>; |
| 1569 | renesas,id = <14>; |
| 1570 | status = "disabled"; |
| 1571 | |
| 1572 | ports { |
| 1573 | #address-cells = <1>; |
| 1574 | #size-cells = <0>; |
| 1575 | |
| 1576 | port@2 { |
| 1577 | #address-cells = <1>; |
| 1578 | #size-cells = <0>; |
| 1579 | |
| 1580 | reg = <2>; |
| 1581 | |
| 1582 | vin14isp1: endpoint@1 { |
| 1583 | reg = <1>; |
| 1584 | remote-endpoint = <&isp1vin14>; |
| 1585 | }; |
| 1586 | }; |
| 1587 | }; |
| 1588 | }; |
| 1589 | |
| 1590 | vin15: video@e6eff000 { |
| 1591 | compatible = "renesas,vin-r8a779a0"; |
| 1592 | reg = <0 0xe6eff000 0 0x1000>; |
| 1593 | interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>; |
| 1594 | clocks = <&cpg CPG_MOD 813>; |
| 1595 | power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; |
| 1596 | resets = <&cpg 813>; |
| 1597 | renesas,id = <15>; |
| 1598 | status = "disabled"; |
| 1599 | |
| 1600 | ports { |
| 1601 | #address-cells = <1>; |
| 1602 | #size-cells = <0>; |
| 1603 | |
| 1604 | port@2 { |
| 1605 | #address-cells = <1>; |
| 1606 | #size-cells = <0>; |
| 1607 | |
| 1608 | reg = <2>; |
| 1609 | |
| 1610 | vin15isp1: endpoint@1 { |
| 1611 | reg = <1>; |
| 1612 | remote-endpoint = <&isp1vin15>; |
| 1613 | }; |
| 1614 | }; |
| 1615 | }; |
| 1616 | }; |
| 1617 | |
| 1618 | vin16: video@e6ed0000 { |
| 1619 | compatible = "renesas,vin-r8a779a0"; |
| 1620 | reg = <0 0xe6ed0000 0 0x1000>; |
| 1621 | interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>; |
| 1622 | clocks = <&cpg CPG_MOD 814>; |
| 1623 | power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; |
| 1624 | resets = <&cpg 814>; |
| 1625 | renesas,id = <16>; |
| 1626 | status = "disabled"; |
| 1627 | |
| 1628 | ports { |
| 1629 | #address-cells = <1>; |
| 1630 | #size-cells = <0>; |
| 1631 | |
| 1632 | port@2 { |
| 1633 | #address-cells = <1>; |
| 1634 | #size-cells = <0>; |
| 1635 | |
| 1636 | reg = <2>; |
| 1637 | |
| 1638 | vin16isp2: endpoint@2 { |
| 1639 | reg = <2>; |
| 1640 | remote-endpoint = <&isp2vin16>; |
| 1641 | }; |
| 1642 | }; |
| 1643 | }; |
| 1644 | }; |
| 1645 | |
| 1646 | vin17: video@e6ed1000 { |
| 1647 | compatible = "renesas,vin-r8a779a0"; |
| 1648 | reg = <0 0xe6ed1000 0 0x1000>; |
| 1649 | interrupts = <GIC_SPI 177 IRQ_TYPE_LEVEL_HIGH>; |
| 1650 | clocks = <&cpg CPG_MOD 815>; |
| 1651 | power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; |
| 1652 | resets = <&cpg 815>; |
| 1653 | renesas,id = <17>; |
| 1654 | status = "disabled"; |
| 1655 | |
| 1656 | ports { |
| 1657 | #address-cells = <1>; |
| 1658 | #size-cells = <0>; |
| 1659 | |
| 1660 | port@2 { |
| 1661 | #address-cells = <1>; |
| 1662 | #size-cells = <0>; |
| 1663 | |
| 1664 | reg = <2>; |
| 1665 | |
| 1666 | vin17isp2: endpoint@2 { |
| 1667 | reg = <2>; |
| 1668 | remote-endpoint = <&isp2vin17>; |
| 1669 | }; |
| 1670 | }; |
| 1671 | }; |
| 1672 | }; |
| 1673 | |
| 1674 | vin18: video@e6ed2000 { |
| 1675 | compatible = "renesas,vin-r8a779a0"; |
| 1676 | reg = <0 0xe6ed2000 0 0x1000>; |
| 1677 | interrupts = <GIC_SPI 178 IRQ_TYPE_LEVEL_HIGH>; |
| 1678 | clocks = <&cpg CPG_MOD 816>; |
| 1679 | power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; |
| 1680 | resets = <&cpg 816>; |
| 1681 | renesas,id = <18>; |
| 1682 | status = "disabled"; |
| 1683 | |
| 1684 | ports { |
| 1685 | #address-cells = <1>; |
| 1686 | #size-cells = <0>; |
| 1687 | |
| 1688 | port@2 { |
| 1689 | #address-cells = <1>; |
| 1690 | #size-cells = <0>; |
| 1691 | |
| 1692 | reg = <2>; |
| 1693 | |
| 1694 | vin18isp2: endpoint@2 { |
| 1695 | reg = <2>; |
| 1696 | remote-endpoint = <&isp2vin18>; |
| 1697 | }; |
| 1698 | }; |
| 1699 | }; |
| 1700 | }; |
| 1701 | |
| 1702 | vin19: video@e6ed3000 { |
| 1703 | compatible = "renesas,vin-r8a779a0"; |
| 1704 | reg = <0 0xe6ed3000 0 0x1000>; |
| 1705 | interrupts = <GIC_SPI 179 IRQ_TYPE_LEVEL_HIGH>; |
| 1706 | clocks = <&cpg CPG_MOD 817>; |
| 1707 | power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; |
| 1708 | resets = <&cpg 817>; |
| 1709 | renesas,id = <19>; |
| 1710 | status = "disabled"; |
| 1711 | |
| 1712 | ports { |
| 1713 | #address-cells = <1>; |
| 1714 | #size-cells = <0>; |
| 1715 | |
| 1716 | port@2 { |
| 1717 | #address-cells = <1>; |
| 1718 | #size-cells = <0>; |
| 1719 | |
| 1720 | reg = <2>; |
| 1721 | |
| 1722 | vin19isp2: endpoint@2 { |
| 1723 | reg = <2>; |
| 1724 | remote-endpoint = <&isp2vin19>; |
| 1725 | }; |
| 1726 | }; |
| 1727 | }; |
| 1728 | }; |
| 1729 | |
| 1730 | vin20: video@e6ed4000 { |
| 1731 | compatible = "renesas,vin-r8a779a0"; |
| 1732 | reg = <0 0xe6ed4000 0 0x1000>; |
| 1733 | interrupts = <GIC_SPI 180 IRQ_TYPE_LEVEL_HIGH>; |
| 1734 | clocks = <&cpg CPG_MOD 818>; |
| 1735 | power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; |
| 1736 | resets = <&cpg 818>; |
| 1737 | renesas,id = <20>; |
| 1738 | status = "disabled"; |
| 1739 | |
| 1740 | ports { |
| 1741 | #address-cells = <1>; |
| 1742 | #size-cells = <0>; |
| 1743 | |
| 1744 | port@2 { |
| 1745 | #address-cells = <1>; |
| 1746 | #size-cells = <0>; |
| 1747 | |
| 1748 | reg = <2>; |
| 1749 | |
| 1750 | vin20isp2: endpoint@2 { |
| 1751 | reg = <2>; |
| 1752 | remote-endpoint = <&isp2vin20>; |
| 1753 | }; |
| 1754 | }; |
| 1755 | }; |
| 1756 | }; |
| 1757 | |
| 1758 | vin21: video@e6ed5000 { |
| 1759 | compatible = "renesas,vin-r8a779a0"; |
| 1760 | reg = <0 0xe6ed5000 0 0x1000>; |
| 1761 | interrupts = <GIC_SPI 181 IRQ_TYPE_LEVEL_HIGH>; |
| 1762 | clocks = <&cpg CPG_MOD 819>; |
| 1763 | power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; |
| 1764 | resets = <&cpg 819>; |
| 1765 | renesas,id = <21>; |
| 1766 | status = "disabled"; |
| 1767 | |
| 1768 | ports { |
| 1769 | #address-cells = <1>; |
| 1770 | #size-cells = <0>; |
| 1771 | |
| 1772 | port@2 { |
| 1773 | #address-cells = <1>; |
| 1774 | #size-cells = <0>; |
| 1775 | |
| 1776 | reg = <2>; |
| 1777 | |
| 1778 | vin21isp2: endpoint@2 { |
| 1779 | reg = <2>; |
| 1780 | remote-endpoint = <&isp2vin21>; |
| 1781 | }; |
| 1782 | }; |
| 1783 | }; |
| 1784 | }; |
| 1785 | |
| 1786 | vin22: video@e6ed6000 { |
| 1787 | compatible = "renesas,vin-r8a779a0"; |
| 1788 | reg = <0 0xe6ed6000 0 0x1000>; |
| 1789 | interrupts = <GIC_SPI 182 IRQ_TYPE_LEVEL_HIGH>; |
| 1790 | clocks = <&cpg CPG_MOD 820>; |
| 1791 | power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; |
| 1792 | resets = <&cpg 820>; |
| 1793 | renesas,id = <22>; |
| 1794 | status = "disabled"; |
| 1795 | |
| 1796 | ports { |
| 1797 | #address-cells = <1>; |
| 1798 | #size-cells = <0>; |
| 1799 | |
| 1800 | port@2 { |
| 1801 | #address-cells = <1>; |
| 1802 | #size-cells = <0>; |
| 1803 | |
| 1804 | reg = <2>; |
| 1805 | |
| 1806 | vin22isp2: endpoint@2 { |
| 1807 | reg = <2>; |
| 1808 | remote-endpoint = <&isp2vin22>; |
| 1809 | }; |
| 1810 | }; |
| 1811 | }; |
| 1812 | }; |
| 1813 | |
| 1814 | vin23: video@e6ed7000 { |
| 1815 | compatible = "renesas,vin-r8a779a0"; |
| 1816 | reg = <0 0xe6ed7000 0 0x1000>; |
| 1817 | interrupts = <GIC_SPI 183 IRQ_TYPE_LEVEL_HIGH>; |
| 1818 | clocks = <&cpg CPG_MOD 821>; |
| 1819 | power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; |
| 1820 | resets = <&cpg 821>; |
| 1821 | renesas,id = <23>; |
| 1822 | status = "disabled"; |
| 1823 | |
| 1824 | ports { |
| 1825 | #address-cells = <1>; |
| 1826 | #size-cells = <0>; |
| 1827 | |
| 1828 | port@2 { |
| 1829 | #address-cells = <1>; |
| 1830 | #size-cells = <0>; |
| 1831 | |
| 1832 | reg = <2>; |
| 1833 | |
| 1834 | vin23isp2: endpoint@2 { |
| 1835 | reg = <2>; |
| 1836 | remote-endpoint = <&isp2vin23>; |
| 1837 | }; |
| 1838 | }; |
| 1839 | }; |
| 1840 | }; |
| 1841 | |
| 1842 | vin24: video@e6ed8000 { |
| 1843 | compatible = "renesas,vin-r8a779a0"; |
| 1844 | reg = <0 0xe6ed8000 0 0x1000>; |
| 1845 | interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>; |
| 1846 | clocks = <&cpg CPG_MOD 822>; |
| 1847 | power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; |
| 1848 | resets = <&cpg 822>; |
| 1849 | renesas,id = <24>; |
| 1850 | status = "disabled"; |
| 1851 | |
| 1852 | ports { |
| 1853 | #address-cells = <1>; |
| 1854 | #size-cells = <0>; |
| 1855 | |
| 1856 | port@2 { |
| 1857 | #address-cells = <1>; |
| 1858 | #size-cells = <0>; |
| 1859 | |
| 1860 | reg = <2>; |
| 1861 | |
| 1862 | vin24isp3: endpoint@3 { |
| 1863 | reg = <3>; |
| 1864 | remote-endpoint = <&isp3vin24>; |
| 1865 | }; |
| 1866 | }; |
| 1867 | }; |
| 1868 | }; |
| 1869 | |
| 1870 | vin25: video@e6ed9000 { |
| 1871 | compatible = "renesas,vin-r8a779a0"; |
| 1872 | reg = <0 0xe6ed9000 0 0x1000>; |
| 1873 | interrupts = <GIC_SPI 185 IRQ_TYPE_LEVEL_HIGH>; |
| 1874 | clocks = <&cpg CPG_MOD 823>; |
| 1875 | power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; |
| 1876 | resets = <&cpg 823>; |
| 1877 | renesas,id = <25>; |
| 1878 | status = "disabled"; |
| 1879 | |
| 1880 | ports { |
| 1881 | #address-cells = <1>; |
| 1882 | #size-cells = <0>; |
| 1883 | |
| 1884 | port@2 { |
| 1885 | #address-cells = <1>; |
| 1886 | #size-cells = <0>; |
| 1887 | |
| 1888 | reg = <2>; |
| 1889 | |
| 1890 | vin25isp3: endpoint@3 { |
| 1891 | reg = <3>; |
| 1892 | remote-endpoint = <&isp3vin25>; |
| 1893 | }; |
| 1894 | }; |
| 1895 | }; |
| 1896 | }; |
| 1897 | |
| 1898 | vin26: video@e6eda000 { |
| 1899 | compatible = "renesas,vin-r8a779a0"; |
| 1900 | reg = <0 0xe6eda000 0 0x1000>; |
| 1901 | interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>; |
| 1902 | clocks = <&cpg CPG_MOD 824>; |
| 1903 | power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; |
| 1904 | resets = <&cpg 824>; |
| 1905 | renesas,id = <26>; |
| 1906 | status = "disabled"; |
| 1907 | |
| 1908 | ports { |
| 1909 | #address-cells = <1>; |
| 1910 | #size-cells = <0>; |
| 1911 | |
| 1912 | port@2 { |
| 1913 | #address-cells = <1>; |
| 1914 | #size-cells = <0>; |
| 1915 | |
| 1916 | reg = <2>; |
| 1917 | |
| 1918 | vin26isp3: endpoint@3 { |
| 1919 | reg = <3>; |
| 1920 | remote-endpoint = <&isp3vin26>; |
| 1921 | }; |
| 1922 | }; |
| 1923 | }; |
| 1924 | }; |
| 1925 | |
| 1926 | vin27: video@e6edb000 { |
| 1927 | compatible = "renesas,vin-r8a779a0"; |
| 1928 | reg = <0 0xe6edb000 0 0x1000>; |
| 1929 | interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>; |
| 1930 | clocks = <&cpg CPG_MOD 825>; |
| 1931 | power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; |
| 1932 | resets = <&cpg 825>; |
| 1933 | renesas,id = <27>; |
| 1934 | status = "disabled"; |
| 1935 | |
| 1936 | ports { |
| 1937 | #address-cells = <1>; |
| 1938 | #size-cells = <0>; |
| 1939 | |
| 1940 | port@2 { |
| 1941 | #address-cells = <1>; |
| 1942 | #size-cells = <0>; |
| 1943 | |
| 1944 | reg = <2>; |
| 1945 | |
| 1946 | vin27isp3: endpoint@3 { |
| 1947 | reg = <3>; |
| 1948 | remote-endpoint = <&isp3vin27>; |
| 1949 | }; |
| 1950 | }; |
| 1951 | }; |
| 1952 | }; |
| 1953 | |
| 1954 | vin28: video@e6edc000 { |
| 1955 | compatible = "renesas,vin-r8a779a0"; |
| 1956 | reg = <0 0xe6edc000 0 0x1000>; |
| 1957 | interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>; |
| 1958 | clocks = <&cpg CPG_MOD 826>; |
| 1959 | power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; |
| 1960 | resets = <&cpg 826>; |
| 1961 | renesas,id = <28>; |
| 1962 | status = "disabled"; |
| 1963 | |
| 1964 | ports { |
| 1965 | #address-cells = <1>; |
| 1966 | #size-cells = <0>; |
| 1967 | |
| 1968 | port@2 { |
| 1969 | #address-cells = <1>; |
| 1970 | #size-cells = <0>; |
| 1971 | |
| 1972 | reg = <2>; |
| 1973 | |
| 1974 | vin28isp3: endpoint@3 { |
| 1975 | reg = <3>; |
| 1976 | remote-endpoint = <&isp3vin28>; |
| 1977 | }; |
| 1978 | }; |
| 1979 | }; |
| 1980 | }; |
| 1981 | |
| 1982 | vin29: video@e6edd000 { |
| 1983 | compatible = "renesas,vin-r8a779a0"; |
| 1984 | reg = <0 0xe6edd000 0 0x1000>; |
| 1985 | interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>; |
| 1986 | clocks = <&cpg CPG_MOD 827>; |
| 1987 | power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; |
| 1988 | resets = <&cpg 827>; |
| 1989 | renesas,id = <29>; |
| 1990 | status = "disabled"; |
| 1991 | |
| 1992 | ports { |
| 1993 | #address-cells = <1>; |
| 1994 | #size-cells = <0>; |
| 1995 | |
| 1996 | port@2 { |
| 1997 | #address-cells = <1>; |
| 1998 | #size-cells = <0>; |
| 1999 | |
| 2000 | reg = <2>; |
| 2001 | |
| 2002 | vin29isp3: endpoint@3 { |
| 2003 | reg = <3>; |
| 2004 | remote-endpoint = <&isp3vin29>; |
| 2005 | }; |
| 2006 | }; |
| 2007 | }; |
| 2008 | }; |
| 2009 | |
| 2010 | vin30: video@e6ede000 { |
| 2011 | compatible = "renesas,vin-r8a779a0"; |
| 2012 | reg = <0 0xe6ede000 0 0x1000>; |
| 2013 | interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>; |
| 2014 | clocks = <&cpg CPG_MOD 828>; |
| 2015 | power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; |
| 2016 | resets = <&cpg 828>; |
| 2017 | renesas,id = <30>; |
| 2018 | status = "disabled"; |
| 2019 | |
| 2020 | ports { |
| 2021 | #address-cells = <1>; |
| 2022 | #size-cells = <0>; |
| 2023 | |
| 2024 | port@2 { |
| 2025 | #address-cells = <1>; |
| 2026 | #size-cells = <0>; |
| 2027 | |
| 2028 | reg = <2>; |
| 2029 | |
| 2030 | vin30isp3: endpoint@3 { |
| 2031 | reg = <3>; |
| 2032 | remote-endpoint = <&isp3vin30>; |
| 2033 | }; |
| 2034 | }; |
| 2035 | }; |
| 2036 | }; |
| 2037 | |
| 2038 | vin31: video@e6edf000 { |
| 2039 | compatible = "renesas,vin-r8a779a0"; |
| 2040 | reg = <0 0xe6edf000 0 0x1000>; |
| 2041 | interrupts = <GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>; |
| 2042 | clocks = <&cpg CPG_MOD 829>; |
| 2043 | power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; |
| 2044 | resets = <&cpg 829>; |
| 2045 | renesas,id = <31>; |
| 2046 | status = "disabled"; |
| 2047 | |
| 2048 | ports { |
| 2049 | #address-cells = <1>; |
| 2050 | #size-cells = <0>; |
| 2051 | |
| 2052 | port@2 { |
| 2053 | #address-cells = <1>; |
| 2054 | #size-cells = <0>; |
| 2055 | |
| 2056 | reg = <2>; |
| 2057 | |
| 2058 | vin31isp3: endpoint@3 { |
| 2059 | reg = <3>; |
| 2060 | remote-endpoint = <&isp3vin31>; |
| 2061 | }; |
| 2062 | }; |
| 2063 | }; |
| 2064 | }; |
| 2065 | |
| 2066 | dmac1: dma-controller@e7350000 { |
| 2067 | compatible = "renesas,dmac-r8a779a0", |
| 2068 | "renesas,rcar-gen4-dmac"; |
| 2069 | reg = <0 0xe7350000 0 0x1000>, |
| 2070 | <0 0xe7300000 0 0x10000>; |
| 2071 | interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>, |
| 2072 | <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>, |
| 2073 | <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>, |
| 2074 | <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>, |
| 2075 | <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>, |
| 2076 | <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>, |
| 2077 | <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>, |
| 2078 | <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>, |
| 2079 | <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>, |
| 2080 | <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>, |
| 2081 | <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>, |
| 2082 | <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>, |
| 2083 | <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>, |
| 2084 | <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>, |
| 2085 | <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>, |
| 2086 | <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>, |
| 2087 | <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>; |
| 2088 | interrupt-names = "error", |
| 2089 | "ch0", "ch1", "ch2", "ch3", "ch4", |
| 2090 | "ch5", "ch6", "ch7", "ch8", "ch9", |
| 2091 | "ch10", "ch11", "ch12", "ch13", |
| 2092 | "ch14", "ch15"; |
| 2093 | clocks = <&cpg CPG_MOD 709>; |
| 2094 | clock-names = "fck"; |
| 2095 | power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; |
| 2096 | resets = <&cpg 709>; |
| 2097 | #dma-cells = <1>; |
| 2098 | dma-channels = <16>; |
| 2099 | }; |
| 2100 | |
| 2101 | dmac2: dma-controller@e7351000 { |
| 2102 | compatible = "renesas,dmac-r8a779a0", |
| 2103 | "renesas,rcar-gen4-dmac"; |
| 2104 | reg = <0 0xe7351000 0 0x1000>, |
| 2105 | <0 0xe7310000 0 0x10000>; |
| 2106 | interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>, |
| 2107 | <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>, |
| 2108 | <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>, |
| 2109 | <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>, |
| 2110 | <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>, |
| 2111 | <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>, |
| 2112 | <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>, |
| 2113 | <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>, |
| 2114 | <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>; |
| 2115 | interrupt-names = "error", |
| 2116 | "ch0", "ch1", "ch2", "ch3", "ch4", |
| 2117 | "ch5", "ch6", "ch7"; |
| 2118 | clocks = <&cpg CPG_MOD 710>; |
| 2119 | clock-names = "fck"; |
| 2120 | power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; |
| 2121 | resets = <&cpg 710>; |
| 2122 | #dma-cells = <1>; |
| 2123 | dma-channels = <8>; |
| 2124 | }; |
| 2125 | |
| 2126 | mmc0: mmc@ee140000 { |
| 2127 | compatible = "renesas,sdhi-r8a779a0", |
| 2128 | "renesas,rcar-gen4-sdhi"; |
| 2129 | reg = <0 0xee140000 0 0x2000>; |
| 2130 | interrupts = <GIC_SPI 236 IRQ_TYPE_LEVEL_HIGH>; |
| 2131 | clocks = <&cpg CPG_MOD 706>, <&cpg CPG_CORE R8A779A0_CLK_SD0H>; |
| 2132 | clock-names = "core", "clkh"; |
| 2133 | power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; |
| 2134 | resets = <&cpg 706>; |
| 2135 | max-frequency = <200000000>; |
| 2136 | iommus = <&ipmmu_ds0 32>; |
| 2137 | status = "disabled"; |
| 2138 | }; |
| 2139 | |
| 2140 | rpc: spi@ee200000 { |
| 2141 | compatible = "renesas,r8a779a0-rpc-if", |
| 2142 | "renesas,rcar-gen3-rpc-if"; |
| 2143 | reg = <0 0xee200000 0 0x200>, |
| 2144 | <0 0x08000000 0 0x04000000>, |
| 2145 | <0 0xee208000 0 0x100>; |
| 2146 | reg-names = "regs", "dirmap", "wbuf"; |
| 2147 | interrupts = <GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>; |
| 2148 | clocks = <&cpg CPG_MOD 629>; |
| 2149 | power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; |
| 2150 | resets = <&cpg 629>; |
| 2151 | #address-cells = <1>; |
| 2152 | #size-cells = <0>; |
| 2153 | status = "disabled"; |
| 2154 | }; |
| 2155 | |
| 2156 | ipmmu_rt0: iommu@ee480000 { |
| 2157 | compatible = "renesas,ipmmu-r8a779a0", |
| 2158 | "renesas,rcar-gen4-ipmmu-vmsa"; |
| 2159 | reg = <0 0xee480000 0 0x20000>; |
| 2160 | renesas,ipmmu-main = <&ipmmu_mm>; |
| 2161 | power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; |
| 2162 | #iommu-cells = <1>; |
| 2163 | }; |
| 2164 | |
| 2165 | ipmmu_rt1: iommu@ee4c0000 { |
| 2166 | compatible = "renesas,ipmmu-r8a779a0", |
| 2167 | "renesas,rcar-gen4-ipmmu-vmsa"; |
| 2168 | reg = <0 0xee4c0000 0 0x20000>; |
| 2169 | renesas,ipmmu-main = <&ipmmu_mm>; |
| 2170 | power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; |
| 2171 | #iommu-cells = <1>; |
| 2172 | }; |
| 2173 | |
| 2174 | ipmmu_ds0: iommu@eed00000 { |
| 2175 | compatible = "renesas,ipmmu-r8a779a0", |
| 2176 | "renesas,rcar-gen4-ipmmu-vmsa"; |
| 2177 | reg = <0 0xeed00000 0 0x20000>; |
| 2178 | renesas,ipmmu-main = <&ipmmu_mm>; |
| 2179 | power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; |
| 2180 | #iommu-cells = <1>; |
| 2181 | }; |
| 2182 | |
| 2183 | ipmmu_ds1: iommu@eed40000 { |
| 2184 | compatible = "renesas,ipmmu-r8a779a0", |
| 2185 | "renesas,rcar-gen4-ipmmu-vmsa"; |
| 2186 | reg = <0 0xeed40000 0 0x20000>; |
| 2187 | renesas,ipmmu-main = <&ipmmu_mm>; |
| 2188 | power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; |
| 2189 | #iommu-cells = <1>; |
| 2190 | }; |
| 2191 | |
| 2192 | ipmmu_ir: iommu@eed80000 { |
| 2193 | compatible = "renesas,ipmmu-r8a779a0", |
| 2194 | "renesas,rcar-gen4-ipmmu-vmsa"; |
| 2195 | reg = <0 0xeed80000 0 0x20000>; |
| 2196 | renesas,ipmmu-main = <&ipmmu_mm>; |
| 2197 | power-domains = <&sysc R8A779A0_PD_A3IR>; |
| 2198 | #iommu-cells = <1>; |
| 2199 | }; |
| 2200 | |
| 2201 | ipmmu_vc0: iommu@eedc0000 { |
| 2202 | compatible = "renesas,ipmmu-r8a779a0", |
| 2203 | "renesas,rcar-gen4-ipmmu-vmsa"; |
| 2204 | reg = <0 0xeedc0000 0 0x20000>; |
| 2205 | renesas,ipmmu-main = <&ipmmu_mm>; |
| 2206 | power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; |
| 2207 | #iommu-cells = <1>; |
| 2208 | }; |
| 2209 | |
| 2210 | ipmmu_vi0: iommu@eee80000 { |
| 2211 | compatible = "renesas,ipmmu-r8a779a0", |
| 2212 | "renesas,rcar-gen4-ipmmu-vmsa"; |
| 2213 | reg = <0 0xeee80000 0 0x20000>; |
| 2214 | renesas,ipmmu-main = <&ipmmu_mm>; |
| 2215 | power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; |
| 2216 | #iommu-cells = <1>; |
| 2217 | }; |
| 2218 | |
| 2219 | ipmmu_vi1: iommu@eeec0000 { |
| 2220 | compatible = "renesas,ipmmu-r8a779a0", |
| 2221 | "renesas,rcar-gen4-ipmmu-vmsa"; |
| 2222 | reg = <0 0xeeec0000 0 0x20000>; |
| 2223 | renesas,ipmmu-main = <&ipmmu_mm>; |
| 2224 | power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; |
| 2225 | #iommu-cells = <1>; |
| 2226 | }; |
| 2227 | |
| 2228 | ipmmu_3dg: iommu@eee00000 { |
| 2229 | compatible = "renesas,ipmmu-r8a779a0", |
| 2230 | "renesas,rcar-gen4-ipmmu-vmsa"; |
| 2231 | reg = <0 0xeee00000 0 0x20000>; |
| 2232 | renesas,ipmmu-main = <&ipmmu_mm>; |
| 2233 | power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; |
| 2234 | #iommu-cells = <1>; |
| 2235 | }; |
| 2236 | |
| 2237 | ipmmu_vip0: iommu@eef00000 { |
| 2238 | compatible = "renesas,ipmmu-r8a779a0", |
| 2239 | "renesas,rcar-gen4-ipmmu-vmsa"; |
| 2240 | reg = <0 0xeef00000 0 0x20000>; |
| 2241 | renesas,ipmmu-main = <&ipmmu_mm>; |
| 2242 | power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; |
| 2243 | #iommu-cells = <1>; |
| 2244 | }; |
| 2245 | |
| 2246 | ipmmu_vip1: iommu@eef40000 { |
| 2247 | compatible = "renesas,ipmmu-r8a779a0", |
| 2248 | "renesas,rcar-gen4-ipmmu-vmsa"; |
| 2249 | reg = <0 0xeef40000 0 0x20000>; |
| 2250 | renesas,ipmmu-main = <&ipmmu_mm>; |
| 2251 | power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; |
| 2252 | #iommu-cells = <1>; |
| 2253 | }; |
| 2254 | |
| 2255 | ipmmu_mm: iommu@eefc0000 { |
| 2256 | compatible = "renesas,ipmmu-r8a779a0", |
| 2257 | "renesas,rcar-gen4-ipmmu-vmsa"; |
| 2258 | reg = <0 0xeefc0000 0 0x20000>; |
| 2259 | interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>, |
| 2260 | <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>; |
| 2261 | power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; |
| 2262 | #iommu-cells = <1>; |
| 2263 | }; |
| 2264 | |
| 2265 | gic: interrupt-controller@f1000000 { |
| 2266 | compatible = "arm,gic-v3"; |
| 2267 | #interrupt-cells = <3>; |
| 2268 | #address-cells = <0>; |
| 2269 | interrupt-controller; |
| 2270 | reg = <0x0 0xf1000000 0 0x20000>, |
| 2271 | <0x0 0xf1060000 0 0x110000>; |
| 2272 | interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>; |
| 2273 | }; |
| 2274 | |
| 2275 | fcpvd0: fcp@fea10000 { |
| 2276 | compatible = "renesas,fcpv"; |
| 2277 | reg = <0 0xfea10000 0 0x200>; |
| 2278 | clocks = <&cpg CPG_MOD 508>; |
| 2279 | power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; |
| 2280 | resets = <&cpg 508>; |
| 2281 | }; |
| 2282 | |
| 2283 | fcpvd1: fcp@fea11000 { |
| 2284 | compatible = "renesas,fcpv"; |
| 2285 | reg = <0 0xfea11000 0 0x200>; |
| 2286 | clocks = <&cpg CPG_MOD 509>; |
| 2287 | power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; |
| 2288 | resets = <&cpg 509>; |
| 2289 | }; |
| 2290 | |
| 2291 | vspd0: vsp@fea20000 { |
| 2292 | compatible = "renesas,vsp2"; |
| 2293 | reg = <0 0xfea20000 0 0x5000>; |
| 2294 | interrupts = <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>; |
| 2295 | clocks = <&cpg CPG_MOD 830>; |
| 2296 | power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; |
| 2297 | resets = <&cpg 830>; |
| 2298 | |
| 2299 | renesas,fcp = <&fcpvd0>; |
| 2300 | }; |
| 2301 | |
| 2302 | vspd1: vsp@fea28000 { |
| 2303 | compatible = "renesas,vsp2"; |
| 2304 | reg = <0 0xfea28000 0 0x5000>; |
| 2305 | interrupts = <GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>; |
| 2306 | clocks = <&cpg CPG_MOD 831>; |
| 2307 | power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; |
| 2308 | resets = <&cpg 831>; |
| 2309 | |
| 2310 | renesas,fcp = <&fcpvd1>; |
| 2311 | }; |
| 2312 | |
| 2313 | csi40: csi2@feaa0000 { |
| 2314 | compatible = "renesas,r8a779a0-csi2"; |
| 2315 | reg = <0 0xfeaa0000 0 0x10000>; |
| 2316 | interrupts = <GIC_SPI 192 IRQ_TYPE_LEVEL_HIGH>; |
| 2317 | clocks = <&cpg CPG_MOD 331>; |
| 2318 | power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; |
| 2319 | resets = <&cpg 331>; |
| 2320 | status = "disabled"; |
| 2321 | |
| 2322 | ports { |
| 2323 | #address-cells = <1>; |
| 2324 | #size-cells = <0>; |
| 2325 | |
| 2326 | port@0 { |
| 2327 | reg = <0>; |
| 2328 | }; |
| 2329 | |
| 2330 | port@1 { |
| 2331 | reg = <1>; |
| 2332 | csi40isp0: endpoint { |
| 2333 | remote-endpoint = <&isp0csi40>; |
| 2334 | }; |
| 2335 | }; |
| 2336 | }; |
| 2337 | }; |
| 2338 | |
| 2339 | csi41: csi2@feab0000 { |
| 2340 | compatible = "renesas,r8a779a0-csi2"; |
| 2341 | reg = <0 0xfeab0000 0 0x10000>; |
| 2342 | interrupts = <GIC_SPI 193 IRQ_TYPE_LEVEL_HIGH>; |
| 2343 | clocks = <&cpg CPG_MOD 400>; |
| 2344 | power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; |
| 2345 | resets = <&cpg 400>; |
| 2346 | status = "disabled"; |
| 2347 | |
| 2348 | ports { |
| 2349 | #address-cells = <1>; |
| 2350 | #size-cells = <0>; |
| 2351 | |
| 2352 | port@0 { |
| 2353 | reg = <0>; |
| 2354 | }; |
| 2355 | |
| 2356 | port@1 { |
| 2357 | reg = <1>; |
| 2358 | csi41isp1: endpoint { |
| 2359 | remote-endpoint = <&isp1csi41>; |
| 2360 | }; |
| 2361 | }; |
| 2362 | }; |
| 2363 | }; |
| 2364 | |
| 2365 | csi42: csi2@fed60000 { |
| 2366 | compatible = "renesas,r8a779a0-csi2"; |
| 2367 | reg = <0 0xfed60000 0 0x10000>; |
| 2368 | interrupts = <GIC_SPI 194 IRQ_TYPE_LEVEL_HIGH>; |
| 2369 | clocks = <&cpg CPG_MOD 401>; |
| 2370 | power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; |
| 2371 | resets = <&cpg 401>; |
| 2372 | status = "disabled"; |
| 2373 | |
| 2374 | ports { |
| 2375 | #address-cells = <1>; |
| 2376 | #size-cells = <0>; |
| 2377 | |
| 2378 | port@0 { |
| 2379 | reg = <0>; |
| 2380 | }; |
| 2381 | |
| 2382 | port@1 { |
| 2383 | reg = <1>; |
| 2384 | csi42isp2: endpoint { |
| 2385 | remote-endpoint = <&isp2csi42>; |
| 2386 | }; |
| 2387 | }; |
| 2388 | }; |
| 2389 | }; |
| 2390 | |
| 2391 | csi43: csi2@fed70000 { |
| 2392 | compatible = "renesas,r8a779a0-csi2"; |
| 2393 | reg = <0 0xfed70000 0 0x10000>; |
| 2394 | interrupts = <GIC_SPI 195 IRQ_TYPE_LEVEL_HIGH>; |
| 2395 | clocks = <&cpg CPG_MOD 402>; |
| 2396 | power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; |
| 2397 | resets = <&cpg 402>; |
| 2398 | status = "disabled"; |
| 2399 | |
| 2400 | ports { |
| 2401 | #address-cells = <1>; |
| 2402 | #size-cells = <0>; |
| 2403 | |
| 2404 | port@0 { |
| 2405 | reg = <0>; |
| 2406 | }; |
| 2407 | |
| 2408 | port@1 { |
| 2409 | reg = <1>; |
| 2410 | csi43isp3: endpoint { |
| 2411 | remote-endpoint = <&isp3csi43>; |
| 2412 | }; |
| 2413 | }; |
| 2414 | }; |
| 2415 | }; |
| 2416 | |
| 2417 | du: display@feb00000 { |
| 2418 | compatible = "renesas,du-r8a779a0"; |
| 2419 | reg = <0 0xfeb00000 0 0x40000>; |
| 2420 | interrupts = <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>, |
| 2421 | <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>; |
| 2422 | clocks = <&cpg CPG_MOD 411>; |
| 2423 | clock-names = "du.0"; |
| 2424 | power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; |
| 2425 | resets = <&cpg 411>; |
| 2426 | reset-names = "du.0"; |
| 2427 | renesas,vsps = <&vspd0 0>, <&vspd1 0>; |
| 2428 | |
| 2429 | status = "disabled"; |
| 2430 | |
| 2431 | ports { |
| 2432 | #address-cells = <1>; |
| 2433 | #size-cells = <0>; |
| 2434 | |
| 2435 | port@0 { |
| 2436 | reg = <0>; |
| 2437 | du_out_dsi0: endpoint { |
| 2438 | remote-endpoint = <&dsi0_in>; |
| 2439 | }; |
| 2440 | }; |
| 2441 | |
| 2442 | port@1 { |
| 2443 | reg = <1>; |
| 2444 | du_out_dsi1: endpoint { |
| 2445 | remote-endpoint = <&dsi1_in>; |
| 2446 | }; |
| 2447 | }; |
| 2448 | }; |
| 2449 | }; |
| 2450 | |
| 2451 | isp0: isp@fed00000 { |
| 2452 | compatible = "renesas,r8a779a0-isp"; |
| 2453 | reg = <0 0xfed00000 0 0x10000>; |
| 2454 | interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>; |
| 2455 | clocks = <&cpg CPG_MOD 612>; |
| 2456 | power-domains = <&sysc R8A779A0_PD_A3ISP01>; |
| 2457 | resets = <&cpg 612>; |
| 2458 | status = "disabled"; |
| 2459 | |
| 2460 | ports { |
| 2461 | #address-cells = <1>; |
| 2462 | #size-cells = <0>; |
| 2463 | |
| 2464 | port@0 { |
| 2465 | #address-cells = <1>; |
| 2466 | #size-cells = <0>; |
| 2467 | |
| 2468 | reg = <0>; |
| 2469 | |
| 2470 | isp0csi40: endpoint@0 { |
| 2471 | reg = <0>; |
| 2472 | remote-endpoint = <&csi40isp0>; |
| 2473 | }; |
| 2474 | }; |
| 2475 | |
| 2476 | port@1 { |
| 2477 | reg = <1>; |
| 2478 | isp0vin00: endpoint { |
| 2479 | remote-endpoint = <&vin00isp0>; |
| 2480 | }; |
| 2481 | }; |
| 2482 | |
| 2483 | port@2 { |
| 2484 | reg = <2>; |
| 2485 | isp0vin01: endpoint { |
| 2486 | remote-endpoint = <&vin01isp0>; |
| 2487 | }; |
| 2488 | }; |
| 2489 | |
| 2490 | port@3 { |
| 2491 | reg = <3>; |
| 2492 | isp0vin02: endpoint { |
| 2493 | remote-endpoint = <&vin02isp0>; |
| 2494 | }; |
| 2495 | }; |
| 2496 | |
| 2497 | port@4 { |
| 2498 | reg = <4>; |
| 2499 | isp0vin03: endpoint { |
| 2500 | remote-endpoint = <&vin03isp0>; |
| 2501 | }; |
| 2502 | }; |
| 2503 | |
| 2504 | port@5 { |
| 2505 | reg = <5>; |
| 2506 | isp0vin04: endpoint { |
| 2507 | remote-endpoint = <&vin04isp0>; |
| 2508 | }; |
| 2509 | }; |
| 2510 | |
| 2511 | port@6 { |
| 2512 | reg = <6>; |
| 2513 | isp0vin05: endpoint { |
| 2514 | remote-endpoint = <&vin05isp0>; |
| 2515 | }; |
| 2516 | }; |
| 2517 | |
| 2518 | port@7 { |
| 2519 | reg = <7>; |
| 2520 | isp0vin06: endpoint { |
| 2521 | remote-endpoint = <&vin06isp0>; |
| 2522 | }; |
| 2523 | }; |
| 2524 | |
| 2525 | port@8 { |
| 2526 | reg = <8>; |
| 2527 | isp0vin07: endpoint { |
| 2528 | remote-endpoint = <&vin07isp0>; |
| 2529 | }; |
| 2530 | }; |
| 2531 | }; |
| 2532 | }; |
| 2533 | |
| 2534 | isp1: isp@fed20000 { |
| 2535 | compatible = "renesas,r8a779a0-isp"; |
| 2536 | reg = <0 0xfed20000 0 0x10000>; |
| 2537 | interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>; |
| 2538 | clocks = <&cpg CPG_MOD 613>; |
| 2539 | power-domains = <&sysc R8A779A0_PD_A3ISP01>; |
| 2540 | resets = <&cpg 613>; |
| 2541 | status = "disabled"; |
| 2542 | |
| 2543 | ports { |
| 2544 | #address-cells = <1>; |
| 2545 | #size-cells = <0>; |
| 2546 | |
| 2547 | port@0 { |
| 2548 | #address-cells = <1>; |
| 2549 | #size-cells = <0>; |
| 2550 | |
| 2551 | reg = <0>; |
| 2552 | |
| 2553 | isp1csi41: endpoint@1 { |
| 2554 | reg = <1>; |
| 2555 | remote-endpoint = <&csi41isp1>; |
| 2556 | }; |
| 2557 | }; |
| 2558 | |
| 2559 | port@1 { |
| 2560 | reg = <1>; |
| 2561 | isp1vin08: endpoint { |
| 2562 | remote-endpoint = <&vin08isp1>; |
| 2563 | }; |
| 2564 | }; |
| 2565 | |
| 2566 | port@2 { |
| 2567 | reg = <2>; |
| 2568 | isp1vin09: endpoint { |
| 2569 | remote-endpoint = <&vin09isp1>; |
| 2570 | }; |
| 2571 | }; |
| 2572 | |
| 2573 | port@3 { |
| 2574 | reg = <3>; |
| 2575 | isp1vin10: endpoint { |
| 2576 | remote-endpoint = <&vin10isp1>; |
| 2577 | }; |
| 2578 | }; |
| 2579 | |
| 2580 | port@4 { |
| 2581 | reg = <4>; |
| 2582 | isp1vin11: endpoint { |
| 2583 | remote-endpoint = <&vin11isp1>; |
| 2584 | }; |
| 2585 | }; |
| 2586 | |
| 2587 | port@5 { |
| 2588 | reg = <5>; |
| 2589 | isp1vin12: endpoint { |
| 2590 | remote-endpoint = <&vin12isp1>; |
| 2591 | }; |
| 2592 | }; |
| 2593 | |
| 2594 | port@6 { |
| 2595 | reg = <6>; |
| 2596 | isp1vin13: endpoint { |
| 2597 | remote-endpoint = <&vin13isp1>; |
| 2598 | }; |
| 2599 | }; |
| 2600 | |
| 2601 | port@7 { |
| 2602 | reg = <7>; |
| 2603 | isp1vin14: endpoint { |
| 2604 | remote-endpoint = <&vin14isp1>; |
| 2605 | }; |
| 2606 | }; |
| 2607 | |
| 2608 | port@8 { |
| 2609 | reg = <8>; |
| 2610 | isp1vin15: endpoint { |
| 2611 | remote-endpoint = <&vin15isp1>; |
| 2612 | }; |
| 2613 | }; |
| 2614 | }; |
| 2615 | }; |
| 2616 | |
| 2617 | isp2: isp@fed30000 { |
| 2618 | compatible = "renesas,r8a779a0-isp"; |
| 2619 | reg = <0 0xfed30000 0 0x10000>; |
| 2620 | interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>; |
| 2621 | clocks = <&cpg CPG_MOD 614>; |
| 2622 | power-domains = <&sysc R8A779A0_PD_A3ISP23>; |
| 2623 | resets = <&cpg 614>; |
| 2624 | status = "disabled"; |
| 2625 | |
| 2626 | ports { |
| 2627 | #address-cells = <1>; |
| 2628 | #size-cells = <0>; |
| 2629 | |
| 2630 | port@0 { |
| 2631 | #address-cells = <1>; |
| 2632 | #size-cells = <0>; |
| 2633 | |
| 2634 | reg = <0>; |
| 2635 | |
| 2636 | isp2csi42: endpoint@0 { |
| 2637 | reg = <0>; |
| 2638 | remote-endpoint = <&csi42isp2>; |
| 2639 | }; |
| 2640 | }; |
| 2641 | |
| 2642 | port@1 { |
| 2643 | reg = <1>; |
| 2644 | isp2vin16: endpoint { |
| 2645 | remote-endpoint = <&vin16isp2>; |
| 2646 | }; |
| 2647 | }; |
| 2648 | |
| 2649 | port@2 { |
| 2650 | reg = <2>; |
| 2651 | isp2vin17: endpoint { |
| 2652 | remote-endpoint = <&vin17isp2>; |
| 2653 | }; |
| 2654 | }; |
| 2655 | |
| 2656 | port@3 { |
| 2657 | reg = <3>; |
| 2658 | isp2vin18: endpoint { |
| 2659 | remote-endpoint = <&vin18isp2>; |
| 2660 | }; |
| 2661 | }; |
| 2662 | |
| 2663 | port@4 { |
| 2664 | reg = <4>; |
| 2665 | isp2vin19: endpoint { |
| 2666 | remote-endpoint = <&vin19isp2>; |
| 2667 | }; |
| 2668 | }; |
| 2669 | |
| 2670 | port@5 { |
| 2671 | reg = <5>; |
| 2672 | isp2vin20: endpoint { |
| 2673 | remote-endpoint = <&vin20isp2>; |
| 2674 | }; |
| 2675 | }; |
| 2676 | |
| 2677 | port@6 { |
| 2678 | reg = <6>; |
| 2679 | isp2vin21: endpoint { |
| 2680 | remote-endpoint = <&vin21isp2>; |
| 2681 | }; |
| 2682 | }; |
| 2683 | |
| 2684 | port@7 { |
| 2685 | reg = <7>; |
| 2686 | isp2vin22: endpoint { |
| 2687 | remote-endpoint = <&vin22isp2>; |
| 2688 | }; |
| 2689 | }; |
| 2690 | |
| 2691 | port@8 { |
| 2692 | reg = <8>; |
| 2693 | isp2vin23: endpoint { |
| 2694 | remote-endpoint = <&vin23isp2>; |
| 2695 | }; |
| 2696 | }; |
| 2697 | }; |
| 2698 | }; |
| 2699 | |
| 2700 | isp3: isp@fed40000 { |
| 2701 | compatible = "renesas,r8a779a0-isp"; |
| 2702 | reg = <0 0xfed40000 0 0x10000>; |
| 2703 | interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>; |
| 2704 | clocks = <&cpg CPG_MOD 615>; |
| 2705 | power-domains = <&sysc R8A779A0_PD_A3ISP23>; |
| 2706 | resets = <&cpg 615>; |
| 2707 | status = "disabled"; |
| 2708 | |
| 2709 | ports { |
| 2710 | #address-cells = <1>; |
| 2711 | #size-cells = <0>; |
| 2712 | |
| 2713 | port@0 { |
| 2714 | #address-cells = <1>; |
| 2715 | #size-cells = <0>; |
| 2716 | |
| 2717 | reg = <0>; |
| 2718 | |
| 2719 | isp3csi43: endpoint@1 { |
| 2720 | reg = <1>; |
| 2721 | remote-endpoint = <&csi43isp3>; |
| 2722 | }; |
| 2723 | }; |
| 2724 | |
| 2725 | port@1 { |
| 2726 | reg = <1>; |
| 2727 | isp3vin24: endpoint { |
| 2728 | remote-endpoint = <&vin24isp3>; |
| 2729 | }; |
| 2730 | }; |
| 2731 | |
| 2732 | port@2 { |
| 2733 | reg = <2>; |
| 2734 | isp3vin25: endpoint { |
| 2735 | remote-endpoint = <&vin25isp3>; |
| 2736 | }; |
| 2737 | }; |
| 2738 | |
| 2739 | port@3 { |
| 2740 | reg = <3>; |
| 2741 | isp3vin26: endpoint { |
| 2742 | remote-endpoint = <&vin26isp3>; |
| 2743 | }; |
| 2744 | }; |
| 2745 | |
| 2746 | port@4 { |
| 2747 | reg = <4>; |
| 2748 | isp3vin27: endpoint { |
| 2749 | remote-endpoint = <&vin27isp3>; |
| 2750 | }; |
| 2751 | }; |
| 2752 | |
| 2753 | port@5 { |
| 2754 | reg = <5>; |
| 2755 | isp3vin28: endpoint { |
| 2756 | remote-endpoint = <&vin28isp3>; |
| 2757 | }; |
| 2758 | }; |
| 2759 | |
| 2760 | port@6 { |
| 2761 | reg = <6>; |
| 2762 | isp3vin29: endpoint { |
| 2763 | remote-endpoint = <&vin29isp3>; |
| 2764 | }; |
| 2765 | }; |
| 2766 | |
| 2767 | port@7 { |
| 2768 | reg = <7>; |
| 2769 | isp3vin30: endpoint { |
| 2770 | remote-endpoint = <&vin30isp3>; |
| 2771 | }; |
| 2772 | }; |
| 2773 | |
| 2774 | port@8 { |
| 2775 | reg = <8>; |
| 2776 | isp3vin31: endpoint { |
| 2777 | remote-endpoint = <&vin31isp3>; |
| 2778 | }; |
| 2779 | }; |
| 2780 | }; |
| 2781 | }; |
| 2782 | |
| 2783 | dsi0: dsi-encoder@fed80000 { |
| 2784 | compatible = "renesas,r8a779a0-dsi-csi2-tx"; |
| 2785 | reg = <0 0xfed80000 0 0x10000>; |
| 2786 | power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; |
| 2787 | clocks = <&cpg CPG_MOD 415>, |
| 2788 | <&cpg CPG_CORE R8A779A0_CLK_DSI>, |
| 2789 | <&cpg CPG_CORE R8A779A0_CLK_CL16MCK>; |
| 2790 | clock-names = "fck", "dsi", "pll"; |
| 2791 | resets = <&cpg 415>; |
| 2792 | status = "disabled"; |
| 2793 | |
| 2794 | ports { |
| 2795 | #address-cells = <1>; |
| 2796 | #size-cells = <0>; |
| 2797 | |
| 2798 | port@0 { |
| 2799 | reg = <0>; |
| 2800 | dsi0_in: endpoint { |
| 2801 | remote-endpoint = <&du_out_dsi0>; |
| 2802 | }; |
| 2803 | }; |
| 2804 | |
| 2805 | port@1 { |
| 2806 | reg = <1>; |
| 2807 | }; |
| 2808 | }; |
| 2809 | }; |
| 2810 | |
| 2811 | dsi1: dsi-encoder@fed90000 { |
| 2812 | compatible = "renesas,r8a779a0-dsi-csi2-tx"; |
| 2813 | reg = <0 0xfed90000 0 0x10000>; |
| 2814 | power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; |
| 2815 | clocks = <&cpg CPG_MOD 416>, |
| 2816 | <&cpg CPG_CORE R8A779A0_CLK_DSI>, |
| 2817 | <&cpg CPG_CORE R8A779A0_CLK_CL16MCK>; |
| 2818 | clock-names = "fck", "dsi", "pll"; |
| 2819 | resets = <&cpg 416>; |
| 2820 | status = "disabled"; |
| 2821 | |
| 2822 | ports { |
| 2823 | #address-cells = <1>; |
| 2824 | #size-cells = <0>; |
| 2825 | |
| 2826 | port@0 { |
| 2827 | reg = <0>; |
| 2828 | dsi1_in: endpoint { |
| 2829 | remote-endpoint = <&du_out_dsi1>; |
| 2830 | }; |
| 2831 | }; |
| 2832 | |
| 2833 | port@1 { |
| 2834 | reg = <1>; |
| 2835 | }; |
| 2836 | }; |
| 2837 | }; |
| 2838 | |
| 2839 | prr: chipid@fff00044 { |
| 2840 | compatible = "renesas,prr"; |
| 2841 | reg = <0 0xfff00044 0 4>; |
| 2842 | }; |
| 2843 | }; |
| 2844 | |
| 2845 | thermal-zones { |
| 2846 | sensor1_thermal: sensor1-thermal { |
| 2847 | polling-delay-passive = <250>; |
| 2848 | polling-delay = <1000>; |
| 2849 | thermal-sensors = <&tsc 0>; |
| 2850 | |
| 2851 | trips { |
| 2852 | sensor1_crit: sensor1-crit { |
| 2853 | temperature = <120000>; |
| 2854 | hysteresis = <1000>; |
| 2855 | type = "critical"; |
| 2856 | }; |
| 2857 | }; |
| 2858 | }; |
| 2859 | |
| 2860 | sensor2_thermal: sensor2-thermal { |
| 2861 | polling-delay-passive = <250>; |
| 2862 | polling-delay = <1000>; |
| 2863 | thermal-sensors = <&tsc 1>; |
| 2864 | |
| 2865 | trips { |
| 2866 | sensor2_crit: sensor2-crit { |
| 2867 | temperature = <120000>; |
| 2868 | hysteresis = <1000>; |
| 2869 | type = "critical"; |
| 2870 | }; |
| 2871 | }; |
| 2872 | }; |
| 2873 | |
| 2874 | sensor3_thermal: sensor3-thermal { |
| 2875 | polling-delay-passive = <250>; |
| 2876 | polling-delay = <1000>; |
| 2877 | thermal-sensors = <&tsc 2>; |
| 2878 | |
| 2879 | trips { |
| 2880 | sensor3_crit: sensor3-crit { |
| 2881 | temperature = <120000>; |
| 2882 | hysteresis = <1000>; |
| 2883 | type = "critical"; |
| 2884 | }; |
| 2885 | }; |
| 2886 | }; |
| 2887 | |
| 2888 | sensor4_thermal: sensor4-thermal { |
| 2889 | polling-delay-passive = <250>; |
| 2890 | polling-delay = <1000>; |
| 2891 | thermal-sensors = <&tsc 3>; |
| 2892 | |
| 2893 | trips { |
| 2894 | sensor4_crit: sensor4-crit { |
| 2895 | temperature = <120000>; |
| 2896 | hysteresis = <1000>; |
| 2897 | type = "critical"; |
| 2898 | }; |
| 2899 | }; |
| 2900 | }; |
| 2901 | |
| 2902 | sensor5_thermal: sensor5-thermal { |
| 2903 | polling-delay-passive = <250>; |
| 2904 | polling-delay = <1000>; |
| 2905 | thermal-sensors = <&tsc 4>; |
| 2906 | |
| 2907 | trips { |
| 2908 | sensor5_crit: sensor5-crit { |
| 2909 | temperature = <120000>; |
| 2910 | hysteresis = <1000>; |
| 2911 | type = "critical"; |
| 2912 | }; |
| 2913 | }; |
| 2914 | }; |
| 2915 | }; |
| 2916 | |
| 2917 | timer { |
| 2918 | compatible = "arm,armv8-timer"; |
| 2919 | interrupts-extended = <&gic GIC_PPI 13 IRQ_TYPE_LEVEL_LOW>, |
| 2920 | <&gic GIC_PPI 14 IRQ_TYPE_LEVEL_LOW>, |
| 2921 | <&gic GIC_PPI 11 IRQ_TYPE_LEVEL_LOW>, |
| 2922 | <&gic GIC_PPI 10 IRQ_TYPE_LEVEL_LOW>; |
| 2923 | }; |
| 2924 | }; |