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Tom Rini53633a82024-02-29 12:33:36 -05001// SPDX-License-Identifier: GPL-2.0
2/*
3 * Check Point L-50 Board Description
4 * Copyright 2020 Pawel Dembicki <paweldembicki@gmail.com>
5 */
6
7/dts-v1/;
8
9#include "kirkwood.dtsi"
10#include "kirkwood-6281.dtsi"
11
12/ {
13 model = "Check Point L-50";
14 compatible = "checkpoint,l-50", "marvell,kirkwood-88f6281", "marvell,kirkwood";
15
16 memory {
17 device_type = "memory";
18 reg = <0x00000000 0x20000000>;
19 };
20
21 chosen {
22 bootargs = "console=ttyS0,115200n8";
23 stdout-path = &uart0;
24 };
25
26 ocp@f1000000 {
27 pinctrl: pin-controller@10000 {
28 pinctrl-0 = <&pmx_led38 &pmx_sysrst &pmx_button29>;
29 pinctrl-names = "default";
30
31 pmx_sysrst: pmx-sysrst {
32 marvell,pins = "mpp6";
33 marvell,function = "sysrst";
34 };
35
36 pmx_button29: pmx_button29 {
37 marvell,pins = "mpp29";
38 marvell,function = "gpio";
39 };
40
41 pmx_led38: pmx_led38 {
42 marvell,pins = "mpp38";
43 marvell,function = "gpio";
44 };
45
46 pmx_sdio_cd: pmx-sdio-cd {
47 marvell,pins = "mpp46";
48 marvell,function = "gpio";
49 };
50 };
51
52 serial@12000 {
53 status = "okay";
54 };
55
56 mvsdio@90000 {
57 status = "okay";
58 cd-gpios = <&gpio1 14 9>;
59 };
60
61 i2c@11000 {
62 status = "okay";
63 clock-frequency = <400000>;
64
65 gpio2: gpio-expander@20 {
66 #gpio-cells = <2>;
67 #interrupt-cells = <2>;
Tom Rini93743d22024-04-01 09:08:13 -040068 interrupt-controller;
Tom Rini53633a82024-02-29 12:33:36 -050069 compatible = "semtech,sx1505q";
70 reg = <0x20>;
71
72 gpio-controller;
73 };
74
75 /* Three GPIOs from 0x21 exp. are undescribed in dts:
76 * 1: DSL module reset (active low)
77 * 5: mPCIE reset (active low)
78 * 6: Express card reset (active low)
79 */
80 gpio3: gpio-expander@21 {
81 #gpio-cells = <2>;
82 #interrupt-cells = <2>;
Tom Rini93743d22024-04-01 09:08:13 -040083 interrupt-controller;
Tom Rini53633a82024-02-29 12:33:36 -050084 compatible = "semtech,sx1505q";
85 reg = <0x21>;
86
87 gpio-controller;
88 };
89
90 rtc@30 {
91 compatible = "s35390a";
92 reg = <0x30>;
93 };
94 };
95 };
96
97 leds {
98 compatible = "gpio-leds";
99
100 status_green {
101 label = "l-50:green:status";
102 gpios = <&gpio1 6 GPIO_ACTIVE_LOW>;
103 };
104
105 status_red {
106 label = "l-50:red:status";
107 gpios = <&gpio3 2 GPIO_ACTIVE_LOW>;
108 };
109
110 wifi {
111 label = "l-50:green:wifi";
112 gpios = <&gpio2 7 GPIO_ACTIVE_LOW>;
113 linux,default-trigger = "phy0tpt";
114 };
115
116 internet_green {
117 label = "l-50:green:internet";
118 gpios = <&gpio2 3 GPIO_ACTIVE_LOW>;
119 };
120
121 internet_red {
122 label = "l-50:red:internet";
123 gpios = <&gpio2 1 GPIO_ACTIVE_LOW>;
124 };
125
126 usb1_green {
127 label = "l-50:green:usb1";
128 gpios = <&gpio2 0 GPIO_ACTIVE_LOW>;
129 linux,default-trigger = "usbport";
130 trigger-sources = <&hub_port3>;
131 };
132
133 usb1_red {
134 label = "l-50:red:usb1";
135 gpios = <&gpio2 4 GPIO_ACTIVE_LOW>;
136 };
137
138 usb2_green {
139 label = "l-50:green:usb2";
140 gpios = <&gpio2 2 GPIO_ACTIVE_LOW>;
141 linux,default-trigger = "usbport";
142 trigger-sources = <&hub_port1>;
143 };
144
145 usb2_red {
146 label = "l-50:red:usb2";
147 gpios = <&gpio2 5 GPIO_ACTIVE_LOW>;
148 };
149 };
150
151 usb2_pwr {
152 compatible = "regulator-fixed";
153 regulator-name = "usb2_pwr";
154
155 regulator-min-microvolt = <5000000>;
156 regulator-max-microvolt = <5000000>;
157 gpio = <&gpio3 3 GPIO_ACTIVE_LOW>;
158 regulator-always-on;
159 };
160
161 usb1_pwr {
162 compatible = "regulator-fixed";
163 regulator-name = "usb1_pwr";
164
165 regulator-min-microvolt = <5000000>;
166 regulator-max-microvolt = <5000000>;
167 gpio = <&gpio3 4 GPIO_ACTIVE_LOW>;
168 regulator-always-on;
169 };
170
171 mpcie_pwr {
172 compatible = "regulator-fixed";
173 regulator-name = "mpcie_pwr";
174
175 regulator-min-microvolt = <3300000>;
176 regulator-max-microvolt = <3300000>;
177 gpio = <&gpio3 5 GPIO_ACTIVE_HIGH>;
178 enable-active-high;
179 regulator-always-on;
180 };
181
182 express_card_pwr {
183 compatible = "regulator-fixed";
184 regulator-name = "express_card_pwr";
185
186 regulator-min-microvolt = <3300000>;
187 regulator-max-microvolt = <3300000>;
188 gpio = <&gpio3 7 GPIO_ACTIVE_HIGH>;
189 enable-active-high;
190 regulator-always-on;
191 };
192
193 keys {
194 compatible = "gpio-keys";
195
196 factory_defaults {
197 label = "factory_defaults";
198 gpios = <&gpio0 29 GPIO_ACTIVE_LOW>;
199 linux,code = <KEY_RESTART>;
200 };
201 };
202};
203
204&mdio {
205 status = "okay";
206
207 ethphy8: ethernet-phy@8 {
208 reg = <0x08>;
209 };
210
211 switch0: switch@10 {
212 compatible = "marvell,mv88e6085";
213 #address-cells = <1>;
214 #size-cells = <0>;
215 reg = <0x10>;
216 dsa,member = <0 0>;
217
218 ports {
219 #address-cells = <1>;
220 #size-cells = <0>;
221
222 port@0 {
223 reg = <0>;
224 label = "lan5";
225 };
226
227 port@1 {
228 reg = <1>;
229 label = "lan1";
230 };
231
232 port@2 {
233 reg = <2>;
234 label = "lan6";
235 };
236
237 port@3 {
238 reg = <3>;
239 label = "lan2";
240 };
241
242 port@4 {
243 reg = <4>;
244 label = "lan7";
245 };
246
247 switch0port5: port@5 {
248 reg = <5>;
249 phy-mode = "rgmii-txid";
250 link = <&switch1port5>;
251 fixed-link {
252 speed = <1000>;
253 full-duplex;
254 };
255 };
256
257 port@6 {
258 reg = <6>;
259 phy-mode = "rgmii-id";
260 ethernet = <&eth1port>;
261 fixed-link {
262 speed = <1000>;
263 full-duplex;
264 };
265 };
266 };
267 };
268
269 switch@11 {
270 compatible = "marvell,mv88e6085";
271 #address-cells = <1>;
272 #size-cells = <0>;
273 reg = <0x11>;
274 dsa,member = <0 1>;
275
276 ports {
277 #address-cells = <1>;
278 #size-cells = <0>;
279
280 port@0 {
281 reg = <0>;
282 label = "lan3";
283 };
284
285 port@1 {
286 reg = <1>;
287 label = "lan8";
288 };
289
290 port@2 {
291 reg = <2>;
292 label = "lan4";
293 };
294
295 port@3 {
296 reg = <3>;
297 label = "dmz";
298 };
299
300 switch1port5: port@5 {
301 reg = <5>;
302 phy-mode = "rgmii-txid";
303 link = <&switch0port5>;
304 fixed-link {
305 speed = <1000>;
306 full-duplex;
307 };
308 };
309
310 port@6 {
311 reg = <6>;
312 label = "dsl";
313 fixed-link {
314 speed = <100>;
315 full-duplex;
316 };
317 };
318 };
319 };
320};
321
322&eth0 {
323 status = "okay";
324 ethernet0-port@0 {
325 phy-handle = <&ethphy8>;
326 };
327};
328
329&eth1 {
330 status = "okay";
331 ethernet1-port@0 {
332 speed = <1000>;
333 duplex = <1>;
334 phy-mode = "rgmii";
335 };
336};
337
338&nand {
339 status = "okay";
340 pinctrl-0 = <&pmx_nand>;
341 pinctrl-names = "default";
342
343 partition@0 {
344 label = "u-boot";
345 reg = <0x00000000 0x000c0000>;
346 };
347
348 partition@a0000 {
349 label = "bootldr-env";
350 reg = <0x000c0000 0x00040000>;
351 };
352
353 partition@100000 {
354 label = "kernel-1";
355 reg = <0x00100000 0x00800000>;
356 };
357
358 partition@900000 {
359 label = "rootfs-1";
360 reg = <0x00900000 0x07100000>;
361 };
362
363 partition@7a00000 {
364 label = "kernel-2";
365 reg = <0x07a00000 0x00800000>;
366 };
367
368 partition@8200000 {
369 label = "rootfs-2";
370 reg = <0x08200000 0x07100000>;
371 };
372
373 partition@f300000 {
374 label = "default_sw";
375 reg = <0x0f300000 0x07900000>;
376 };
377
378 partition@16c00000 {
379 label = "logs";
380 reg = <0x16c00000 0x01800000>;
381 };
382
383 partition@18400000 {
384 label = "preset_cfg";
385 reg = <0x18400000 0x00100000>;
386 };
387
388 partition@18500000 {
389 label = "adsl";
390 reg = <0x18500000 0x00100000>;
391 };
392
393 partition@18600000 {
394 label = "storage";
395 reg = <0x18600000 0x07a00000>;
396 };
397};
398
399&rtc {
400 status = "disabled";
401};
402
403&pciec {
404 status = "okay";
405};
406
407&pcie0 {
408 status = "okay";
409};
410
411&sata_phy0 {
412 status = "disabled";
413};
414
415&sata_phy1 {
416 status = "disabled";
417};
418
419&usb0 {
420 #address-cells = <1>;
421 #size-cells = <0>;
422 status = "okay";
423
424 port@1 {
425 #address-cells = <1>;
426 #size-cells = <0>;
427 reg = <1>;
428 #trigger-source-cells = <0>;
429
430 hub_port1: port@1 {
431 reg = <1>;
432 #trigger-source-cells = <0>;
433 };
434
435 hub_port3: port@3 {
436 reg = <3>;
437 #trigger-source-cells = <0>;
438 };
439 };
440};