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Tom Rini53633a82024-02-29 12:33:36 -05001// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2/*
3 * Device Tree file for NETGEAR ReadyNAS 104
4 *
5 * Copyright (C) 2013, Arnaud EBALARD <arno@natisbad.org>
6 */
7
8/dts-v1/;
9
10#include <dt-bindings/input/input.h>
11#include <dt-bindings/gpio/gpio.h>
12#include "armada-370.dtsi"
13
14/ {
15 model = "NETGEAR ReadyNAS 104";
16 compatible = "netgear,readynas-104", "marvell,armada370", "marvell,armada-370-xp";
17
18 chosen {
19 stdout-path = "serial0:115200n8";
20 };
21
22 memory@0 {
23 device_type = "memory";
24 reg = <0x00000000 0x20000000>; /* 512 MB */
25 };
26
27 soc {
28 ranges = <MBUS_ID(0xf0, 0x01) 0 0xd0000000 0x100000
29 MBUS_ID(0x01, 0xe0) 0 0xfff00000 0x100000
30 MBUS_ID(0x09, 0x01) 0 0xf1100000 0x10000>;
31
32 internal-regs {
33
34 /* RTC is provided by Intersil ISL12057 I2C RTC chip */
35 rtc@10300 {
36 status = "disabled";
37 };
38
39 serial@12000 {
40 status = "okay";
41 };
42
43 ethernet@70000 {
44 pinctrl-0 = <&ge0_rgmii_pins>;
45 pinctrl-names = "default";
46 status = "okay";
47 phy = <&phy0>;
48 phy-mode = "rgmii-id";
49 };
50
51 ethernet@74000 {
52 pinctrl-0 = <&ge1_rgmii_pins>;
53 pinctrl-names = "default";
54 status = "okay";
55 phy = <&phy1>;
56 phy-mode = "rgmii-id";
57 };
58
59 usb@50000 {
60 status = "okay";
61 };
62
63 i2c@11000 {
64 clock-frequency = <100000>;
65
66 pinctrl-0 = <&i2c0_pins>;
67 pinctrl-names = "default";
68
69 status = "okay";
70
71 isl12057: rtc@68 {
72 compatible = "isil,isl12057";
73 reg = <0x68>;
74 wakeup-source;
75 };
76
77 g762: g762@3e {
78 compatible = "gmt,g762";
79 reg = <0x3e>;
80 clocks = <&g762_clk>; /* input clock */
81 fan_gear_mode = <0>;
82 fan_startv = <1>;
83 pwm_polarity = <0>;
84 };
85
86 pca9554: pca9554@23 {
87 compatible = "nxp,pca9554";
88 gpio-controller;
89 #gpio-cells = <2>;
90 reg = <0x23>;
91 };
92 };
93 };
94 };
95
96 clocks {
97 g762_clk: g762-oscillator {
98 compatible = "fixed-clock";
99 #clock-cells = <0>;
100 clock-frequency = <8192>;
101 };
102 };
103
104 gpio-leds {
105 compatible = "gpio-leds";
106 pinctrl-0 = <&backup_led_pin &power_led_pin>;
107 pinctrl-names = "default";
108
109 blue-backup-led {
110 label = "rn104:blue:backup";
111 gpios = <&gpio1 31 GPIO_ACTIVE_HIGH>;
112 default-state = "off";
113 };
114
115 blue-power-led {
116 label = "rn104:blue:pwr";
117 gpios = <&gpio2 0 GPIO_ACTIVE_LOW>;
118 linux,default-trigger = "keep";
119 };
120
121 blue-sata1-led {
122 label = "rn104:blue:sata1";
123 gpios = <&pca9554 0 GPIO_ACTIVE_LOW>;
124 default-state = "off";
125 };
126
127 blue-sata2-led {
128 label = "rn104:blue:sata2";
129 gpios = <&pca9554 1 GPIO_ACTIVE_LOW>;
130 default-state = "off";
131 };
132
133 blue-sata3-led {
134 label = "rn104:blue:sata3";
135 gpios = <&pca9554 2 GPIO_ACTIVE_LOW>;
136 default-state = "off";
137 };
138
139 blue-sata4-led {
140 label = "rn104:blue:sata4";
141 gpios = <&pca9554 3 GPIO_ACTIVE_LOW>;
142 default-state = "off";
143 };
144 };
145
146 auxdisplay {
147 compatible = "hit,hd44780";
148 data-gpios = <&gpio1 25 GPIO_ACTIVE_HIGH>,
149 <&gpio1 26 GPIO_ACTIVE_HIGH>,
150 <&gpio1 27 GPIO_ACTIVE_HIGH>,
151 <&gpio1 29 GPIO_ACTIVE_HIGH>;
152 enable-gpios = <&gpio1 24 GPIO_ACTIVE_HIGH>;
153 rs-gpios = <&gpio1 22 GPIO_ACTIVE_HIGH>;
154 rw-gpios = <&gpio1 23 GPIO_ACTIVE_HIGH>;
155 backlight-gpios = <&gpio1 21 GPIO_ACTIVE_LOW>;
156 display-height-chars = <2>;
157 display-width-chars = <16>;
158 };
159
160 gpio-keys {
161 compatible = "gpio-keys";
162 pinctrl-0 = <&backup_button_pin
163 &power_button_pin
164 &reset_button_pin>;
165 pinctrl-names = "default";
166
167 backup-button {
168 label = "Backup Button";
169 linux,code = <KEY_COPY>;
170 gpios = <&gpio1 20 GPIO_ACTIVE_LOW>;
171 };
172
173 power-button {
174 label = "Power Button";
175 linux,code = <KEY_POWER>;
176 gpios = <&gpio1 30 GPIO_ACTIVE_HIGH>;
177 };
178
179 reset-button {
180 label = "Reset Button";
181 linux,code = <KEY_RESTART>;
182 gpios = <&gpio2 1 GPIO_ACTIVE_LOW>;
183 };
184 };
185
186 gpio-poweroff {
187 compatible = "gpio-poweroff";
188 pinctrl-0 = <&poweroff>;
189 pinctrl-names = "default";
190 gpios = <&gpio1 28 GPIO_ACTIVE_LOW>;
191 };
192};
193
194&pciec {
195 status = "okay";
196
197 /* Connected to FL1009 USB 3.0 controller */
198 pcie@1,0 {
199 /* Port 0, Lane 0 */
200 status = "okay";
201 };
202
203 /* Connected to Marvell 88SE9215 SATA controller */
204 pcie@2,0 {
205 /* Port 1, Lane 0 */
206 status = "okay";
207 };
208};
209
210&mdio {
211 pinctrl-0 = <&mdio_pins>;
212 pinctrl-names = "default";
213 phy0: ethernet-phy@0 { /* Marvell 88E1318 */
214 reg = <0>;
215 };
216
217 phy1: ethernet-phy@1 { /* Marvell 88E1318 */
218 reg = <1>;
219 };
220};
221
222&pinctrl {
223 poweroff: poweroff {
224 marvell,pins = "mpp60";
225 marvell,function = "gpio";
226 };
227
228 backup_button_pin: backup-button-pin {
229 marvell,pins = "mpp52";
230 marvell,function = "gpio";
231 };
232
233 power_button_pin: power-button-pin {
234 marvell,pins = "mpp62";
235 marvell,function = "gpio";
236 };
237
238 backup_led_pin: backup-led-pin {
239 marvell,pins = "mpp63";
240 marvell,function = "gpio";
241 };
242
243 power_led_pin: power-led-pin {
244 marvell,pins = "mpp64";
245 marvell,function = "gpio";
246 };
247
248 reset_button_pin: reset-button-pin {
249 marvell,pins = "mpp65";
250 marvell,function = "gpio";
251 };
252};
253
254&nand_controller {
255 status = "okay";
256
257 nand@0 {
258 reg = <0>;
259 label = "pxa3xx_nand-0";
260 nand-rb = <0>;
261 marvell,nand-keep-config;
262 nand-on-flash-bbt;
263
264 /* Use Hardware BCH ECC */
265 nand-ecc-strength = <4>;
266 nand-ecc-step-size = <512>;
267
268 partitions {
269 compatible = "fixed-partitions";
270 #address-cells = <1>;
271 #size-cells = <1>;
272
273 partition@0 {
274 label = "u-boot";
275 reg = <0x0000000 0x180000>; /* 1.5MB */
276 read-only;
277 };
278
279 partition@180000 {
280 label = "u-boot-env";
281 reg = <0x180000 0x20000>; /* 128KB */
282 read-only;
283 };
284
285 partition@200000 {
286 label = "uImage";
287 reg = <0x0200000 0x600000>; /* 6MB */
288 };
289
290 partition@800000 {
291 label = "minirootfs";
292 reg = <0x0800000 0x400000>; /* 4MB */
293 };
294
295 /* Last MB is for the BBT, i.e. not writable */
296 partition@c00000 {
297 label = "ubifs";
298 reg = <0x0c00000 0x7400000>; /* 116MB */
299 };
300 };
301 };
302};