| Tom Rini | 53633a8 | 2024-02-29 12:33:36 -0500 | [diff] [blame] | 1 | # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause |
| 2 | |
| 3 | %YAML 1.2 |
| 4 | --- |
| 5 | $id: http://devicetree.org/schemas/serial/litex,liteuart.yaml# |
| 6 | $schema: http://devicetree.org/meta-schemas/core.yaml# |
| 7 | |
| 8 | title: LiteUART serial controller |
| 9 | |
| 10 | maintainers: |
| 11 | - Karol Gugala <kgugala@antmicro.com> |
| 12 | - Mateusz Holenko <mholenko@antmicro.com> |
| 13 | |
| 14 | description: | |
| 15 | LiteUART serial controller is a part of the LiteX FPGA SoC builder. It supports |
| 16 | multiple CPU architectures, currently including e.g. OpenRISC and RISC-V. |
| 17 | |
| 18 | properties: |
| 19 | compatible: |
| 20 | const: litex,liteuart |
| 21 | |
| 22 | reg: |
| 23 | maxItems: 1 |
| 24 | |
| 25 | interrupts: |
| 26 | maxItems: 1 |
| 27 | |
| 28 | required: |
| 29 | - compatible |
| 30 | - reg |
| 31 | |
| 32 | additionalProperties: false |
| 33 | |
| 34 | examples: |
| 35 | - | |
| 36 | uart0: serial@e0001800 { |
| 37 | compatible = "litex,liteuart"; |
| 38 | reg = <0xe0001800 0x100>; |
| 39 | interrupts = <2>; |
| 40 | }; |