| Tom Rini | 53633a8 | 2024-02-29 12:33:36 -0500 | [diff] [blame] | 1 | # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) |
| 2 | %YAML 1.2 |
| 3 | --- |
| 4 | $id: http://devicetree.org/schemas/i2c/i2c-imx-lpi2c.yaml# |
| 5 | $schema: http://devicetree.org/meta-schemas/core.yaml# |
| 6 | |
| 7 | title: Freescale Low Power Inter IC (LPI2C) for i.MX |
| 8 | |
| 9 | maintainers: |
| 10 | - Anson Huang <Anson.Huang@nxp.com> |
| 11 | |
| 12 | allOf: |
| 13 | - $ref: /schemas/i2c/i2c-controller.yaml# |
| 14 | |
| 15 | properties: |
| 16 | compatible: |
| 17 | oneOf: |
| 18 | - enum: |
| 19 | - fsl,imx7ulp-lpi2c |
| 20 | - items: |
| 21 | - enum: |
| 22 | - fsl,imx8qxp-lpi2c |
| 23 | - fsl,imx8dxl-lpi2c |
| 24 | - fsl,imx8qm-lpi2c |
| 25 | - fsl,imx8ulp-lpi2c |
| 26 | - fsl,imx93-lpi2c |
| Tom Rini | 6bb92fc | 2024-05-20 09:54:58 -0600 | [diff] [blame] | 27 | - fsl,imx95-lpi2c |
| Tom Rini | 53633a8 | 2024-02-29 12:33:36 -0500 | [diff] [blame] | 28 | - const: fsl,imx7ulp-lpi2c |
| 29 | |
| 30 | reg: |
| 31 | maxItems: 1 |
| 32 | |
| 33 | interrupts: |
| 34 | maxItems: 1 |
| 35 | |
| 36 | assigned-clock-parents: true |
| 37 | assigned-clock-rates: true |
| 38 | assigned-clocks: true |
| 39 | clock-frequency: true |
| 40 | |
| 41 | clock-names: |
| 42 | items: |
| 43 | - const: per |
| 44 | - const: ipg |
| 45 | |
| 46 | clocks: |
| 47 | maxItems: 2 |
| 48 | |
| 49 | dmas: |
| 50 | items: |
| 51 | - description: DMA controller phandle and request line for TX |
| 52 | - description: DMA controller phandle and request line for RX |
| 53 | |
| 54 | dma-names: |
| 55 | items: |
| 56 | - const: tx |
| 57 | - const: rx |
| 58 | |
| 59 | power-domains: |
| 60 | maxItems: 1 |
| 61 | |
| 62 | required: |
| 63 | - compatible |
| 64 | - reg |
| 65 | - interrupts |
| 66 | - clocks |
| 67 | |
| 68 | unevaluatedProperties: false |
| 69 | |
| 70 | examples: |
| 71 | - | |
| 72 | #include <dt-bindings/clock/imx7ulp-clock.h> |
| 73 | #include <dt-bindings/interrupt-controller/arm-gic.h> |
| 74 | |
| 75 | i2c@40a50000 { |
| 76 | compatible = "fsl,imx7ulp-lpi2c"; |
| 77 | reg = <0x40A50000 0x10000>; |
| 78 | interrupt-parent = <&intc>; |
| 79 | interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>; |
| 80 | clocks = <&clks IMX7ULP_CLK_LPI2C7>, |
| 81 | <&clks IMX7ULP_CLK_NIC1_BUS_DIV>; |
| 82 | }; |