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Tom Rini53633a82024-02-29 12:33:36 -05001# SPDX-License-Identifier: GPL-2.0
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/clock/milbeaut-clock.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Milbeaut SoCs Clock Controller
8
9maintainers:
10 - Taichi Sugaya <sugaya.taichi@socionext.com>
11
12description: |
13 Milbeaut SoCs Clock controller is an integrated clock controller, which
14 generates and supplies to all modules.
15
16 This binding uses common clock bindings
17 [1] Documentation/devicetree/bindings/clock/clock-bindings.txt
18
19properties:
20 compatible:
21 enum:
22 - socionext,milbeaut-m10v-ccu
23
24 reg:
25 maxItems: 1
26
27 clocks:
28 maxItems: 1
29 description: external clock
30
31 '#clock-cells':
32 const: 1
33
34required:
35 - compatible
36 - reg
37 - clocks
38 - '#clock-cells'
39
40additionalProperties: false
41
42examples:
43 # Clock controller node:
44 - |
45 m10v-clk-ctrl@1d021000 {
46 compatible = "socionext,milbeaut-m10v-ccu";
47 reg = <0x1d021000 0x4000>;
48 #clock-cells = <1>;
49 clocks = <&clki40mhz>;
50 };
51
52 # Required an external clock for Clock controller node:
53 - |
54 clocks {
55 clki40mhz: clki40mhz {
56 compatible = "fixed-clock";
57 #clock-cells = <0>;
58 clock-frequency = <40000000>;
59 };
60 /* other clocks */
61 };
62
63 # The clock consumer shall specify the desired clock-output of the clock
64 # controller as below by specifying output-id in its "clk" phandle cell.
65 # 2: uart
66 # 4: 32-bit timer
67 # 7: UHS-I/II
68 - |
69 serial@1e700010 {
70 compatible = "socionext,milbeaut-usio-uart";
71 reg = <0x1e700010 0x10>;
72 interrupts = <0 141 0x4>, <0 149 0x4>;
73 interrupt-names = "rx", "tx";
74 clocks = <&clk 2>;
75 };
76
77...