blob: a59b188a8bf554b029cf815dca98ac0efa49f540 [file] [log] [blame]
Tom Rini53633a82024-02-29 12:33:36 -05001# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/clock/amlogic,a1-pll-clkc.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Amlogic A1 PLL Clock Control Unit
8
9maintainers:
10 - Neil Armstrong <neil.armstrong@linaro.org>
11 - Jerome Brunet <jbrunet@baylibre.com>
12 - Jian Hu <jian.hu@jian.hu.com>
13 - Dmitry Rokosov <ddrokosov@sberdevices.ru>
14
15properties:
16 compatible:
17 const: amlogic,a1-pll-clkc
18
19 '#clock-cells':
20 const: 1
21
22 reg:
23 maxItems: 1
24
25 clocks:
26 items:
27 - description: input fixpll_in
28 - description: input hifipll_in
29
30 clock-names:
31 items:
32 - const: fixpll_in
33 - const: hifipll_in
34
35required:
36 - compatible
37 - '#clock-cells'
38 - reg
39 - clocks
40 - clock-names
41
42additionalProperties: false
43
44examples:
45 - |
46 #include <dt-bindings/clock/amlogic,a1-peripherals-clkc.h>
47 apb {
48 #address-cells = <2>;
49 #size-cells = <2>;
50
51 clock-controller@7c80 {
52 compatible = "amlogic,a1-pll-clkc";
53 reg = <0 0x7c80 0 0x18c>;
54 #clock-cells = <1>;
55 clocks = <&clkc_periphs CLKID_FIXPLL_IN>,
56 <&clkc_periphs CLKID_HIFIPLL_IN>;
57 clock-names = "fixpll_in", "hifipll_in";
58 };
59 };