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git01.mediatek.com / filogic / uboot / c2e00ea48a85defad5e85a9619ee49f27f691329 / . / board / amcc / sequoia / u-boot-nand.lds
blob: 6e1e16997d48d296d2d2f3228b4185ac2b31b653 [file] [log] [blame]
Stefan Roese42fbddd2006-09-07 11:51:23 +0200[diff] [blame]1/*
Stefan Roesebbfcbb72006-09-12 20:19:10 +0200[diff] [blame]2 * (C) Copyright 2006
Stefan Roese42fbddd2006-09-07 11:51:23 +0200[diff] [blame]3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4 *
5 * See file CREDITS for list of people who contributed to this
6 * project.
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21 * MA 02111-1307 USA
22 */
23
24OUTPUT_ARCH(powerpc)
Stefan Roese42fbddd2006-09-07 11:51:23 +0200[diff] [blame]25SECTIONS
26{
27 /* Read-only sections, merged into text segment: */
28 . = + SIZEOF_HEADERS;
29 .interp : { *(.interp) }
30 .hash : { *(.hash) }
31 .dynsym : { *(.dynsym) }
32 .dynstr : { *(.dynstr) }
33 .rel.text : { *(.rel.text) }
Wolfgang Denka1be4762008-05-20 16:00:29 +0200[diff] [blame]34 .rela.text : { *(.rela.text) }
Stefan Roese42fbddd2006-09-07 11:51:23 +0200[diff] [blame]35 .rel.data : { *(.rel.data) }
Wolfgang Denka1be4762008-05-20 16:00:29 +0200[diff] [blame]36 .rela.data : { *(.rela.data) }
37 .rel.rodata : { *(.rel.rodata) }
38 .rela.rodata : { *(.rela.rodata) }
Stefan Roese42fbddd2006-09-07 11:51:23 +0200[diff] [blame]39 .rel.got : { *(.rel.got) }
40 .rela.got : { *(.rela.got) }
41 .rel.ctors : { *(.rel.ctors) }
42 .rela.ctors : { *(.rela.ctors) }
43 .rel.dtors : { *(.rel.dtors) }
44 .rela.dtors : { *(.rela.dtors) }
45 .rel.bss : { *(.rel.bss) }
46 .rela.bss : { *(.rela.bss) }
47 .rel.plt : { *(.rel.plt) }
48 .rela.plt : { *(.rela.plt) }
49 .init : { *(.init) }
50 .plt : { *(.plt) }
51 .text :
52 {
53 /* WARNING - the following is hand-optimized to fit within */
54 /* the sector layout of our flash chips! XXX FIXME XXX */
55
56 cpu/ppc4xx/start.o (.text)
57
Stefan Roesebbfcbb72006-09-12 20:19:10 +0200[diff] [blame]58 /* Align to next NAND block */
59 . = ALIGN(0x4000);
Jean-Christophe PLAGNIOL-VILLARD4436c1e2008-09-10 22:48:01 +0200[diff] [blame]60 common/env_embedded.o (.ppcenv)
Stefan Roesebbfcbb72006-09-12 20:19:10 +0200[diff] [blame]61 /* Keep some space here for redundant env and potential bad env blocks */
62 . = ALIGN(0x10000);
63
Stefan Roese42fbddd2006-09-07 11:51:23 +0200[diff] [blame]64 *(.text)
65 *(.fixup)
66 *(.got1)
67 }
68 _etext = .;
69 PROVIDE (etext = .);
70 .rodata :
71 {
72 *(.rodata)
73 *(.rodata1)
74 *(.rodata.str1.4)
75 }
76 .fini : { *(.fini) } =0
77 .ctors : { *(.ctors) }
78 .dtors : { *(.dtors) }
79
80 /* Read-write section, merged into data segment: */
81 . = (. + 0x00FF) & 0xFFFFFF00;
82 _erotext = .;
83 PROVIDE (erotext = .);
84 .reloc :
85 {
86 *(.got)
87 _GOT2_TABLE_ = .;
88 *(.got2)
89 _FIXUP_TABLE_ = .;
90 *(.fixup)
91 }
92 __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
93 __fixup_entries = (. - _FIXUP_TABLE_)>>2;
94
95 .data :
96 {
97 *(.data)
98 *(.data1)
99 *(.sdata)
100 *(.sdata2)
101 *(.dynamic)
102 CONSTRUCTORS
103 }
104 _edata = .;
105 PROVIDE (edata = .);
106
107 . = .;
108 __u_boot_cmd_start = .;
109 .u_boot_cmd : { *(.u_boot_cmd) }
110 __u_boot_cmd_end = .;
111
112
113 . = .;
114 __start___ex_table = .;
115 __ex_table : { *(__ex_table) }
116 __stop___ex_table = .;
117
118 . = ALIGN(256);
119 __init_begin = .;
120 .text.init : { *(.text.init) }
121 .data.init : { *(.data.init) }
122 . = ALIGN(256);
123 __init_end = .;
124
125 __bss_start = .;
Wolfgang Denk828a9782008-01-12 20:31:39 +0100[diff] [blame]126 .bss (NOLOAD) :
Stefan Roese42fbddd2006-09-07 11:51:23 +0200[diff] [blame]127 {
128 *(.sbss) *(.scommon)
129 *(.dynbss)
130 *(.bss)
131 *(COMMON)
Selvamuthukumard2454ba2008-10-16 22:54:03 +0530[diff] [blame]132 . = ALIGN(4);
Stefan Roese42fbddd2006-09-07 11:51:23 +0200[diff] [blame]133 }
134
135 _end = . ;
136 PROVIDE (end = .);
137}