blob: 3aff00697732fe5a1950d53d9a9c42f3be4ae722 [file] [log] [blame]
Tom Rini10e47792018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
Rick Chen6eedd922017-12-26 13:55:49 +08002/*
3 * Copyright (c) 2016-17 Microsemi Corporation.
4 * Padmarao Begari, Microsemi Corporation <padmarao.begari@microsemi.com>
5 *
6 * Copyright (C) 2017 Andes Technology Corporation
7 * Rick Chen, Andes Technology Corporation <rick@andestech.com>
Rick Chen6eedd922017-12-26 13:55:49 +08008 */
9
10#include <common.h>
11#include <asm/ptrace.h>
12#include <asm/system.h>
13#include <asm/encoding.h>
14
Lukas Auere429a1e2018-11-22 11:26:17 +010015static void _exit_trap(ulong code, ulong epc, struct pt_regs *regs);
Rick Chen6eedd922017-12-26 13:55:49 +080016
17int interrupt_init(void)
18{
19 return 0;
20}
21
22/*
23 * enable interrupts
24 */
25void enable_interrupts(void)
26{
27}
28
29/*
30 * disable interrupts
31 */
32int disable_interrupts(void)
33{
34 return 0;
35}
36
Anup Patel89b39342018-12-03 10:57:40 +053037ulong handle_trap(ulong cause, ulong epc, struct pt_regs *regs)
Rick Chen6eedd922017-12-26 13:55:49 +080038{
Anup Patel89b39342018-12-03 10:57:40 +053039 ulong is_irq, irq;
40
41 is_irq = (cause & MCAUSE_INT);
42 irq = (cause & ~MCAUSE_INT);
Rick Chen6eedd922017-12-26 13:55:49 +080043
Anup Patel89b39342018-12-03 10:57:40 +053044 if (is_irq) {
45 switch (irq) {
46 case IRQ_M_EXT:
47 case IRQ_S_EXT:
48 external_interrupt(0); /* handle external interrupt */
49 break;
50 case IRQ_M_TIMER:
51 case IRQ_S_TIMER:
52 timer_interrupt(0); /* handle timer interrupt */
53 break;
54 default:
55 _exit_trap(cause, epc, regs);
56 break;
57 };
58 } else {
59 _exit_trap(cause, epc, regs);
60 }
Rick Chen6eedd922017-12-26 13:55:49 +080061
62 return epc;
63}
64
65/*
66 *Entry Point for PLIC Interrupt Handler
67 */
68__attribute__((weak)) void external_interrupt(struct pt_regs *regs)
69{
70}
71
72__attribute__((weak)) void timer_interrupt(struct pt_regs *regs)
73{
74}
75
Lukas Auere429a1e2018-11-22 11:26:17 +010076static void _exit_trap(ulong code, ulong epc, struct pt_regs *regs)
Rick Chen6eedd922017-12-26 13:55:49 +080077{
Rick Chenf8e3a122018-02-12 11:24:43 +080078 static const char * const exception_code[] = {
Rick Chen6eedd922017-12-26 13:55:49 +080079 "Instruction address misaligned",
80 "Instruction access fault",
81 "Illegal instruction",
82 "Breakpoint",
Lukas Auer40f7eb52018-11-22 11:26:20 +010083 "Load address misaligned",
84 "Load access fault",
85 "Store/AMO address misaligned",
86 "Store/AMO access fault",
87 "Environment call from U-mode",
88 "Environment call from S-mode",
89 "Reserved",
90 "Environment call from M-mode",
91 "Instruction page fault",
92 "Load page fault",
93 "Reserved",
94 "Store/AMO page fault",
Rick Chen6eedd922017-12-26 13:55:49 +080095 };
96
Lukas Auerae525d52018-11-22 11:26:21 +010097 if (code < ARRAY_SIZE(exception_code)) {
98 printf("exception code: %ld , %s , epc %lx , ra %lx\n",
99 code, exception_code[code], epc, regs->ra);
100 } else {
101 printf("Reserved\n");
102 }
Lukas Auer306b31d2018-11-22 11:26:22 +0100103
104 hang();
Rick Chen6eedd922017-12-26 13:55:49 +0800105}