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Tom Rini10e47792018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
Masahiro Yamada127f5772017-02-14 01:24:25 +09002/*
3 * Copyright (C) 2016 Socionext Inc.
4 * Author: Masahiro Yamada <yamada.masahiro@socionext.com>
Masahiro Yamada127f5772017-02-14 01:24:25 +09005 */
6
Masahiro Yamada127f5772017-02-14 01:24:25 +09007#include <mmc.h>
8#include <spl.h>
9
Harald Seiler0bf7ab12020-04-15 11:33:30 +020010u32 spl_mmc_boot_mode(const u32 boot_device)
Masahiro Yamada127f5772017-02-14 01:24:25 +090011{
12 struct mmc *mmc;
13
14 /*
Masahiro Yamadad3c14612017-08-13 09:01:13 +090015 * work around a bug in the Boot ROM of LD4, Pro4, and sLD8:
Masahiro Yamada127f5772017-02-14 01:24:25 +090016 *
17 * The boot ROM in these SoCs breaks the PARTITION_CONFIG [179] of
18 * Extended CSD register; when switching to the Boot Partition 1, the
19 * Boot ROM should issue the SWITCH command (CMD6) with Set Bits for
20 * the Access Bits, but in fact it uses Write Byte for the Access Bits.
21 * As a result, the BOOT_PARTITION_ENABLE field of the PARTITION_CONFIG
22 * is lost. This bug was fixed for PH1-Pro5 and later SoCs.
23 *
24 * Fixup mmc->part_config here because it is used to determine the
25 * partition which the U-Boot image is read from.
26 */
27 mmc = find_mmc_device(0);
28 mmc->part_config &= ~EXT_CSD_BOOT_PART_NUM(PART_ACCESS_MASK);
29 mmc->part_config |= EXT_CSD_BOOT_PARTITION_ENABLE;
30
31 return MMCSD_MODE_EMMCBOOT;
32}