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Tom Rini10e47792018-05-06 17:58:06 -04001/* SPDX-License-Identifier: GPL-2.0+ */
Vikas Manocha33913c52014-11-18 10:42:22 -08002/*
Patrice Chotardcc551162017-10-23 09:53:59 +02003 * Copyright (C) 2014, STMicroelectronics - All Rights Reserved
4 * Author(s): Vikas Manocha, <vikas.manocha@st.com> for STMicroelectronics.
Vikas Manocha33913c52014-11-18 10:42:22 -08005 */
6
7#ifndef __ASM_ARM_ARCH_PERIPH_H
8#define __ASM_ARM_ARCH_PERIPH_H
9
10/*
11 * Peripherals required for pinmux configuration. List will
12 * grow with support for more devices getting added.
13 * Numbering based on interrupt table.
14 *
15 */
16enum periph_id {
17 UART_GPIOC_30_31 = 0,
18 UART_GPIOB_16_17,
Vikas Manocha32b9e712014-11-18 10:42:23 -080019 ETH_GPIOB_10_31_C_0_4,
Vikas Manocha20cdba52015-07-02 18:29:40 -070020 QSPI_CS_CLK_PAD,
Vikas Manocha33913c52014-11-18 10:42:22 -080021 PERIPH_ID_I2C0,
22 PERIPH_ID_I2C1,
23 PERIPH_ID_I2C2,
24 PERIPH_ID_I2C3,
25 PERIPH_ID_I2C4,
26 PERIPH_ID_I2C5,
27 PERIPH_ID_I2C6,
28 PERIPH_ID_I2C7,
29 PERIPH_ID_SPI0,
30 PERIPH_ID_SPI1,
31 PERIPH_ID_SPI2,
32 PERIPH_ID_SDMMC0,
33 PERIPH_ID_SDMMC1,
34 PERIPH_ID_SDMMC2,
35 PERIPH_ID_SDMMC3,
36 PERIPH_ID_I2S1,
37};
38
39enum periph_clock {
40 UART_CLOCK_CFG = 0,
41 ETH_CLOCK_CFG,
Vikas Manocha20cdba52015-07-02 18:29:40 -070042 QSPI_CLOCK_CFG,
Vikas Manocha33913c52014-11-18 10:42:22 -080043};
44
45#endif /* __ASM_ARM_ARCH_PERIPH_H */