Simon Glass | 932bc4a | 2015-08-30 16:55:28 -0600 | [diff] [blame] | 1 | /* |
| 2 | * Copyright 2015 Google, Inc |
| 3 | * |
| 4 | * SPDX-License-Identifier: GPL-2.0+ |
| 5 | */ |
| 6 | |
| 7 | #ifndef _ASM_ARCH_HARDWARE_H |
| 8 | #define _ASM_ARCH_HARDWARE_H |
| 9 | |
Simon Glass | f71eb80 | 2016-01-21 19:45:12 -0700 | [diff] [blame] | 10 | #define RK_CLRSETBITS(clr, set) ((((clr) | (set)) << 16) | (set)) |
Simon Glass | 932bc4a | 2015-08-30 16:55:28 -0600 | [diff] [blame] | 11 | #define RK_SETBITS(set) RK_CLRSETBITS(0, set) |
| 12 | #define RK_CLRBITS(clr) RK_CLRSETBITS(clr, 0) |
| 13 | |
| 14 | #define TIMER7_BASE 0xff810020 |
| 15 | |
Simon Glass | f71eb80 | 2016-01-21 19:45:12 -0700 | [diff] [blame] | 16 | #define rk_clrsetreg(addr, clr, set) \ |
| 17 | writel(((clr) | (set)) << 16 | (set), addr) |
Simon Glass | 932bc4a | 2015-08-30 16:55:28 -0600 | [diff] [blame] | 18 | #define rk_clrreg(addr, clr) writel((clr) << 16, addr) |
Simon Glass | f71eb80 | 2016-01-21 19:45:12 -0700 | [diff] [blame] | 19 | #define rk_setreg(addr, set) writel((set) << 16 | (set), addr) |
Simon Glass | 932bc4a | 2015-08-30 16:55:28 -0600 | [diff] [blame] | 20 | |
| 21 | #endif |