blob: 039a1f2604f84794c535e767f432e1a65c7de387 [file] [log] [blame]
Minkyu Kangae6f0c62009-07-20 11:40:01 +09001/*
Steve Sakoman1ad21582010-06-08 13:07:46 -07002 * (C) Copyright 2010
3 * Texas Instruments, <www.ti.com>
Minkyu Kangae6f0c62009-07-20 11:40:01 +09004 *
5 * This program is free software; you can redistribute it and/or
6 * modify it under the terms of the GNU General Public License as
7 * published by the Free Software Foundation; either version 2 of
8 * the License, or (at your option) any later version.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
18 * MA 02111-1307 USA
19 */
20
Steve Sakoman1ad21582010-06-08 13:07:46 -070021#ifndef _SYS_PROTO_H_
22#define _SYS_PROTO_H_
23
Sricharan9310ff72011-11-15 09:49:55 -050024#include <asm/arch/omap.h>
Aneesh V0d2628b2011-07-21 09:10:07 -040025#include <asm/arch/clocks.h>
Steve Sakoman1ad21582010-06-08 13:07:46 -070026#include <asm/io.h>
Aneesh V30679422011-07-21 09:09:59 -040027#include <asm/omap_common.h>
Aneesh Vf908b632011-07-21 09:10:01 -040028#include <asm/arch/mux_omap4.h>
Steve Sakoman1ad21582010-06-08 13:07:46 -070029
SRICHARAN R3f30b0a2013-04-24 00:41:24 +000030DECLARE_GLOBAL_DATA_PTR;
31
Steve Sakoman1ad21582010-06-08 13:07:46 -070032struct omap_sysinfo {
33 char *board_string;
34};
Aneesh V30679422011-07-21 09:09:59 -040035extern const struct omap_sysinfo sysinfo;
Steve Sakoman1ad21582010-06-08 13:07:46 -070036
Steve Sakoman9b8ea4e2010-07-15 16:19:16 -040037void gpmc_init(void);
Steve Sakoman1ad21582010-06-08 13:07:46 -070038void watchdog_init(void);
39u32 get_device_type(void);
Aneesh Vf908b632011-07-21 09:10:01 -040040void do_set_mux(u32 base, struct pad_conf_entry const *array, int size);
Sricharan9310ff72011-11-15 09:49:55 -050041void set_muxconf_regs_essential(void);
Aneesh Vf908b632011-07-21 09:10:01 -040042void set_muxconf_regs_non_essential(void);
Steve Sakoman6e09a762010-08-04 09:39:40 -070043void sr32(void *, u32, u32, u32);
44u32 wait_on_value(u32, u32, void *, u32);
45void sdelay(unsigned long);
Aneesh Ve3405bd2011-06-16 23:30:52 +000046void set_pl310_ctrl_reg(u32 val);
Aneesh Vb8e60b92011-07-21 09:10:21 -040047void setup_clocks_for_console(void);
Aneesh V0d2628b2011-07-21 09:10:07 -040048void prcm_init(void);
SRICHARAN Rfb6aa1f2013-02-04 04:22:00 +000049void bypass_dpll(u32 const base);
Aneesh V0d2628b2011-07-21 09:10:07 -040050void freq_update_core(void);
51u32 get_sys_clk_freq(void);
52u32 omap4_ddr_clk(void);
Aneesh Vc0e88522011-07-21 09:10:12 -040053void cancel_out(u32 *num, u32 *den, u32 den_limit);
Aneesh Vcc565582011-07-21 09:10:09 -040054void sdram_init(void);
Sricharan9310ff72011-11-15 09:49:55 -050055u32 omap_sdram_size(void);
56u32 cortex_rev(void);
57void init_omap_revision(void);
58void do_io_settings(void);
Nishanth Menon41d7ab12012-03-01 14:17:37 +000059void omap_vc_init(u16 speed_khz);
60int omap_vc_bypass_send_value(u8 sa, u8 reg_addr, u8 reg_data);
Lokesh Vutlae89f1542012-05-29 19:26:41 +000061u32 warm_reset(void);
Lokesh Vutlaba873772012-05-29 19:26:43 +000062void force_emif_self_refresh(void);
Lokesh Vutla100c2d82013-04-17 20:49:40 +000063void setup_warmreset_time(void);
Steve Sakoman1ad21582010-06-08 13:07:46 -070064
Aneesh V30679422011-07-21 09:09:59 -040065static inline u32 running_from_sdram(void)
66{
67 u32 pc;
68 asm volatile ("mov %0, pc" : "=r" (pc));
69 return ((pc >= OMAP44XX_DRAM_ADDR_SPACE_START) &&
70 (pc < OMAP44XX_DRAM_ADDR_SPACE_END));
71}
72
73static inline u8 uboot_loaded_by_spl(void)
74{
75 /*
Sricharan308fe922011-11-15 09:50:03 -050076 * u-boot can be running from sdram either because of configuration
77 * Header or by SPL. If because of CH, then the romcode sets the
78 * CHSETTINGS executed bit to true in the boot parameter structure that
79 * it passes to the bootloader.This parameter is stored in the ch_flags
80 * variable by both SPL and u-boot.Check out for CHSETTINGS, which is a
81 * mandatory section if CH is present.
Aneesh V30679422011-07-21 09:09:59 -040082 */
SRICHARAN R3f30b0a2013-04-24 00:41:24 +000083 if ((gd->arch.omap_boot_params.ch_flags) & (CH_FLAGS_CHSETTINGS))
Sricharan308fe922011-11-15 09:50:03 -050084 return 0;
85 else
86 return running_from_sdram();
Aneesh V30679422011-07-21 09:09:59 -040087}
88/*
89 * The basic hardware init of OMAP(s_init()) can happen in 4
90 * different contexts:
91 * 1. SPL running from SRAM
92 * 2. U-Boot running from FLASH
93 * 3. Non-XIP U-Boot loaded to SDRAM by SPL
94 * 4. Non-XIP U-Boot loaded to SDRAM by ROM code using the
95 * Configuration Header feature
96 *
97 * This function finds this context.
98 * Defining as inline may help in compiling out unused functions in SPL
99 */
Sricharan9310ff72011-11-15 09:49:55 -0500100static inline u32 omap_hw_init_context(void)
Aneesh V30679422011-07-21 09:09:59 -0400101{
102#ifdef CONFIG_SPL_BUILD
103 return OMAP_INIT_CONTEXT_SPL;
104#else
105 if (uboot_loaded_by_spl())
106 return OMAP_INIT_CONTEXT_UBOOT_AFTER_SPL;
107 else if (running_from_sdram())
108 return OMAP_INIT_CONTEXT_UBOOT_AFTER_CH;
109 else
110 return OMAP_INIT_CONTEXT_UBOOT_FROM_NOR;
111#endif
112}
Minkyu Kangae6f0c62009-07-20 11:40:01 +0900113
Steve Sakoman1ad21582010-06-08 13:07:46 -0700114#endif