| Masahiro Yamada | d5f8fee | 2015-03-12 13:24:39 +0900 | [diff] [blame] | 1 | CONFIG_ARM=y |
| 2 | CONFIG_TEGRA=y | ||||
| Bin Meng | 63c1098 | 2015-09-28 05:14:15 -0700 | [diff] [blame] | 3 | CONFIG_SPL_DM=y |
| Masahiro Yamada | d5f8fee | 2015-03-12 13:24:39 +0900 | [diff] [blame] | 4 | CONFIG_TEGRA124=y |
| 5 | CONFIG_TARGET_NYAN_BIG=y | ||||
| Allen Martin | a142ac7 | 2014-12-04 06:36:30 -0700 | [diff] [blame] | 6 | CONFIG_DEFAULT_DEVICE_TREE="tegra124-nyan-big" |
| Simon Glass | e3ee2fb | 2016-02-22 22:55:43 -0700 | [diff] [blame] | 7 | CONFIG_FIT=y |
| 8 | CONFIG_FIT_BEST_MATCH=y | ||||
| 9 | CONFIG_OF_SYSTEM_SETUP=y | ||||
| Bin Meng | 63c1098 | 2015-09-28 05:14:15 -0700 | [diff] [blame] | 10 | CONFIG_SYS_PROMPT="Tegra124 (Nyan-big) # " |
| Joe Hershberger | 5a9d7f1 | 2015-06-22 16:15:30 -0500 | [diff] [blame] | 11 | # CONFIG_CMD_IMI is not set |
| 12 | # CONFIG_CMD_IMLS is not set | ||||
| 13 | # CONFIG_CMD_FLASH is not set | ||||
| 14 | # CONFIG_CMD_FPGA is not set | ||||
| Thomas Chou | 3a077cd | 2015-11-11 21:39:33 +0800 | [diff] [blame] | 15 | CONFIG_CMD_GPIO=y |
| Joe Hershberger | 5a9d7f1 | 2015-06-22 16:15:30 -0500 | [diff] [blame] | 16 | # CONFIG_CMD_SETEXPR is not set |
| 17 | # CONFIG_CMD_NFS is not set | ||||
| Simon Glass | fad7218 | 2016-01-30 16:37:50 -0700 | [diff] [blame] | 18 | CONFIG_CMD_PMIC=y |
| 19 | CONFIG_CMD_REGULATOR=y | ||||
| Simon Glass | 1e823cf | 2015-08-22 18:31:44 -0600 | [diff] [blame] | 20 | CONFIG_CMD_TPM=y |
| 21 | CONFIG_CMD_TPM_TEST=y | ||||
| Bin Meng | 63c1098 | 2015-09-28 05:14:15 -0700 | [diff] [blame] | 22 | CONFIG_CROS_EC_KEYB=y |
| Joe Hershberger | 17491a8 | 2015-06-22 16:15:29 -0500 | [diff] [blame] | 23 | CONFIG_CMD_CROS_EC=y |
| Simon Glass | 3aa5d4a | 2015-06-05 14:39:34 -0600 | [diff] [blame] | 24 | CONFIG_CROS_EC=y |
| 25 | CONFIG_CROS_EC_SPI=y | ||||
| Bin Meng | 63c1098 | 2015-09-28 05:14:15 -0700 | [diff] [blame] | 26 | CONFIG_SPI_FLASH=y |
| Bin Meng | 27f5b19 | 2015-11-25 05:34:54 -0800 | [diff] [blame] | 27 | CONFIG_SPI_FLASH_WINBOND=y |
| Simon Glass | fad7218 | 2016-01-30 16:37:50 -0700 | [diff] [blame] | 28 | CONFIG_DM_PMIC=y |
| 29 | CONFIG_DM_REGULATOR=y | ||||
| 30 | CONFIG_DM_REGULATOR_FIXED=y | ||||
| 31 | CONFIG_DM_PWM=y | ||||
| Simon Glass | 90836ff | 2016-01-30 16:38:00 -0700 | [diff] [blame] | 32 | CONFIG_PWM_TEGRA=y |
| Thomas Chou | a6cec01 | 2015-11-19 21:48:14 +0800 | [diff] [blame] | 33 | CONFIG_SYS_NS16550=y |
| Bin Meng | 63c1098 | 2015-09-28 05:14:15 -0700 | [diff] [blame] | 34 | CONFIG_TEGRA114_SPI=y |
| Christophe Ricard | 8759ff8 | 2015-10-06 22:54:41 +0200 | [diff] [blame] | 35 | CONFIG_TPM_TIS_INFINEON=y |
| Joe Hershberger | 17491a8 | 2015-06-22 16:15:29 -0500 | [diff] [blame] | 36 | CONFIG_USB=y |
| 37 | CONFIG_DM_USB=y | ||||
| Simon Glass | 7d3d776 | 2016-01-21 19:45:00 -0700 | [diff] [blame] | 38 | CONFIG_DISPLAY=y |
| Anatolij Gustschin | 4601eb4 | 2016-01-25 17:17:22 +0100 | [diff] [blame] | 39 | CONFIG_I2C_EDID=y |
| Simon Glass | fad7218 | 2016-01-30 16:37:50 -0700 | [diff] [blame] | 40 | CONFIG_DM_VIDEO=y |
| Bin Meng | 63c1098 | 2015-09-28 05:14:15 -0700 | [diff] [blame] | 41 | CONFIG_VIDEO_TEGRA124=y |
| Simon Glass | fad7218 | 2016-01-30 16:37:50 -0700 | [diff] [blame] | 42 | CONFIG_VIDEO_BRIDGE=y |
| Joe Hershberger | 17491a8 | 2015-06-22 16:15:29 -0500 | [diff] [blame] | 43 | CONFIG_USE_PRIVATE_LIBGCC=y |
| Bin Meng | 63c1098 | 2015-09-28 05:14:15 -0700 | [diff] [blame] | 44 | CONFIG_TPM=y |
| Simon Glass | fad7218 | 2016-01-30 16:37:50 -0700 | [diff] [blame] | 45 | CONFIG_ERRNO_STR=y |