blob: d6ca8c93073dfdd93849345c9e3327b68426234e [file] [log] [blame]
Tom Rini53633a82024-02-29 12:33:36 -05001# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/usb/nvidia,tegra124-xusb.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: NVIDIA Tegra124 xHCI controller
8
9maintainers:
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
12
13description: The Tegra xHCI controller supports both USB2 and USB3 interfaces
14 exposed by the Tegra XUSB pad controller.
15
16properties:
17 # required
18 compatible:
19 oneOf:
20 - description: NVIDIA Tegra124
21 const: nvidia,tegra124-xusb
22
23 - description: NVIDIA Tegra132
24 items:
25 - const: nvidia,tegra132-xusb
26 - const: nvidia,tegra124-xusb
27
28 reg:
29 items:
30 - description: base and length of the xHCI host registers
31 - description: base and length of the XUSB FPCI registers
32 - description: base and length of the XUSB IPFS registers
33
34 reg-names:
35 items:
36 - const: hcd
37 - const: fpci
38 - const: ipfs
39
40 interrupts:
41 items:
42 - description: xHCI host interrupt
43 - description: mailbox interrupt
44
45 clocks:
46 items:
47 - description: XUSB host clock
48 - description: XUSB host source clock
49 - description: XUSB Falcon source clock
50 - description: XUSB SuperSpeed clock
51 - description: XUSB SuperSpeed clock divider
52 - description: XUSB SuperSpeed source clock
53 - description: XUSB HighSpeed clock source
54 - description: XUSB FullSpeed clock source
55 - description: USB PLL
56 - description: reference clock
57 - description: I/O PLL
58
59 clock-names:
60 items:
61 - const: xusb_host
62 - const: xusb_host_src
63 - const: xusb_falcon_src
64 - const: xusb_ss
65 - const: xusb_ss_div2
66 - const: xusb_ss_src
67 - const: xusb_hs_src
68 - const: xusb_fs_src
69 - const: pll_u_480m
70 - const: clk_m
71 - const: pll_e
72
73 resets:
74 items:
75 - description: reset for the XUSB host controller
76 - description: reset for the SuperSpeed logic
77 - description: shared reset for xusb_{ss,hs,fs,falcon,host}_src.
78
79 reset-names:
80 items:
81 - const: xusb_host
82 - const: xusb_ss
83 - const: xusb_src
84
85 nvidia,xusb-padctl:
86 $ref: /schemas/types.yaml#/definitions/phandle
87 description: phandle to the XUSB pad controller that is used to configure
88 the USB pads used by the XHCI controller
89
90 # optional
91 phys:
92 minItems: 1
93 maxItems: 7
94
95 phy-names:
96 minItems: 1
97 maxItems: 7
98 items:
99 enum:
100 - usb2-0
101 - usb2-1
102 - usb2-2
103 - hsic-0
104 - hsic-1
105 - usb3-0
106 - usb3-1
107
108 avddio-pex-supply:
109 description: PCIe/USB3 analog logic power supply. Must supply 1.05 V.
110
111 dvddio-pex-supply:
112 description: PCIe/USB3 digital logic power supply. Must supply 1.05 V.
113
114 avdd-usb-supply:
115 description: USB controller power supply. Must supply 3.3 V.
116
117 avdd-pll-utmip-supply:
118 description: UTMI PLL power supply. Must supply 1.8 V.
119
120 avdd-pll-erefe-supply:
121 description: PLLE reference PLL power supply. Must supply 1.05 V.
122
123 avdd-usb-ss-pll-supply:
124 description: PCIe/USB3 PLL power supply. Must supply 1.05 V.
125
126 hvdd-usb-ss-supply:
127 description: High-voltage PCIe/USB3 power supply. Must supply 3.3 V.
128
129 hvdd-usb-ss-pll-e-supply:
130 description: High-voltage PLLE power supply. Must supply 3.3 V.
131
132allOf:
133 - $ref: usb-xhci.yaml
134
135unevaluatedProperties: false
136
137required:
138 - compatible
139 - reg
140 - reg-names
141 - interrupts
142 - clocks
143 - clock-names
144 - resets
145 - reset-names
146 - nvidia,xusb-padctl
147 - phys
148 - phy-names
149 - avddio-pex-supply
150 - dvddio-pex-supply
151 - avdd-usb-supply
152 - hvdd-usb-ss-supply
153
154examples:
155 - |
156 #include <dt-bindings/clock/tegra124-car.h>
157 #include <dt-bindings/interrupt-controller/arm-gic.h>
158
159 usb@70090000 {
160 compatible = "nvidia,tegra124-xusb";
161 reg = <0x70090000 0x8000>,
162 <0x70098000 0x1000>,
163 <0x70099000 0x1000>;
164 reg-names = "hcd", "fpci", "ipfs";
165
166 interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>,
167 <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>;
168
169 clocks = <&tegra_car TEGRA124_CLK_XUSB_HOST>,
170 <&tegra_car TEGRA124_CLK_XUSB_HOST_SRC>,
171 <&tegra_car TEGRA124_CLK_XUSB_FALCON_SRC>,
172 <&tegra_car TEGRA124_CLK_XUSB_SS>,
173 <&tegra_car TEGRA124_CLK_XUSB_SS_DIV2>,
174 <&tegra_car TEGRA124_CLK_XUSB_SS_SRC>,
175 <&tegra_car TEGRA124_CLK_XUSB_HS_SRC>,
176 <&tegra_car TEGRA124_CLK_XUSB_FS_SRC>,
177 <&tegra_car TEGRA124_CLK_PLL_U_480M>,
178 <&tegra_car TEGRA124_CLK_CLK_M>,
179 <&tegra_car TEGRA124_CLK_PLL_E>;
180 clock-names = "xusb_host", "xusb_host_src", "xusb_falcon_src",
181 "xusb_ss", "xusb_ss_div2", "xusb_ss_src",
182 "xusb_hs_src", "xusb_fs_src", "pll_u_480m",
183 "clk_m", "pll_e";
184 resets = <&tegra_car 89>, <&tegra_car 156>, <&tegra_car 143>;
185 reset-names = "xusb_host", "xusb_ss", "xusb_src";
186
187 nvidia,xusb-padctl = <&padctl>;
188
189 phys = <&phy_usb2_1>, <&phy_usb2_2>, <&phy_pcie_0>;
190 phy-names = "usb2-1", "usb2-2", "usb3-0";
191
192 avddio-pex-supply = <&vdd_1v05_run>;
193 dvddio-pex-supply = <&vdd_1v05_run>;
194 avdd-usb-supply = <&vdd_3v3_lp0>;
195 avdd-pll-utmip-supply = <&vddio_1v8>;
196 avdd-pll-erefe-supply = <&avdd_1v05_run>;
197 avdd-usb-ss-pll-supply = <&vdd_1v05_run>;
198 hvdd-usb-ss-supply = <&vdd_3v3_lp0>;
199 hvdd-usb-ss-pll-e-supply = <&vdd_3v3_lp0>;
200 };