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Hao Zhangc13cbcf2014-10-22 16:32:33 +03001/*
2 * Keystone2: DDR3 initialization
3 *
4 * (C) Copyright 2014
5 * Texas Instruments Incorporated, <www.ti.com>
6 *
7 * SPDX-License-Identifier: GPL-2.0+
8 */
9
10#include <common.h>
11#include "ddr3_cfg.h"
12#include <asm/arch/ddr3.h>
13
14static int ddr3_size;
15static struct pll_init_data ddr3_400 = DDR3_PLL_400;
16
17void ddr3_init(void)
18{
19 init_pll(&ddr3_400);
20
21 /* No SO-DIMM, 2GB discreet DDR */
22 printf("DRAM: 2 GiB\n");
23 ddr3_size = 2;
24
25 /* Reset DDR3 PHY after PLL enabled */
26 ddr3_reset_ddrphy();
27
28 ddr3_init_ddrphy(KS2_DDR3A_DDRPHYC, &ddr3phy_1600_2g);
29 ddr3_init_ddremif(KS2_DDR3A_EMIF_CTRL_BASE, &ddr3_1600_2g);
30}
31
32/**
33 * ddr3_get_size - return ddr3 size in GiB
34 */
35int ddr3_get_size(void)
36{
37 return ddr3_size;
38}