Hao Zhang | c13cbcf | 2014-10-22 16:32:33 +0300 | [diff] [blame^] | 1 | /* |
| 2 | * K2L EVM : Board initialization |
| 3 | * |
| 4 | * (C) Copyright 2014 |
| 5 | * Texas Instruments Incorporated, <www.ti.com> |
| 6 | * |
| 7 | * SPDX-License-Identifier: GPL-2.0+ |
| 8 | */ |
| 9 | |
| 10 | #include <common.h> |
| 11 | #include <asm/arch/ddr3.h> |
| 12 | #include <asm/arch/hardware.h> |
| 13 | #include <asm/ti-common/ti-aemif.h> |
| 14 | |
| 15 | DECLARE_GLOBAL_DATA_PTR; |
| 16 | |
| 17 | unsigned int external_clk[ext_clk_count] = { |
| 18 | [sys_clk] = 122880000, |
| 19 | [alt_core_clk] = 100000000, |
| 20 | [pa_clk] = 122880000, |
| 21 | [tetris_clk] = 122880000, |
| 22 | [ddr3_clk] = 100000000, |
| 23 | [pcie_clk] = 100000000, |
| 24 | [sgmii_clk] = 156250000, |
| 25 | [usb_clk] = 100000000, |
| 26 | }; |
| 27 | |
| 28 | static struct pll_init_data core_pll_config[] = { |
| 29 | CORE_PLL_799, |
| 30 | CORE_PLL_1000, |
| 31 | CORE_PLL_1198, |
| 32 | }; |
| 33 | |
| 34 | static struct pll_init_data tetris_pll_config[] = { |
| 35 | TETRIS_PLL_799, |
| 36 | TETRIS_PLL_1000, |
| 37 | TETRIS_PLL_1198, |
| 38 | TETRIS_PLL_1352, |
| 39 | TETRIS_PLL_1401, |
| 40 | }; |
| 41 | |
| 42 | static struct pll_init_data pa_pll_config = |
| 43 | PASS_PLL_983; |
| 44 | |
| 45 | #ifdef CONFIG_BOARD_EARLY_INIT_F |
| 46 | int board_early_init_f(void) |
| 47 | { |
| 48 | int speed; |
| 49 | |
| 50 | speed = get_max_dev_speed(); |
| 51 | init_pll(&core_pll_config[speed]); |
| 52 | |
| 53 | init_pll(&pa_pll_config); |
| 54 | |
| 55 | speed = get_max_arm_speed(); |
| 56 | init_pll(&tetris_pll_config[speed]); |
| 57 | |
| 58 | return 0; |
| 59 | } |
| 60 | #endif |
| 61 | |
| 62 | #ifdef CONFIG_SPL_BUILD |
| 63 | static struct pll_init_data spl_pll_config[] = { |
| 64 | CORE_PLL_799, |
| 65 | TETRIS_PLL_491, |
| 66 | }; |
| 67 | |
| 68 | void spl_init_keystone_plls(void) |
| 69 | { |
| 70 | init_plls(ARRAY_SIZE(spl_pll_config), spl_pll_config); |
| 71 | } |
| 72 | #endif |