Michael Schwingen | 06a9e12 | 2008-01-16 19:53:23 +0100 | [diff] [blame] | 1 | /* |
| 2 | * (C) Copyright 2007 |
| 3 | * Michael Schwingen, michael@schwingen.org |
| 4 | * |
| 5 | * (C) Copyright 2006 |
| 6 | * Stefan Roese, DENX Software Engineering, sr@denx.de. |
| 7 | * |
| 8 | * (C) Copyright 2002 |
| 9 | * Kyle Harris, Nexus Technologies, Inc. kharris@nexus-tech.net |
| 10 | * |
| 11 | * (C) Copyright 2002 |
| 12 | * Sysgo Real-Time Solutions, GmbH <www.elinos.com> |
| 13 | * Marius Groeger <mgroeger@sysgo.de> |
| 14 | * |
Wolfgang Denk | d79de1d | 2013-07-08 09:37:19 +0200 | [diff] [blame] | 15 | * SPDX-License-Identifier: GPL-2.0+ |
Michael Schwingen | 06a9e12 | 2008-01-16 19:53:23 +0100 | [diff] [blame] | 16 | */ |
| 17 | |
| 18 | #include <common.h> |
| 19 | #include <command.h> |
| 20 | #include <malloc.h> |
| 21 | #include <asm/arch/ixp425.h> |
Michael Schwingen | 67ea3d9 | 2011-05-23 00:00:07 +0200 | [diff] [blame] | 22 | #include <asm/io.h> |
Michael Schwingen | 06a9e12 | 2008-01-16 19:53:23 +0100 | [diff] [blame] | 23 | #include <miiphy.h> |
Michael Schwingen | 67ea3d9 | 2011-05-23 00:00:07 +0200 | [diff] [blame] | 24 | #ifdef CONFIG_PCI |
| 25 | #include <pci.h> |
| 26 | #include <asm/arch/ixp425pci.h> |
| 27 | #endif |
Michael Schwingen | 06a9e12 | 2008-01-16 19:53:23 +0100 | [diff] [blame] | 28 | |
| 29 | #include "actux4_hw.h" |
| 30 | |
| 31 | DECLARE_GLOBAL_DATA_PTR; |
| 32 | |
Michael Schwingen | 67ea3d9 | 2011-05-23 00:00:07 +0200 | [diff] [blame] | 33 | int board_early_init_f(void) |
| 34 | { |
| 35 | writel(0xbd113c42, IXP425_EXP_CS1); |
| 36 | return 0; |
| 37 | } |
| 38 | |
| 39 | int board_init(void) |
Michael Schwingen | 06a9e12 | 2008-01-16 19:53:23 +0100 | [diff] [blame] | 40 | { |
Michael Schwingen | 06a9e12 | 2008-01-16 19:53:23 +0100 | [diff] [blame] | 41 | /* adress of boot parameters */ |
| 42 | gd->bd->bi_boot_params = 0x00000100; |
| 43 | |
Michael Schwingen | 67ea3d9 | 2011-05-23 00:00:07 +0200 | [diff] [blame] | 44 | GPIO_OUTPUT_CLEAR(CONFIG_SYS_GPIO_nPWRON); |
| 45 | GPIO_OUTPUT_ENABLE(CONFIG_SYS_GPIO_nPWRON); |
Michael Schwingen | 06a9e12 | 2008-01-16 19:53:23 +0100 | [diff] [blame] | 46 | |
Michael Schwingen | 67ea3d9 | 2011-05-23 00:00:07 +0200 | [diff] [blame] | 47 | GPIO_OUTPUT_CLEAR(CONFIG_SYS_GPIO_IORST); |
| 48 | GPIO_OUTPUT_ENABLE(CONFIG_SYS_GPIO_IORST); |
Michael Schwingen | 06a9e12 | 2008-01-16 19:53:23 +0100 | [diff] [blame] | 49 | |
| 50 | /* led not populated on board*/ |
Michael Schwingen | 67ea3d9 | 2011-05-23 00:00:07 +0200 | [diff] [blame] | 51 | GPIO_OUTPUT_ENABLE(CONFIG_SYS_GPIO_LED3); |
| 52 | GPIO_OUTPUT_SET(CONFIG_SYS_GPIO_LED3); |
Michael Schwingen | 06a9e12 | 2008-01-16 19:53:23 +0100 | [diff] [blame] | 53 | |
| 54 | /* middle LED */ |
Michael Schwingen | 67ea3d9 | 2011-05-23 00:00:07 +0200 | [diff] [blame] | 55 | GPIO_OUTPUT_ENABLE(CONFIG_SYS_GPIO_LED2); |
| 56 | GPIO_OUTPUT_SET(CONFIG_SYS_GPIO_LED2); |
Michael Schwingen | 06a9e12 | 2008-01-16 19:53:23 +0100 | [diff] [blame] | 57 | |
| 58 | /* right LED */ |
| 59 | /* weak pulldown = LED weak on */ |
Michael Schwingen | 67ea3d9 | 2011-05-23 00:00:07 +0200 | [diff] [blame] | 60 | GPIO_OUTPUT_DISABLE(CONFIG_SYS_GPIO_LED1); |
| 61 | GPIO_OUTPUT_SET(CONFIG_SYS_GPIO_LED1); |
Michael Schwingen | 06a9e12 | 2008-01-16 19:53:23 +0100 | [diff] [blame] | 62 | |
| 63 | /* Setup GPIO's for Interrupt inputs */ |
Michael Schwingen | 67ea3d9 | 2011-05-23 00:00:07 +0200 | [diff] [blame] | 64 | GPIO_OUTPUT_DISABLE(CONFIG_SYS_GPIO_USBINTA); |
| 65 | GPIO_OUTPUT_DISABLE(CONFIG_SYS_GPIO_USBINTB); |
| 66 | GPIO_OUTPUT_DISABLE(CONFIG_SYS_GPIO_USBINTC); |
| 67 | GPIO_OUTPUT_DISABLE(CONFIG_SYS_GPIO_RTCINT); |
| 68 | GPIO_OUTPUT_DISABLE(CONFIG_SYS_GPIO_PCI_INTA); |
| 69 | GPIO_OUTPUT_DISABLE(CONFIG_SYS_GPIO_PCI_INTB); |
Michael Schwingen | 06a9e12 | 2008-01-16 19:53:23 +0100 | [diff] [blame] | 70 | |
Michael Schwingen | 67ea3d9 | 2011-05-23 00:00:07 +0200 | [diff] [blame] | 71 | GPIO_INT_ACT_LOW_SET(CONFIG_SYS_GPIO_USBINTA); |
| 72 | GPIO_INT_ACT_LOW_SET(CONFIG_SYS_GPIO_USBINTB); |
| 73 | GPIO_INT_ACT_LOW_SET(CONFIG_SYS_GPIO_USBINTC); |
| 74 | GPIO_INT_ACT_LOW_SET(CONFIG_SYS_GPIO_RTCINT); |
| 75 | GPIO_INT_ACT_LOW_SET(CONFIG_SYS_GPIO_PCI_INTA); |
| 76 | GPIO_INT_ACT_LOW_SET(CONFIG_SYS_GPIO_PCI_INTB); |
Michael Schwingen | 06a9e12 | 2008-01-16 19:53:23 +0100 | [diff] [blame] | 77 | |
| 78 | /* Setup GPIO's for 33MHz clock output */ |
Michael Schwingen | 67ea3d9 | 2011-05-23 00:00:07 +0200 | [diff] [blame] | 79 | writel(0x011001FF, IXP425_GPIO_GPCLKR); |
| 80 | GPIO_OUTPUT_ENABLE(CONFIG_SYS_GPIO_EXTBUS_CLK); |
| 81 | GPIO_OUTPUT_ENABLE(CONFIG_SYS_GPIO_PCI_CLK); |
Michael Schwingen | 06a9e12 | 2008-01-16 19:53:23 +0100 | [diff] [blame] | 82 | |
Michael Schwingen | 67ea3d9 | 2011-05-23 00:00:07 +0200 | [diff] [blame] | 83 | udelay(10000); |
| 84 | GPIO_OUTPUT_SET(CONFIG_SYS_GPIO_IORST); |
| 85 | udelay(10000); |
| 86 | GPIO_OUTPUT_CLEAR(CONFIG_SYS_GPIO_IORST); |
| 87 | udelay(10000); |
| 88 | GPIO_OUTPUT_SET(CONFIG_SYS_GPIO_IORST); |
Michael Schwingen | 06a9e12 | 2008-01-16 19:53:23 +0100 | [diff] [blame] | 89 | |
| 90 | return 0; |
| 91 | } |
| 92 | |
| 93 | /* Check Board Identity */ |
Michael Schwingen | 67ea3d9 | 2011-05-23 00:00:07 +0200 | [diff] [blame] | 94 | int checkboard(void) |
Michael Schwingen | 06a9e12 | 2008-01-16 19:53:23 +0100 | [diff] [blame] | 95 | { |
Michael Schwingen | 67ea3d9 | 2011-05-23 00:00:07 +0200 | [diff] [blame] | 96 | puts("Board: AcTux-4\n"); |
| 97 | return 0; |
Michael Schwingen | 06a9e12 | 2008-01-16 19:53:23 +0100 | [diff] [blame] | 98 | } |
| 99 | |
Michael Schwingen | 67ea3d9 | 2011-05-23 00:00:07 +0200 | [diff] [blame] | 100 | int dram_init(void) |
Michael Schwingen | 06a9e12 | 2008-01-16 19:53:23 +0100 | [diff] [blame] | 101 | { |
Michael Schwingen | 67ea3d9 | 2011-05-23 00:00:07 +0200 | [diff] [blame] | 102 | gd->ram_size = get_ram_size(CONFIG_SYS_SDRAM_BASE, 128<<20); |
| 103 | return 0; |
| 104 | } |
Michael Schwingen | 06a9e12 | 2008-01-16 19:53:23 +0100 | [diff] [blame] | 105 | |
Michael Schwingen | 67ea3d9 | 2011-05-23 00:00:07 +0200 | [diff] [blame] | 106 | #ifdef CONFIG_PCI |
| 107 | struct pci_controller hose; |
| 108 | |
| 109 | void pci_init_board(void) |
| 110 | { |
| 111 | pci_ixp_init(&hose); |
Michael Schwingen | 06a9e12 | 2008-01-16 19:53:23 +0100 | [diff] [blame] | 112 | } |
Michael Schwingen | 67ea3d9 | 2011-05-23 00:00:07 +0200 | [diff] [blame] | 113 | #endif |
Michael Schwingen | 06a9e12 | 2008-01-16 19:53:23 +0100 | [diff] [blame] | 114 | |
| 115 | /* |
| 116 | * Hardcoded flash setup: |
| 117 | * Flash 0 is a non-CFI SST 39VF020 flash, 8 bit flash / 8 bit bus. |
| 118 | * Flash 1 is an Intel *16 flash using the CFI driver. |
| 119 | */ |
Michael Schwingen | 67ea3d9 | 2011-05-23 00:00:07 +0200 | [diff] [blame] | 120 | ulong board_flash_get_legacy(ulong base, int banknum, flash_info_t *info) |
Michael Schwingen | 06a9e12 | 2008-01-16 19:53:23 +0100 | [diff] [blame] | 121 | { |
| 122 | if (banknum == 0) { /* non-CFI boot flash */ |
| 123 | info->portwidth = 1; |
| 124 | info->chipwidth = 1; |
| 125 | info->interface = FLASH_CFI_X8; |
| 126 | return 1; |
| 127 | } else |
| 128 | return 0; |
| 129 | } |