blob: 81c545884eb7210d659a71274f4da8bd7785c6a2 [file] [log] [blame]
Michael Schwingen06a9e122008-01-16 19:53:23 +01001/*
2 * (C) Copyright 2007
3 * Michael Schwingen, michael@schwingen.org
4 *
5 * (C) Copyright 2006
6 * Stefan Roese, DENX Software Engineering, sr@denx.de.
7 *
8 * (C) Copyright 2002
9 * Kyle Harris, Nexus Technologies, Inc. kharris@nexus-tech.net
10 *
11 * (C) Copyright 2002
12 * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
13 * Marius Groeger <mgroeger@sysgo.de>
14 *
Wolfgang Denkd79de1d2013-07-08 09:37:19 +020015 * SPDX-License-Identifier: GPL-2.0+
Michael Schwingen06a9e122008-01-16 19:53:23 +010016 */
17
18#include <common.h>
19#include <command.h>
20#include <malloc.h>
21#include <asm/arch/ixp425.h>
Michael Schwingen67ea3d92011-05-23 00:00:07 +020022#include <asm/io.h>
Michael Schwingen06a9e122008-01-16 19:53:23 +010023#include <miiphy.h>
Michael Schwingen67ea3d92011-05-23 00:00:07 +020024#ifdef CONFIG_PCI
25#include <pci.h>
26#include <asm/arch/ixp425pci.h>
27#endif
Michael Schwingen06a9e122008-01-16 19:53:23 +010028
29#include "actux4_hw.h"
30
31DECLARE_GLOBAL_DATA_PTR;
32
Michael Schwingen67ea3d92011-05-23 00:00:07 +020033int board_early_init_f(void)
34{
35 writel(0xbd113c42, IXP425_EXP_CS1);
36 return 0;
37}
38
39int board_init(void)
Michael Schwingen06a9e122008-01-16 19:53:23 +010040{
Michael Schwingen06a9e122008-01-16 19:53:23 +010041 /* adress of boot parameters */
42 gd->bd->bi_boot_params = 0x00000100;
43
Michael Schwingen67ea3d92011-05-23 00:00:07 +020044 GPIO_OUTPUT_CLEAR(CONFIG_SYS_GPIO_nPWRON);
45 GPIO_OUTPUT_ENABLE(CONFIG_SYS_GPIO_nPWRON);
Michael Schwingen06a9e122008-01-16 19:53:23 +010046
Michael Schwingen67ea3d92011-05-23 00:00:07 +020047 GPIO_OUTPUT_CLEAR(CONFIG_SYS_GPIO_IORST);
48 GPIO_OUTPUT_ENABLE(CONFIG_SYS_GPIO_IORST);
Michael Schwingen06a9e122008-01-16 19:53:23 +010049
50 /* led not populated on board*/
Michael Schwingen67ea3d92011-05-23 00:00:07 +020051 GPIO_OUTPUT_ENABLE(CONFIG_SYS_GPIO_LED3);
52 GPIO_OUTPUT_SET(CONFIG_SYS_GPIO_LED3);
Michael Schwingen06a9e122008-01-16 19:53:23 +010053
54 /* middle LED */
Michael Schwingen67ea3d92011-05-23 00:00:07 +020055 GPIO_OUTPUT_ENABLE(CONFIG_SYS_GPIO_LED2);
56 GPIO_OUTPUT_SET(CONFIG_SYS_GPIO_LED2);
Michael Schwingen06a9e122008-01-16 19:53:23 +010057
58 /* right LED */
59 /* weak pulldown = LED weak on */
Michael Schwingen67ea3d92011-05-23 00:00:07 +020060 GPIO_OUTPUT_DISABLE(CONFIG_SYS_GPIO_LED1);
61 GPIO_OUTPUT_SET(CONFIG_SYS_GPIO_LED1);
Michael Schwingen06a9e122008-01-16 19:53:23 +010062
63 /* Setup GPIO's for Interrupt inputs */
Michael Schwingen67ea3d92011-05-23 00:00:07 +020064 GPIO_OUTPUT_DISABLE(CONFIG_SYS_GPIO_USBINTA);
65 GPIO_OUTPUT_DISABLE(CONFIG_SYS_GPIO_USBINTB);
66 GPIO_OUTPUT_DISABLE(CONFIG_SYS_GPIO_USBINTC);
67 GPIO_OUTPUT_DISABLE(CONFIG_SYS_GPIO_RTCINT);
68 GPIO_OUTPUT_DISABLE(CONFIG_SYS_GPIO_PCI_INTA);
69 GPIO_OUTPUT_DISABLE(CONFIG_SYS_GPIO_PCI_INTB);
Michael Schwingen06a9e122008-01-16 19:53:23 +010070
Michael Schwingen67ea3d92011-05-23 00:00:07 +020071 GPIO_INT_ACT_LOW_SET(CONFIG_SYS_GPIO_USBINTA);
72 GPIO_INT_ACT_LOW_SET(CONFIG_SYS_GPIO_USBINTB);
73 GPIO_INT_ACT_LOW_SET(CONFIG_SYS_GPIO_USBINTC);
74 GPIO_INT_ACT_LOW_SET(CONFIG_SYS_GPIO_RTCINT);
75 GPIO_INT_ACT_LOW_SET(CONFIG_SYS_GPIO_PCI_INTA);
76 GPIO_INT_ACT_LOW_SET(CONFIG_SYS_GPIO_PCI_INTB);
Michael Schwingen06a9e122008-01-16 19:53:23 +010077
78 /* Setup GPIO's for 33MHz clock output */
Michael Schwingen67ea3d92011-05-23 00:00:07 +020079 writel(0x011001FF, IXP425_GPIO_GPCLKR);
80 GPIO_OUTPUT_ENABLE(CONFIG_SYS_GPIO_EXTBUS_CLK);
81 GPIO_OUTPUT_ENABLE(CONFIG_SYS_GPIO_PCI_CLK);
Michael Schwingen06a9e122008-01-16 19:53:23 +010082
Michael Schwingen67ea3d92011-05-23 00:00:07 +020083 udelay(10000);
84 GPIO_OUTPUT_SET(CONFIG_SYS_GPIO_IORST);
85 udelay(10000);
86 GPIO_OUTPUT_CLEAR(CONFIG_SYS_GPIO_IORST);
87 udelay(10000);
88 GPIO_OUTPUT_SET(CONFIG_SYS_GPIO_IORST);
Michael Schwingen06a9e122008-01-16 19:53:23 +010089
90 return 0;
91}
92
93/* Check Board Identity */
Michael Schwingen67ea3d92011-05-23 00:00:07 +020094int checkboard(void)
Michael Schwingen06a9e122008-01-16 19:53:23 +010095{
Michael Schwingen67ea3d92011-05-23 00:00:07 +020096 puts("Board: AcTux-4\n");
97 return 0;
Michael Schwingen06a9e122008-01-16 19:53:23 +010098}
99
Michael Schwingen67ea3d92011-05-23 00:00:07 +0200100int dram_init(void)
Michael Schwingen06a9e122008-01-16 19:53:23 +0100101{
Michael Schwingen67ea3d92011-05-23 00:00:07 +0200102 gd->ram_size = get_ram_size(CONFIG_SYS_SDRAM_BASE, 128<<20);
103 return 0;
104}
Michael Schwingen06a9e122008-01-16 19:53:23 +0100105
Michael Schwingen67ea3d92011-05-23 00:00:07 +0200106#ifdef CONFIG_PCI
107struct pci_controller hose;
108
109void pci_init_board(void)
110{
111 pci_ixp_init(&hose);
Michael Schwingen06a9e122008-01-16 19:53:23 +0100112}
Michael Schwingen67ea3d92011-05-23 00:00:07 +0200113#endif
Michael Schwingen06a9e122008-01-16 19:53:23 +0100114
115/*
116 * Hardcoded flash setup:
117 * Flash 0 is a non-CFI SST 39VF020 flash, 8 bit flash / 8 bit bus.
118 * Flash 1 is an Intel *16 flash using the CFI driver.
119 */
Michael Schwingen67ea3d92011-05-23 00:00:07 +0200120ulong board_flash_get_legacy(ulong base, int banknum, flash_info_t *info)
Michael Schwingen06a9e122008-01-16 19:53:23 +0100121{
122 if (banknum == 0) { /* non-CFI boot flash */
123 info->portwidth = 1;
124 info->chipwidth = 1;
125 info->interface = FLASH_CFI_X8;
126 return 1;
127 } else
128 return 0;
129}