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git01.mediatek.com / filogic / uboot / c1285cb57e1eeff87294ad83adcbe5e7ad343a9b / . / include / configs / mgcoge3un.h
blob: ac01a312006caaa7c073ed6d005d709534b0ee1d [file] [log] [blame]
Heiko Schocher8dd6ab72011-02-22 08:30:46 +0100[diff] [blame]1/*
2 * (C) Copyright 2009
3 * Marvell Semiconductor <www.marvell.com>
4 * Prafulla Wadaskar <prafulla@marvell.com>
5 *
6 * (C) Copyright 2009
7 * Stefan Roese, DENX Software Engineering, sr@denx.de.
8 *
9 * (C) Copyright 2010-2011
10 * Holger Brunck, Keymile GmbH Hannover, holger.brunck@keymile.com
11 *
12 * See file CREDITS for list of people who contributed to this
13 * project.
14 *
15 * This program is free software; you can redistribute it and/or
16 * modify it under the terms of the GNU General Public License as
17 * published by the Free Software Foundation; either version 2 of
18 * the License, or (at your option) any later version.
19 *
20 * This program is distributed in the hope that it will be useful,
21 * but WITHOUT ANY WARRANTY; without even the implied warranty of
22 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
23 * GNU General Public License for more details.
24 *
25 * You should have received a copy of the GNU General Public License
26 * along with this program; if not, write to the Free Software
27 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
28 * MA 02110-1301 USA
29 */
30
31/* for linking errors see
32 * http://lists.denx.de/pipermail/u-boot/2009-July/057350.html */
33
Valentin Longchamp6453c9f2011-05-31 02:12:50 +0000[diff] [blame]34#ifndef _CONFIG_MGCOGE3UN_H
35#define _CONFIG_MGCOGE3UN_H
Heiko Schocher8dd6ab72011-02-22 08:30:46 +0100[diff] [blame]36
37/* include common defines/options for all arm based Keymile boards */
Valentin Longchamp2f968d82011-05-04 01:47:33 +0000[diff] [blame]38#include "km/km_arm.h"
Heiko Schocher8dd6ab72011-02-22 08:30:46 +0100[diff] [blame]39
40/*
41 * Version number information
42 */
Valentin Longchamp6453c9f2011-05-31 02:12:50 +0000[diff] [blame]43#define CONFIG_IDENT_STRING "\nKeymile MGCOGE3UN"
44#define CONFIG_HOSTNAME mgcoge3un
45#define CONFIG_MGCOGE3UN
Heiko Schocher8dd6ab72011-02-22 08:30:46 +0100[diff] [blame]46
Heiko Schochere4533af2011-03-08 10:53:51 +0100[diff] [blame]47#define KM_IVM_BUS "pca9547:70:9" /* I2C2 (Mux-Port 1)*/
48#define KM_ENV_BUS "pca9547:70:d" /* I2C2 (Mux-Port 5)*/
49
Valentin Longchamp6453c9f2011-05-31 02:12:50 +0000[diff] [blame]50/* we use a new RAM type on mgcoge3un board */
Holger Brunckc1e09212011-06-16 18:11:15 +0530[diff] [blame]51#undef CONFIG_SYS_KWD_CONFIG
Valentin Longchamp6453c9f2011-05-31 02:12:50 +0000[diff] [blame]52#define CONFIG_SYS_KWD_CONFIG $(SRCTREE)/$(CONFIG_BOARDDIR)/kwbimage-memphis.cfg
53
Holger Brunck4de3cdd2011-05-31 02:12:52 +0000[diff] [blame]54/*
55 * mgcoge3un has a fixed link to the marvell switch
56 * with 100MB full duplex and autoneg off, for this
57 * reason we have to change the default settings
58 */
59#define PORT_SERIAL_CONTROL_VALUE ( \
60 MVGBE_FORCE_LINK_PASS | \
61 MVGBE_DIS_AUTO_NEG_FOR_DUPLX | \
62 MVGBE_DIS_AUTO_NEG_FOR_FLOW_CTRL | \
63 MVGBE_ADV_NO_FLOW_CTRL | \
64 MVGBE_FORCE_FC_MODE_NO_PAUSE_DIS_TX | \
65 MVGBE_FORCE_BP_MODE_NO_JAM | \
66 (1 << 9) /* Reserved bit has to be 1 */ | \
67 MVGBE_DO_NOT_FORCE_LINK_FAIL | \
68 MVGBE_DIS_AUTO_NEG_SPEED_GMII | \
69 MVGBE_DTE_ADV_0 | \
70 MVGBE_MIIPHY_MAC_MODE | \
71 MVGBE_AUTO_NEG_NO_CHANGE | \
72 MVGBE_MAX_RX_PACKET_1552BYTE | \
73 MVGBE_CLR_EXT_LOOPBACK | \
74 MVGBE_SET_FULL_DUPLEX_MODE | \
75 MVGBE_DIS_FLOW_CTRL_TX_RX_IN_FULL_DUPLEX |\
76 MVGBE_SET_GMII_SPEED_TO_10_100 |\
77 MVGBE_SET_MII_SPEED_TO_100)
78
Holger Brunck1f974e92011-06-16 18:11:15 +0530[diff] [blame]79/*
80 * PCIe port not used on mgcoge3un
81 */
82#undef CONFIG_KIRKWOOD_PCIE_INIT
83
Valentin Longchamp6453c9f2011-05-31 02:12:50 +0000[diff] [blame]84#endif /* _CONFIG_MGCOGE3UN_H */