blob: 49b3e768c89826b113c10516613ce2debeca6374 [file] [log] [blame]
Patrick Delaunay48c5e902020-03-06 17:54:41 +01001// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
2/*
3 * Copyright (C) STMicroelectronics 2019 - All Rights Reserved
4 * Author: Alexandre Torgue <alexandre.torgue@st.com> for STMicroelectronics.
5 */
6
7#include <dt-bindings/gpio/gpio.h>
8#include <dt-bindings/mfd/st,stpmic1.h>
9
10/ {
11 memory@c0000000 {
12 device_type = "memory";
13 reg = <0xc0000000 0x20000000>;
14 };
15
16 reserved-memory {
17 #address-cells = <1>;
18 #size-cells = <1>;
19 ranges;
20
21 mcuram2: mcuram2@10000000 {
22 compatible = "shared-dma-pool";
23 reg = <0x10000000 0x40000>;
24 no-map;
25 };
26
27 vdev0vring0: vdev0vring0@10040000 {
28 compatible = "shared-dma-pool";
29 reg = <0x10040000 0x1000>;
30 no-map;
31 };
32
33 vdev0vring1: vdev0vring1@10041000 {
34 compatible = "shared-dma-pool";
35 reg = <0x10041000 0x1000>;
36 no-map;
37 };
38
39 vdev0buffer: vdev0buffer@10042000 {
40 compatible = "shared-dma-pool";
41 reg = <0x10042000 0x4000>;
42 no-map;
43 };
44
45 mcuram: mcuram@30000000 {
46 compatible = "shared-dma-pool";
47 reg = <0x30000000 0x40000>;
48 no-map;
49 };
50
51 retram: retram@38000000 {
52 compatible = "shared-dma-pool";
53 reg = <0x38000000 0x10000>;
54 no-map;
55 };
56
57 gpu_reserved: gpu@d4000000 {
58 reg = <0xd4000000 0x4000000>;
59 no-map;
60 };
Patrick Delaunay48c5e902020-03-06 17:54:41 +010061 };
62
63 led {
64 compatible = "gpio-leds";
Patrick Delaunay551efca2020-09-16 10:01:32 +020065 led-blue {
Patrick Delaunay48c5e902020-03-06 17:54:41 +010066 label = "heartbeat";
67 gpios = <&gpiod 11 GPIO_ACTIVE_HIGH>;
68 linux,default-trigger = "heartbeat";
69 default-state = "off";
70 };
71 };
72
73 sound {
74 compatible = "audio-graph-card";
Patrick Delaunay7f2cba42023-04-24 16:21:10 +020075 label = "STM32MP15-DK";
Patrick Delaunay48c5e902020-03-06 17:54:41 +010076 routing =
77 "Playback" , "MCLK",
78 "Capture" , "MCLK",
79 "MICL" , "Mic Bias";
80 dais = <&sai2a_port &sai2b_port &i2s2_port>;
81 status = "okay";
82 };
Patrick Delaunay6d397052021-01-11 12:33:36 +010083
84 vin: vin {
85 compatible = "regulator-fixed";
86 regulator-name = "vin";
87 regulator-min-microvolt = <5000000>;
88 regulator-max-microvolt = <5000000>;
89 regulator-always-on;
90 };
Patrick Delaunay48c5e902020-03-06 17:54:41 +010091};
92
93&adc {
94 pinctrl-names = "default";
95 pinctrl-0 = <&adc12_ain_pins_a>, <&adc12_usb_cc_pins_a>;
96 vdd-supply = <&vdd>;
97 vdda-supply = <&vdd>;
98 vref-supply = <&vrefbuf>;
99 status = "disabled";
100 adc1: adc@0 {
101 /*
102 * Type-C USB_PWR_CC1 & USB_PWR_CC2 on in18 & in19.
103 * Use at least 5 * RC time, e.g. 5 * (Rp + Rd) * C:
104 * 5 * (56 + 47kOhms) * 5pF => 2.5us.
105 * Use arbitrary margin here (e.g. 5us).
106 */
107 st,min-sample-time-nsecs = <5000>;
108 /* AIN connector, USB Type-C CC1 & CC2 */
109 st,adc-channels = <0 1 6 13 18 19>;
110 status = "okay";
111 };
112 adc2: adc@100 {
113 /* AIN connector, USB Type-C CC1 & CC2 */
114 st,adc-channels = <0 1 2 6 18 19>;
115 st,min-sample-time-nsecs = <5000>;
116 status = "okay";
117 };
118};
119
120&cec {
121 pinctrl-names = "default", "sleep";
122 pinctrl-0 = <&cec_pins_b>;
Patrick Delaunaycdc2ca12020-07-06 13:26:53 +0200123 pinctrl-1 = <&cec_sleep_pins_b>;
Patrick Delaunay48c5e902020-03-06 17:54:41 +0100124 status = "okay";
125};
126
Patrick Delaunay6d397052021-01-11 12:33:36 +0100127&crc1 {
128 status = "okay";
129};
130
Patrick Delaunaycdc2ca12020-07-06 13:26:53 +0200131&dts {
132 status = "okay";
133};
134
Patrick Delaunay0e20c1f2020-05-25 12:19:42 +0200135&cpu0{
136 cpu-supply = <&vddcore>;
137};
138
139&cpu1{
140 cpu-supply = <&vddcore>;
141};
142
Patrick Delaunay48c5e902020-03-06 17:54:41 +0100143&ethernet0 {
144 status = "okay";
145 pinctrl-0 = <&ethernet0_rgmii_pins_a>;
Patrick Delaunaycdc2ca12020-07-06 13:26:53 +0200146 pinctrl-1 = <&ethernet0_rgmii_sleep_pins_a>;
Patrick Delaunay48c5e902020-03-06 17:54:41 +0100147 pinctrl-names = "default", "sleep";
148 phy-mode = "rgmii-id";
149 max-speed = <1000>;
150 phy-handle = <&phy0>;
151
Patrick Delaunay7f2cba42023-04-24 16:21:10 +0200152 mdio {
Patrick Delaunay48c5e902020-03-06 17:54:41 +0100153 #address-cells = <1>;
154 #size-cells = <0>;
155 compatible = "snps,dwmac-mdio";
156 phy0: ethernet-phy@0 {
157 reg = <0>;
158 };
159 };
160};
161
162&gpu {
163 contiguous-area = <&gpu_reserved>;
Patrick Delaunay48c5e902020-03-06 17:54:41 +0100164};
165
Patrick Delaunay6d397052021-01-11 12:33:36 +0100166&hash1 {
167 status = "okay";
168};
169
Patrick Delaunay48c5e902020-03-06 17:54:41 +0100170&i2c1 {
171 pinctrl-names = "default", "sleep";
172 pinctrl-0 = <&i2c1_pins_a>;
Patrick Delaunaycdc2ca12020-07-06 13:26:53 +0200173 pinctrl-1 = <&i2c1_sleep_pins_a>;
Patrick Delaunay48c5e902020-03-06 17:54:41 +0100174 i2c-scl-rising-time-ns = <100>;
175 i2c-scl-falling-time-ns = <7>;
176 status = "okay";
177 /delete-property/dmas;
178 /delete-property/dma-names;
179
180 hdmi-transmitter@39 {
181 compatible = "sil,sii9022";
182 reg = <0x39>;
183 iovcc-supply = <&v3v3_hdmi>;
184 cvcc12-supply = <&v1v2_hdmi>;
185 reset-gpios = <&gpioa 10 GPIO_ACTIVE_LOW>;
186 interrupts = <1 IRQ_TYPE_EDGE_FALLING>;
187 interrupt-parent = <&gpiog>;
188 #sound-dai-cells = <0>;
189 status = "okay";
190
191 ports {
192 #address-cells = <1>;
193 #size-cells = <0>;
194
195 port@0 {
196 reg = <0>;
197 sii9022_in: endpoint {
198 remote-endpoint = <&ltdc_ep0_out>;
199 };
200 };
201
202 port@3 {
203 reg = <3>;
204 sii9022_tx_endpoint: endpoint {
205 remote-endpoint = <&i2s2_endpoint>;
206 };
207 };
208 };
209 };
210
211 cs42l51: cs42l51@4a {
212 compatible = "cirrus,cs42l51";
213 reg = <0x4a>;
214 #sound-dai-cells = <0>;
215 VL-supply = <&v3v3>;
216 VD-supply = <&v1v8_audio>;
217 VA-supply = <&v1v8_audio>;
218 VAHP-supply = <&v1v8_audio>;
219 reset-gpios = <&gpiog 9 GPIO_ACTIVE_LOW>;
220 clocks = <&sai2a>;
221 clock-names = "MCLK";
222 status = "okay";
223
224 cs42l51_port: port {
225 #address-cells = <1>;
226 #size-cells = <0>;
227
228 cs42l51_tx_endpoint: endpoint@0 {
229 reg = <0>;
230 remote-endpoint = <&sai2a_endpoint>;
Patrick Delaunayc4c5c5f2021-10-21 11:54:11 +0200231 frame-master = <&cs42l51_tx_endpoint>;
232 bitclock-master = <&cs42l51_tx_endpoint>;
Patrick Delaunay48c5e902020-03-06 17:54:41 +0100233 };
234
235 cs42l51_rx_endpoint: endpoint@1 {
236 reg = <1>;
237 remote-endpoint = <&sai2b_endpoint>;
Patrick Delaunayc4c5c5f2021-10-21 11:54:11 +0200238 frame-master = <&cs42l51_rx_endpoint>;
239 bitclock-master = <&cs42l51_rx_endpoint>;
Patrick Delaunay48c5e902020-03-06 17:54:41 +0100240 };
241 };
242 };
243};
244
245&i2c4 {
Patrick Delaunaydf0d20a2020-04-30 15:52:46 +0200246 pinctrl-names = "default", "sleep";
Patrick Delaunay48c5e902020-03-06 17:54:41 +0100247 pinctrl-0 = <&i2c4_pins_a>;
Patrick Delaunaycdc2ca12020-07-06 13:26:53 +0200248 pinctrl-1 = <&i2c4_sleep_pins_a>;
Patrick Delaunay48c5e902020-03-06 17:54:41 +0100249 i2c-scl-rising-time-ns = <185>;
250 i2c-scl-falling-time-ns = <20>;
Patrick Delaunaydf0d20a2020-04-30 15:52:46 +0200251 clock-frequency = <400000>;
Patrick Delaunay48c5e902020-03-06 17:54:41 +0100252 status = "okay";
253 /* spare dmas for other usage */
254 /delete-property/dmas;
255 /delete-property/dma-names;
256
Patrick Delaunay6d397052021-01-11 12:33:36 +0100257 stusb1600@28 {
Patrick Delaunay48c5e902020-03-06 17:54:41 +0100258 compatible = "st,stusb1600";
259 reg = <0x28>;
Patrick Delaunay37868aa2021-12-17 16:30:22 +0100260 interrupts = <11 IRQ_TYPE_LEVEL_LOW>;
Patrick Delaunay48c5e902020-03-06 17:54:41 +0100261 interrupt-parent = <&gpioi>;
262 pinctrl-names = "default";
263 pinctrl-0 = <&stusb1600_pins_a>;
Patrick Delaunay48c5e902020-03-06 17:54:41 +0100264 status = "okay";
Patrick Delaunay6d397052021-01-11 12:33:36 +0100265 vdd-supply = <&vin>;
Patrick Delaunay48c5e902020-03-06 17:54:41 +0100266
Patrick Delaunay6d397052021-01-11 12:33:36 +0100267 connector {
Patrick Delaunay48c5e902020-03-06 17:54:41 +0100268 compatible = "usb-c-connector";
269 label = "USB-C";
Patrick Delaunay6d397052021-01-11 12:33:36 +0100270 power-role = "dual";
271 typec-power-opmode = "default";
272
273 port {
274 con_usbotg_hs_ep: endpoint {
275 remote-endpoint = <&usbotg_hs_ep>;
276 };
277 };
Patrick Delaunay48c5e902020-03-06 17:54:41 +0100278 };
279 };
280
281 pmic: stpmic@33 {
282 compatible = "st,stpmic1";
283 reg = <0x33>;
284 interrupts-extended = <&gpioa 0 IRQ_TYPE_EDGE_FALLING>;
285 interrupt-controller;
286 #interrupt-cells = <2>;
287 status = "okay";
288
289 regulators {
290 compatible = "st,stpmic1-regulators";
Patrick Delaunay6d397052021-01-11 12:33:36 +0100291 buck1-supply = <&vin>;
292 buck2-supply = <&vin>;
293 buck3-supply = <&vin>;
294 buck4-supply = <&vin>;
Patrick Delaunay48c5e902020-03-06 17:54:41 +0100295 ldo1-supply = <&v3v3>;
Patrick Delaunay6d397052021-01-11 12:33:36 +0100296 ldo2-supply = <&vin>;
Patrick Delaunay48c5e902020-03-06 17:54:41 +0100297 ldo3-supply = <&vdd_ddr>;
Patrick Delaunay6d397052021-01-11 12:33:36 +0100298 ldo4-supply = <&vin>;
299 ldo5-supply = <&vin>;
Patrick Delaunay48c5e902020-03-06 17:54:41 +0100300 ldo6-supply = <&v3v3>;
Patrick Delaunay6d397052021-01-11 12:33:36 +0100301 vref_ddr-supply = <&vin>;
302 boost-supply = <&vin>;
Patrick Delaunay48c5e902020-03-06 17:54:41 +0100303 pwr_sw1-supply = <&bst_out>;
304 pwr_sw2-supply = <&bst_out>;
305
306 vddcore: buck1 {
307 regulator-name = "vddcore";
308 regulator-min-microvolt = <1200000>;
309 regulator-max-microvolt = <1350000>;
310 regulator-always-on;
311 regulator-initial-mode = <0>;
312 regulator-over-current-protection;
313 };
314
315 vdd_ddr: buck2 {
316 regulator-name = "vdd_ddr";
317 regulator-min-microvolt = <1350000>;
318 regulator-max-microvolt = <1350000>;
319 regulator-always-on;
320 regulator-initial-mode = <0>;
321 regulator-over-current-protection;
322 };
323
324 vdd: buck3 {
325 regulator-name = "vdd";
326 regulator-min-microvolt = <3300000>;
327 regulator-max-microvolt = <3300000>;
328 regulator-always-on;
329 st,mask-reset;
330 regulator-initial-mode = <0>;
331 regulator-over-current-protection;
332 };
333
334 v3v3: buck4 {
335 regulator-name = "v3v3";
336 regulator-min-microvolt = <3300000>;
337 regulator-max-microvolt = <3300000>;
338 regulator-always-on;
339 regulator-over-current-protection;
340 regulator-initial-mode = <0>;
341 };
342
343 v1v8_audio: ldo1 {
344 regulator-name = "v1v8_audio";
345 regulator-min-microvolt = <1800000>;
346 regulator-max-microvolt = <1800000>;
347 regulator-always-on;
348 interrupts = <IT_CURLIM_LDO1 0>;
349 };
350
351 v3v3_hdmi: ldo2 {
352 regulator-name = "v3v3_hdmi";
353 regulator-min-microvolt = <3300000>;
354 regulator-max-microvolt = <3300000>;
355 regulator-always-on;
356 interrupts = <IT_CURLIM_LDO2 0>;
357 };
358
359 vtt_ddr: ldo3 {
360 regulator-name = "vtt_ddr";
361 regulator-min-microvolt = <500000>;
362 regulator-max-microvolt = <750000>;
363 regulator-always-on;
364 regulator-over-current-protection;
365 };
366
367 vdd_usb: ldo4 {
368 regulator-name = "vdd_usb";
Patrick Delaunay48c5e902020-03-06 17:54:41 +0100369 interrupts = <IT_CURLIM_LDO4 0>;
370 };
371
372 vdda: ldo5 {
373 regulator-name = "vdda";
374 regulator-min-microvolt = <2900000>;
375 regulator-max-microvolt = <2900000>;
376 interrupts = <IT_CURLIM_LDO5 0>;
377 regulator-boot-on;
378 };
379
380 v1v2_hdmi: ldo6 {
381 regulator-name = "v1v2_hdmi";
382 regulator-min-microvolt = <1200000>;
383 regulator-max-microvolt = <1200000>;
384 regulator-always-on;
385 interrupts = <IT_CURLIM_LDO6 0>;
386 };
387
388 vref_ddr: vref_ddr {
389 regulator-name = "vref_ddr";
390 regulator-always-on;
Patrick Delaunay48c5e902020-03-06 17:54:41 +0100391 };
392
Patrick Delaunay5be6a7f2022-12-14 16:25:00 +0100393 bst_out: boost {
Patrick Delaunay48c5e902020-03-06 17:54:41 +0100394 regulator-name = "bst_out";
395 interrupts = <IT_OCP_BOOST 0>;
Patrick Delaunay5be6a7f2022-12-14 16:25:00 +0100396 };
Patrick Delaunay48c5e902020-03-06 17:54:41 +0100397
398 vbus_otg: pwr_sw1 {
399 regulator-name = "vbus_otg";
400 interrupts = <IT_OCP_OTG 0>;
Patrick Delaunay5be6a7f2022-12-14 16:25:00 +0100401 };
Patrick Delaunay48c5e902020-03-06 17:54:41 +0100402
Patrick Delaunay5be6a7f2022-12-14 16:25:00 +0100403 vbus_sw: pwr_sw2 {
Patrick Delaunay48c5e902020-03-06 17:54:41 +0100404 regulator-name = "vbus_sw";
405 interrupts = <IT_OCP_SWOUT 0>;
406 regulator-active-discharge = <1>;
Patrick Delaunay5be6a7f2022-12-14 16:25:00 +0100407 };
Patrick Delaunay48c5e902020-03-06 17:54:41 +0100408 };
409
410 onkey {
411 compatible = "st,stpmic1-onkey";
412 interrupts = <IT_PONKEY_F 0>, <IT_PONKEY_R 0>;
413 interrupt-names = "onkey-falling", "onkey-rising";
414 power-off-time-sec = <10>;
415 status = "okay";
416 };
417
418 watchdog {
419 compatible = "st,stpmic1-wdt";
420 status = "disabled";
421 };
422 };
423};
424
Patrick Delaunay551efca2020-09-16 10:01:32 +0200425&i2c5 {
426 pinctrl-names = "default", "sleep";
427 pinctrl-0 = <&i2c5_pins_a>;
428 pinctrl-1 = <&i2c5_sleep_pins_a>;
429 i2c-scl-rising-time-ns = <185>;
430 i2c-scl-falling-time-ns = <20>;
431 clock-frequency = <400000>;
432 /* spare dmas for other usage */
433 /delete-property/dmas;
434 /delete-property/dma-names;
435 status = "disabled";
436};
437
Patrick Delaunay48c5e902020-03-06 17:54:41 +0100438&i2s2 {
439 clocks = <&rcc SPI2>, <&rcc SPI2_K>, <&rcc PLL3_Q>, <&rcc PLL3_R>;
440 clock-names = "pclk", "i2sclk", "x8k", "x11k";
441 pinctrl-names = "default", "sleep";
442 pinctrl-0 = <&i2s2_pins_a>;
Patrick Delaunaycdc2ca12020-07-06 13:26:53 +0200443 pinctrl-1 = <&i2s2_sleep_pins_a>;
Patrick Delaunay48c5e902020-03-06 17:54:41 +0100444 status = "okay";
445
446 i2s2_port: port {
447 i2s2_endpoint: endpoint {
448 remote-endpoint = <&sii9022_tx_endpoint>;
449 format = "i2s";
450 mclk-fs = <256>;
451 };
452 };
453};
454
455&ipcc {
456 status = "okay";
457};
458
459&iwdg2 {
460 timeout-sec = <32>;
461 status = "okay";
462};
463
464&ltdc {
465 pinctrl-names = "default", "sleep";
466 pinctrl-0 = <&ltdc_pins_a>;
Patrick Delaunaycdc2ca12020-07-06 13:26:53 +0200467 pinctrl-1 = <&ltdc_sleep_pins_a>;
Patrick Delaunay48c5e902020-03-06 17:54:41 +0100468 status = "okay";
469
470 port {
Patrick Delaunay48c5e902020-03-06 17:54:41 +0100471 ltdc_ep0_out: endpoint@0 {
472 reg = <0>;
473 remote-endpoint = <&sii9022_in>;
474 };
475 };
476};
477
478&m4_rproc {
479 memory-region = <&retram>, <&mcuram>, <&mcuram2>, <&vdev0vring0>,
480 <&vdev0vring1>, <&vdev0buffer>;
Patrick Delaunayc4c5c5f2021-10-21 11:54:11 +0200481 mboxes = <&ipcc 0>, <&ipcc 1>, <&ipcc 2>, <&ipcc 3>;
482 mbox-names = "vq0", "vq1", "shutdown", "detach";
Patrick Delaunay48c5e902020-03-06 17:54:41 +0100483 interrupt-parent = <&exti>;
484 interrupts = <68 1>;
485 status = "okay";
486};
487
488&pwr_regulators {
489 vdd-supply = <&vdd>;
490 vdd_3v3_usbfs-supply = <&vdd_usb>;
491};
492
493&rng1 {
494 status = "okay";
495};
496
497&rtc {
498 status = "okay";
499};
500
501&sai2 {
502 clocks = <&rcc SAI2>, <&rcc PLL3_Q>, <&rcc PLL3_R>;
503 clock-names = "pclk", "x8k", "x11k";
504 pinctrl-names = "default", "sleep";
505 pinctrl-0 = <&sai2a_pins_a>, <&sai2b_pins_b>;
506 pinctrl-1 = <&sai2a_sleep_pins_a>, <&sai2b_sleep_pins_b>;
507 status = "okay";
508
509 sai2a: audio-controller@4400b004 {
510 #clock-cells = <0>;
511 dma-names = "tx";
Patrick Delaunay48c5e902020-03-06 17:54:41 +0100512 status = "okay";
513
514 sai2a_port: port {
515 sai2a_endpoint: endpoint {
516 remote-endpoint = <&cs42l51_tx_endpoint>;
Patrick Delaunay7f2cba42023-04-24 16:21:10 +0200517 dai-format = "i2s";
Patrick Delaunay48c5e902020-03-06 17:54:41 +0100518 mclk-fs = <256>;
519 dai-tdm-slot-num = <2>;
520 dai-tdm-slot-width = <32>;
521 };
522 };
523 };
524
525 sai2b: audio-controller@4400b024 {
526 dma-names = "rx";
527 st,sync = <&sai2a 2>;
528 clocks = <&rcc SAI2_K>, <&sai2a>;
529 clock-names = "sai_ck", "MCLK";
530 status = "okay";
531
532 sai2b_port: port {
533 sai2b_endpoint: endpoint {
534 remote-endpoint = <&cs42l51_rx_endpoint>;
Patrick Delaunay7f2cba42023-04-24 16:21:10 +0200535 dai-format = "i2s";
Patrick Delaunay48c5e902020-03-06 17:54:41 +0100536 mclk-fs = <256>;
537 dai-tdm-slot-num = <2>;
538 dai-tdm-slot-width = <32>;
539 };
540 };
541 };
542};
543
544&sdmmc1 {
545 pinctrl-names = "default", "opendrain", "sleep";
546 pinctrl-0 = <&sdmmc1_b4_pins_a>;
547 pinctrl-1 = <&sdmmc1_b4_od_pins_a>;
548 pinctrl-2 = <&sdmmc1_b4_sleep_pins_a>;
Patrick Delaunaydf0d20a2020-04-30 15:52:46 +0200549 cd-gpios = <&gpiob 7 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
550 disable-wp;
Patrick Delaunay48c5e902020-03-06 17:54:41 +0100551 st,neg-edge;
552 bus-width = <4>;
553 vmmc-supply = <&v3v3>;
554 status = "okay";
555};
556
557&sdmmc3 {
558 pinctrl-names = "default", "opendrain", "sleep";
559 pinctrl-0 = <&sdmmc3_b4_pins_a>;
560 pinctrl-1 = <&sdmmc3_b4_od_pins_a>;
561 pinctrl-2 = <&sdmmc3_b4_sleep_pins_a>;
562 broken-cd;
563 st,neg-edge;
564 bus-width = <4>;
565 vmmc-supply = <&v3v3>;
566 status = "disabled";
567};
568
569&timers1 {
570 /* spare dmas for other usage */
571 /delete-property/dmas;
572 /delete-property/dma-names;
573 status = "disabled";
574 pwm {
575 pinctrl-0 = <&pwm1_pins_a>;
576 pinctrl-1 = <&pwm1_sleep_pins_a>;
577 pinctrl-names = "default", "sleep";
578 status = "okay";
579 };
580 timer@0 {
581 status = "okay";
582 };
583};
584
585&timers3 {
586 /delete-property/dmas;
587 /delete-property/dma-names;
588 status = "disabled";
589 pwm {
590 pinctrl-0 = <&pwm3_pins_a>;
591 pinctrl-1 = <&pwm3_sleep_pins_a>;
592 pinctrl-names = "default", "sleep";
593 status = "okay";
594 };
595 timer@2 {
596 status = "okay";
597 };
598};
599
600&timers4 {
601 /delete-property/dmas;
602 /delete-property/dma-names;
603 status = "disabled";
604 pwm {
605 pinctrl-0 = <&pwm4_pins_a &pwm4_pins_b>;
606 pinctrl-1 = <&pwm4_sleep_pins_a &pwm4_sleep_pins_b>;
607 pinctrl-names = "default", "sleep";
608 status = "okay";
609 };
610 timer@3 {
611 status = "okay";
612 };
613};
614
615&timers5 {
616 /delete-property/dmas;
617 /delete-property/dma-names;
618 status = "disabled";
619 pwm {
620 pinctrl-0 = <&pwm5_pins_a>;
621 pinctrl-1 = <&pwm5_sleep_pins_a>;
622 pinctrl-names = "default", "sleep";
623 status = "okay";
624 };
625 timer@4 {
626 status = "okay";
627 };
628};
629
630&timers6 {
631 /delete-property/dmas;
632 /delete-property/dma-names;
633 status = "disabled";
634 timer@5 {
635 status = "okay";
636 };
637};
638
639&timers12 {
640 /delete-property/dmas;
641 /delete-property/dma-names;
642 status = "disabled";
643 pwm {
644 pinctrl-0 = <&pwm12_pins_a>;
645 pinctrl-1 = <&pwm12_sleep_pins_a>;
646 pinctrl-names = "default", "sleep";
647 status = "okay";
648 };
649 timer@11 {
650 status = "okay";
651 };
652};
653
654&uart4 {
Patrick Delaunay551efca2020-09-16 10:01:32 +0200655 pinctrl-names = "default", "sleep", "idle";
Patrick Delaunay48c5e902020-03-06 17:54:41 +0100656 pinctrl-0 = <&uart4_pins_a>;
Patrick Delaunay551efca2020-09-16 10:01:32 +0200657 pinctrl-1 = <&uart4_sleep_pins_a>;
658 pinctrl-2 = <&uart4_idle_pins_a>;
Patrick Delaunay6f182192022-04-26 15:38:05 +0200659 /delete-property/dmas;
660 /delete-property/dma-names;
Patrick Delaunay48c5e902020-03-06 17:54:41 +0100661 status = "okay";
662};
663
Patrick Delaunay551efca2020-09-16 10:01:32 +0200664&uart7 {
665 pinctrl-names = "default", "sleep", "idle";
666 pinctrl-0 = <&uart7_pins_c>;
667 pinctrl-1 = <&uart7_sleep_pins_c>;
668 pinctrl-2 = <&uart7_idle_pins_c>;
Patrick Delaunay6f182192022-04-26 15:38:05 +0200669 /delete-property/dmas;
670 /delete-property/dma-names;
Patrick Delaunay551efca2020-09-16 10:01:32 +0200671 status = "disabled";
672};
673
674&usart3 {
675 pinctrl-names = "default", "sleep", "idle";
676 pinctrl-0 = <&usart3_pins_c>;
677 pinctrl-1 = <&usart3_sleep_pins_c>;
678 pinctrl-2 = <&usart3_idle_pins_c>;
679 uart-has-rtscts;
680 status = "disabled";
681};
682
Patrick Delaunay48c5e902020-03-06 17:54:41 +0100683&usbh_ehci {
684 phys = <&usbphyc_port0>;
685 status = "okay";
Patrick Delaunay75785d42022-09-07 13:42:23 +0200686 #address-cells = <1>;
687 #size-cells = <0>;
688 /* onboard HUB */
689 hub@1 {
690 compatible = "usb424,2514";
691 reg = <1>;
692 vdd-supply = <&v3v3>;
693 };
Patrick Delaunay48c5e902020-03-06 17:54:41 +0100694};
695
696&usbotg_hs {
Patrick Delaunay48c5e902020-03-06 17:54:41 +0100697 phys = <&usbphyc_port1 0>;
698 phy-names = "usb2-phy";
Patrick Delaunay551efca2020-09-16 10:01:32 +0200699 usb-role-switch;
Patrick Delaunay48c5e902020-03-06 17:54:41 +0100700 status = "okay";
Patrick Delaunay6d397052021-01-11 12:33:36 +0100701
702 port {
703 usbotg_hs_ep: endpoint {
704 remote-endpoint = <&con_usbotg_hs_ep>;
705 };
706 };
Patrick Delaunay48c5e902020-03-06 17:54:41 +0100707};
708
709&usbphyc {
710 status = "okay";
711};
712
713&usbphyc_port0 {
714 phy-supply = <&vdd_usb>;
Patrick Delaunayb3f8d832022-01-31 16:07:54 +0100715 st,tune-hs-dc-level = <2>;
716 st,enable-fs-rftime-tuning;
717 st,enable-hs-rftime-reduction;
718 st,trim-hs-current = <15>;
719 st,trim-hs-impedance = <1>;
720 st,tune-squelch-level = <3>;
721 st,tune-hs-rx-offset = <2>;
722 st,no-lsfs-sc;
Patrick Delaunay48c5e902020-03-06 17:54:41 +0100723};
724
725&usbphyc_port1 {
726 phy-supply = <&vdd_usb>;
Patrick Delaunayb3f8d832022-01-31 16:07:54 +0100727 st,tune-hs-dc-level = <2>;
728 st,enable-fs-rftime-tuning;
729 st,enable-hs-rftime-reduction;
730 st,trim-hs-current = <15>;
731 st,trim-hs-impedance = <1>;
732 st,tune-squelch-level = <3>;
733 st,tune-hs-rx-offset = <2>;
734 st,no-lsfs-sc;
Patrick Delaunay48c5e902020-03-06 17:54:41 +0100735};
736
737&vrefbuf {
738 regulator-min-microvolt = <2500000>;
739 regulator-max-microvolt = <2500000>;
740 vdda-supply = <&vdd>;
741 status = "okay";
742};