maxims@google.com | daea6d4 | 2017-04-17 12:00:21 -0700 | [diff] [blame] | 1 | menu "Watchdog Timer Support" |
Ye Li | 62862b6 | 2017-02-22 16:21:48 +0800 | [diff] [blame] | 2 | |
Shreenidhi Shedi | 0787c7c | 2018-02-21 16:50:20 +0100 | [diff] [blame] | 3 | config WATCHDOG |
| 4 | bool "Enable U-Boot watchdog reset" |
Christophe Leroy | 9a5760e | 2020-02-26 16:17:52 +0000 | [diff] [blame] | 5 | depends on !HW_WATCHDOG |
Shreenidhi Shedi | 0787c7c | 2018-02-21 16:50:20 +0100 | [diff] [blame] | 6 | help |
| 7 | This option enables U-Boot watchdog support where U-Boot is using |
| 8 | watchdog_reset function to service watchdog device in U-Boot. Enable |
| 9 | this option if you want to service enabled watchdog by U-Boot. Disable |
| 10 | this option if you want U-Boot to start watchdog but never service it. |
| 11 | |
Heiko Schocher | f409f1a | 2019-09-30 09:33:43 +0200 | [diff] [blame] | 12 | config WATCHDOG_TIMEOUT_MSECS |
| 13 | int "Watchdog timeout in msec" |
| 14 | default 128000 if ARCH_MX25 || ARCH_MX31 || ARCH_MX5 || ARCH_MX6 |
| 15 | default 128000 if ARCH_MX7 || ARCH_VF610 |
| 16 | default 30000 if ARCH_SOCFPGA |
| 17 | default 60000 |
| 18 | help |
| 19 | Watchdog timeout in msec |
| 20 | |
Paolo Pisati | 6213c55 | 2017-02-10 17:28:05 +0100 | [diff] [blame] | 21 | config HW_WATCHDOG |
| 22 | bool |
| 23 | |
Patrice Chotard | 4a0ae73 | 2019-04-30 17:26:20 +0200 | [diff] [blame] | 24 | config IMX_WATCHDOG |
| 25 | bool "Enable Watchdog Timer support for IMX and LSCH2 of NXP" |
Marek Vasut | f7fc5c1 | 2019-06-09 03:46:22 +0200 | [diff] [blame] | 26 | select HW_WATCHDOG if !WDT |
Patrice Chotard | 4a0ae73 | 2019-04-30 17:26:20 +0200 | [diff] [blame] | 27 | help |
Michal Simek | 5288b9b | 2020-03-11 12:26:53 +0100 | [diff] [blame] | 28 | Select this to enable the IMX and LSCH2 of Layerscape watchdog |
| 29 | driver. |
Patrice Chotard | 4a0ae73 | 2019-04-30 17:26:20 +0200 | [diff] [blame] | 30 | |
Michael Walle | b9c72d0 | 2020-09-24 10:09:15 +0200 | [diff] [blame] | 31 | config WATCHDOG_RESET_DISABLE |
| 32 | bool "Disable reset watchdog" |
| 33 | depends on IMX_WATCHDOG |
| 34 | help |
| 35 | Disable reset watchdog, which can let WATCHDOG_RESET invalid, so |
| 36 | that the watchdog will not be fed in u-boot. |
| 37 | |
Tom Rini | 4a3e798 | 2017-05-12 22:33:24 -0400 | [diff] [blame] | 38 | config OMAP_WATCHDOG |
| 39 | bool "TI OMAP watchdog driver" |
| 40 | depends on ARCH_OMAP2PLUS |
| 41 | select HW_WATCHDOG |
Tom Rini | 4a3e798 | 2017-05-12 22:33:24 -0400 | [diff] [blame] | 42 | help |
| 43 | Say Y here to enable the OMAP3+ watchdog driver. |
Felipe Balbi | 24252da | 2017-07-05 20:33:20 +0300 | [diff] [blame] | 44 | |
Ye Li | 62862b6 | 2017-02-22 16:21:48 +0800 | [diff] [blame] | 45 | config ULP_WATCHDOG |
| 46 | bool "i.MX7ULP watchdog" |
| 47 | help |
| 48 | Say Y here to enable i.MX7ULP watchdog driver. |
| 49 | |
Marek Vasut | 40919d9 | 2019-06-27 00:26:34 +0200 | [diff] [blame] | 50 | config DESIGNWARE_WATCHDOG |
| 51 | bool "Designware watchdog timer support" |
Marek Vasut | 8655f67 | 2019-06-27 01:19:23 +0200 | [diff] [blame] | 52 | select HW_WATCHDOG if !WDT |
Jagan Teki | ad26957 | 2020-04-20 23:34:13 +0530 | [diff] [blame] | 53 | default y if WDT && ROCKCHIP_RK3399 |
Marek Vasut | 40919d9 | 2019-06-27 00:26:34 +0200 | [diff] [blame] | 54 | help |
Michal Simek | 5288b9b | 2020-03-11 12:26:53 +0100 | [diff] [blame] | 55 | Enable this to support Designware Watchdog Timer IP, present e.g. |
| 56 | on Altera SoCFPGA SoCs. |
Marek Vasut | 40919d9 | 2019-06-27 00:26:34 +0200 | [diff] [blame] | 57 | |
maxims@google.com | daea6d4 | 2017-04-17 12:00:21 -0700 | [diff] [blame] | 58 | config WDT |
| 59 | bool "Enable driver model for watchdog timer drivers" |
| 60 | depends on DM |
Stefan Roese | 502acb0 | 2019-04-11 15:58:44 +0200 | [diff] [blame] | 61 | imply WATCHDOG |
maxims@google.com | daea6d4 | 2017-04-17 12:00:21 -0700 | [diff] [blame] | 62 | help |
| 63 | Enable driver model for watchdog timer. At the moment the API |
| 64 | is very simple and only supports four operations: |
Patrice Chotard | 0a06024 | 2019-04-25 12:57:28 +0200 | [diff] [blame] | 65 | start, stop, reset and expire_now (expire immediately). |
maxims@google.com | daea6d4 | 2017-04-17 12:00:21 -0700 | [diff] [blame] | 66 | What exactly happens when the timer expires is up to a particular |
| 67 | device/driver. |
| 68 | |
Marek Behún | a86b97d | 2018-04-24 17:21:30 +0200 | [diff] [blame] | 69 | config WDT_ARMADA_37XX |
| 70 | bool "Marvell Armada 37xx watchdog timer support" |
| 71 | depends on WDT && ARMADA_3700 |
| 72 | help |
Michal Simek | 5288b9b | 2020-03-11 12:26:53 +0100 | [diff] [blame] | 73 | Enable this to support Watchdog Timer on Marvell Armada 37xx SoC. |
| 74 | There are 4 possible clocks which can be used on these SoCs. This |
| 75 | driver uses the second clock (ID 1), assuming that so will also |
| 76 | Linux's driver. |
Marek Behún | a86b97d | 2018-04-24 17:21:30 +0200 | [diff] [blame] | 77 | |
maxims@google.com | df35df2 | 2017-04-17 12:00:22 -0700 | [diff] [blame] | 78 | config WDT_ASPEED |
| 79 | bool "Aspeed ast2400/ast2500 watchdog timer support" |
| 80 | depends on WDT |
| 81 | default y if ARCH_ASPEED |
| 82 | help |
| 83 | Select this to enable watchdog timer for Aspeed ast2500/ast2400 devices. |
| 84 | The watchdog timer is stopped when initialized. It performs reset, either |
| 85 | full SoC reset or CPU or just some peripherals, based on the flags. |
| 86 | It currently does not support Boot Flash Addressing Mode Detection or |
| 87 | Second Boot. |
| 88 | |
Chia-Wei, Wang | 67ef587 | 2020-12-14 13:54:25 +0800 | [diff] [blame] | 89 | config WDT_AST2600 |
| 90 | bool "Aspeed AST2600 watchdog timer support" |
| 91 | depends on WDT |
| 92 | default y if ASPEED_AST2600 |
| 93 | help |
| 94 | Select this to enable watchdog timer for Aspeed ast2500/ast2400 devices. |
| 95 | The watchdog timer is stopped when initialized. It performs reset, either |
| 96 | full SoC reset or CPU or just some peripherals, based on the flags. |
| 97 | |
Patrice Chotard | 4a0ae73 | 2019-04-30 17:26:20 +0200 | [diff] [blame] | 98 | config WDT_AT91 |
| 99 | bool "AT91 watchdog timer support" |
| 100 | depends on WDT |
| 101 | help |
Michal Simek | 5288b9b | 2020-03-11 12:26:53 +0100 | [diff] [blame] | 102 | Select this to enable Microchip watchdog timer, which can be found on |
| 103 | some AT91 devices. |
Patrice Chotard | 4a0ae73 | 2019-04-30 17:26:20 +0200 | [diff] [blame] | 104 | |
Álvaro Fernández Rojas | d8759a5 | 2017-05-16 18:29:09 +0200 | [diff] [blame] | 105 | config WDT_BCM6345 |
| 106 | bool "BCM6345 watchdog timer support" |
Philippe Reynes | 09b864c | 2020-01-07 20:14:11 +0100 | [diff] [blame] | 107 | depends on WDT && (ARCH_BMIPS || ARCH_BCM68360 || \ |
| 108 | ARCH_BCM6858 || ARCH_BCM63158) |
Álvaro Fernández Rojas | d8759a5 | 2017-05-16 18:29:09 +0200 | [diff] [blame] | 109 | help |
| 110 | Select this to enable watchdog timer for BCM6345 SoCs. |
| 111 | The watchdog timer is stopped when initialized. |
| 112 | It performs full SoC reset. |
| 113 | |
Shreenidhi Shedi | 0787c7c | 2018-02-21 16:50:20 +0100 | [diff] [blame] | 114 | config WDT_CDNS |
| 115 | bool "Cadence watchdog timer support" |
| 116 | depends on WDT |
| 117 | imply WATCHDOG |
| 118 | help |
Michal Simek | 5288b9b | 2020-03-11 12:26:53 +0100 | [diff] [blame] | 119 | Select this to enable Cadence watchdog timer, which can be found on some |
| 120 | Xilinx Microzed Platform. |
Shreenidhi Shedi | 0787c7c | 2018-02-21 16:50:20 +0100 | [diff] [blame] | 121 | |
Jason Li | dd2b30b | 2020-01-30 12:34:57 -0800 | [diff] [blame] | 122 | config WDT_CORTINA |
| 123 | bool "Cortina Access CAxxxx watchdog timer support" |
| 124 | depends on WDT |
| 125 | help |
| 126 | Cortina Access CAxxxx watchdog timer support. |
| 127 | This driver support all CPU ISAs supported by Cortina |
Michal Simek | 5288b9b | 2020-03-11 12:26:53 +0100 | [diff] [blame] | 128 | Access CAxxxx SoCs. |
Jason Li | dd2b30b | 2020-01-30 12:34:57 -0800 | [diff] [blame] | 129 | |
Patrice Chotard | 4a0ae73 | 2019-04-30 17:26:20 +0200 | [diff] [blame] | 130 | config WDT_MPC8xx |
| 131 | bool "MPC8xx watchdog timer support" |
| 132 | depends on WDT && MPC8xx |
Christophe Leroy | 545e894 | 2020-02-20 07:39:51 +0000 | [diff] [blame] | 133 | select HW_WATCHDOG |
Patrice Chotard | 4a0ae73 | 2019-04-30 17:26:20 +0200 | [diff] [blame] | 134 | help |
Michal Simek | 5288b9b | 2020-03-11 12:26:53 +0100 | [diff] [blame] | 135 | Select this to enable mpc8xx watchdog timer |
Patrice Chotard | 4a0ae73 | 2019-04-30 17:26:20 +0200 | [diff] [blame] | 136 | |
| 137 | config WDT_MT7621 |
| 138 | bool "MediaTek MT7621 watchdog timer support" |
| 139 | depends on WDT && SOC_MT7628 |
| 140 | help |
Michal Simek | 5288b9b | 2020-03-11 12:26:53 +0100 | [diff] [blame] | 141 | Select this to enable Ralink / Mediatek watchdog timer, |
| 142 | which can be found on some MediaTek chips. |
Patrice Chotard | 4a0ae73 | 2019-04-30 17:26:20 +0200 | [diff] [blame] | 143 | |
developer | 93053be | 2018-11-15 10:07:57 +0800 | [diff] [blame] | 144 | config WDT_MTK |
| 145 | bool "MediaTek watchdog timer support" |
| 146 | depends on WDT && ARCH_MEDIATEK |
| 147 | help |
| 148 | Select this to enable watchdog timer for MediaTek SoCs. |
| 149 | The watchdog timer is stopped when initialized. |
| 150 | It performs full SoC reset. |
| 151 | |
Suneel Garapati | 7072b17 | 2019-10-21 16:09:36 -0700 | [diff] [blame] | 152 | config WDT_OCTEONTX |
| 153 | bool "OcteonTX core watchdog support" |
| 154 | depends on WDT && (ARCH_OCTEONTX || ARCH_OCTEONTX2) |
| 155 | default y |
| 156 | imply WATCHDOG |
| 157 | help |
| 158 | This enables OcteonTX watchdog driver, which can be |
| 159 | found on OcteonTX/TX2 chipsets and inline with driver model. |
| 160 | Only supports watchdog reset. |
| 161 | |
Suniel Mahesh | 1c783ab | 2019-07-31 21:54:06 +0530 | [diff] [blame] | 162 | config WDT_OMAP3 |
Michal Simek | 5288b9b | 2020-03-11 12:26:53 +0100 | [diff] [blame] | 163 | bool "TI OMAP watchdog timer support" |
| 164 | depends on WDT && ARCH_OMAP2PLUS |
| 165 | default y if AM33XX |
| 166 | help |
Suniel Mahesh | 1c783ab | 2019-07-31 21:54:06 +0530 | [diff] [blame] | 167 | This enables OMAP3+ watchdog timer driver, which can be |
| 168 | found on some TI chipsets and inline with driver model. |
| 169 | |
Patrice Chotard | 4a0ae73 | 2019-04-30 17:26:20 +0200 | [diff] [blame] | 170 | config WDT_ORION |
| 171 | bool "Orion watchdog timer support" |
Shreenidhi Shedi | 335fb5b | 2018-07-15 02:05:41 +0530 | [diff] [blame] | 172 | depends on WDT |
Patrice Chotard | 4a0ae73 | 2019-04-30 17:26:20 +0200 | [diff] [blame] | 173 | select CLK |
Shreenidhi Shedi | 335fb5b | 2018-07-15 02:05:41 +0530 | [diff] [blame] | 174 | help |
Michal Simek | 5288b9b | 2020-03-11 12:26:53 +0100 | [diff] [blame] | 175 | Select this to enable Orion watchdog timer, which can be found on some |
| 176 | Marvell Armada chips. |
Shreenidhi Shedi | 335fb5b | 2018-07-15 02:05:41 +0530 | [diff] [blame] | 177 | |
Jan Kiszka | ddf21d5 | 2020-06-23 13:15:08 +0200 | [diff] [blame] | 178 | config WDT_K3_RTI |
| 179 | bool "Texas Instruments K3 RTI watchdog" |
| 180 | depends on WDT && ARCH_K3 |
| 181 | help |
| 182 | Say Y here if you want to include support for the K3 watchdog |
| 183 | timer (RTI module) available in the K3 generation of processors. |
| 184 | |
Patrice Chotard | 4a0ae73 | 2019-04-30 17:26:20 +0200 | [diff] [blame] | 185 | config WDT_SANDBOX |
| 186 | bool "Enable Watchdog Timer support for Sandbox" |
| 187 | depends on SANDBOX && WDT |
Xiaoliang Yang | 4161dc2 | 2018-10-18 17:14:19 +0800 | [diff] [blame] | 188 | help |
Patrice Chotard | 4a0ae73 | 2019-04-30 17:26:20 +0200 | [diff] [blame] | 189 | Enable Watchdog Timer support in Sandbox. This is a dummy device that |
| 190 | can be probed and supports all of the methods of WDT, but does not |
| 191 | really do anything. |
Xiaoliang Yang | 4161dc2 | 2018-10-18 17:14:19 +0800 | [diff] [blame] | 192 | |
Zhao Qiang | fb816fa | 2020-07-10 16:55:18 +0800 | [diff] [blame] | 193 | config WDT_SBSA |
| 194 | bool "SBSA watchdog timer support" |
| 195 | depends on WDT |
| 196 | help |
| 197 | Select this to enable SBSA watchdog timer. |
| 198 | This driver can operate ARM SBSA Generic Watchdog as a single stage. |
| 199 | In the single stage mode, when the timeout is reached, your system |
| 200 | will be reset by WS1. The first signal (WS0) is ignored. |
| 201 | |
Patrice Chotard | 4a0ae73 | 2019-04-30 17:26:20 +0200 | [diff] [blame] | 202 | config WDT_SP805 |
| 203 | bool "SP805 watchdog timer support" |
Prasanthi Chellakumar | 0509c4e | 2018-10-09 11:46:40 -0700 | [diff] [blame] | 204 | depends on WDT |
| 205 | help |
Michal Simek | 5288b9b | 2020-03-11 12:26:53 +0100 | [diff] [blame] | 206 | Select this to enable SP805 watchdog timer, which can be found on some |
| 207 | nxp layerscape chips. |
Stefan Roese | 8456969 | 2018-10-04 13:39:07 +0200 | [diff] [blame] | 208 | |
Patrice Chotard | 473b244 | 2019-04-30 17:26:22 +0200 | [diff] [blame] | 209 | config WDT_STM32MP |
| 210 | bool "IWDG watchdog driver for STM32 MP's family" |
| 211 | depends on WDT |
| 212 | imply WATCHDOG |
| 213 | help |
| 214 | Enable the STM32 watchdog (IWDG) driver. Enable support to |
| 215 | configure STM32's on-SoC watchdog. |
| 216 | |
Patrice Chotard | 4a0ae73 | 2019-04-30 17:26:20 +0200 | [diff] [blame] | 217 | config XILINX_TB_WATCHDOG |
| 218 | bool "Xilinx Axi watchdog timer support" |
| 219 | depends on WDT |
| 220 | imply WATCHDOG |
Christophe Leroy | 4015930 | 2018-11-21 08:51:45 +0000 | [diff] [blame] | 221 | help |
Michal Simek | 5288b9b | 2020-03-11 12:26:53 +0100 | [diff] [blame] | 222 | Select this to enable Xilinx Axi watchdog timer, which can be found on some |
| 223 | Xilinx Microblaze Platforms. |
Christophe Leroy | 4015930 | 2018-11-21 08:51:45 +0000 | [diff] [blame] | 224 | |
Ashok Reddy Soma | f4aecf4 | 2020-03-11 03:06:04 -0600 | [diff] [blame] | 225 | config WDT_XILINX |
| 226 | bool "Xilinx window watchdog timer support" |
| 227 | depends on WDT && ARCH_VERSAL |
| 228 | select REGMAP |
| 229 | imply WATCHDOG |
| 230 | help |
| 231 | Select this to enable Xilinx window watchdog timer, which can be found on |
| 232 | Xilinx Versal Platforms. |
| 233 | |
Andy Shevchenko | d13a8a3 | 2019-06-21 13:28:08 +0300 | [diff] [blame] | 234 | config WDT_TANGIER |
| 235 | bool "Intel Tangier watchdog timer support" |
| 236 | depends on WDT && INTEL_MID |
| 237 | help |
| 238 | This enables support for watchdog controller available on |
| 239 | Intel Tangier SoC. If you're using a board with Intel Tangier |
| 240 | SoC, say Y here. |
| 241 | |
Marek Vasut | 55ec91b | 2019-06-09 03:46:21 +0200 | [diff] [blame] | 242 | config SPL_WDT |
| 243 | bool "Enable driver model for watchdog timer drivers in SPL" |
| 244 | depends on SPL_DM |
| 245 | help |
| 246 | Enable driver model for watchdog timer in SPL. |
| 247 | This is similar to CONFIG_WDT in U-Boot. |
| 248 | |
Ye Li | 62862b6 | 2017-02-22 16:21:48 +0800 | [diff] [blame] | 249 | endmenu |