blob: ae4185fa90a276522e0337613ba9e1cf37debf68 [file] [log] [blame]
Masahiro Yamadac04368f2015-02-27 02:26:51 +09001/*
2 * Copyright (C) 2011-2015 Panasonic Corporation
3 * Author: Masahiro Yamada <yamada.m@jp.panasonic.com>
4 *
5 * SPDX-License-Identifier: GPL-2.0+
6 */
7
8#include <asm/io.h>
9#include <mach/sc-regs.h>
10
11void early_clkrst_init(void)
12{
13 u32 tmp;
14
15 /* deassert reset */
16 tmp = readl(SC_RSTCTRL);
17 tmp |= SC_RSTCTRL_NRST_UMC1 | SC_RSTCTRL_NRST_UMC0;
18 writel(tmp, SC_RSTCTRL);
19 readl(SC_RSTCTRL); /* dummy read */
20
21 /* privide clocks */
22 tmp = readl(SC_CLKCTRL);
23 tmp |= SC_CLKCTRL_CEN_UMC | SC_CLKCTRL_CEN_SBC | SC_CLKCTRL_CEN_PERI;
24 writel(tmp, SC_CLKCTRL);
25 readl(SC_CLKCTRL); /* dummy read */
26}