| Marek Vasut | ad43cd3 | 2017-07-21 23:15:21 +0200 | [diff] [blame] | 1 | /* |
| 2 | * include/configs/ulcb.h |
| 3 | * This file is ULCB board configuration. |
| 4 | * |
| 5 | * Copyright (C) 2017 Renesas Electronics Corporation |
| 6 | * |
| 7 | * SPDX-License-Identifier: GPL-2.0+ |
| 8 | */ |
| 9 | |
| 10 | #ifndef __ULCB_H |
| 11 | #define __ULCB_H |
| 12 | |
| 13 | #undef DEBUG |
| 14 | |
| Marek Vasut | ad43cd3 | 2017-07-21 23:15:21 +0200 | [diff] [blame] | 15 | #include "rcar-gen3-common.h" |
| 16 | |
| Marek Vasut | ad43cd3 | 2017-07-21 23:15:21 +0200 | [diff] [blame] | 17 | /* Ethernet RAVB */ |
| Marek Vasut | ad43cd3 | 2017-07-21 23:15:21 +0200 | [diff] [blame] | 18 | #define CONFIG_BITBANGMII |
| 19 | #define CONFIG_BITBANGMII_MULTI |
| 20 | |
| 21 | /* Board Clock */ |
| 22 | /* XTAL_CLK : 33.33MHz */ |
| Marek Vasut | 21b251a | 2017-11-27 06:38:12 +0100 | [diff] [blame] | 23 | #define CONFIG_SYS_CLK_FREQ 33333333u |
| Marek Vasut | ad43cd3 | 2017-07-21 23:15:21 +0200 | [diff] [blame] | 24 | |
| 25 | /* Generic Timer Definitions (use in assembler source) */ |
| 26 | #define COUNTER_FREQUENCY 0xFE502A /* 16.66MHz from CPclk */ |
| 27 | |
| Marek Vasut | ad43cd3 | 2017-07-21 23:15:21 +0200 | [diff] [blame] | 28 | /* Environment in eMMC, at the end of 2nd "boot sector" */ |
| Marek Vasut | ad43cd3 | 2017-07-21 23:15:21 +0200 | [diff] [blame] | 29 | #define CONFIG_ENV_OFFSET (-CONFIG_ENV_SIZE) |
| 30 | #define CONFIG_SYS_MMC_ENV_DEV 1 |
| 31 | #define CONFIG_SYS_MMC_ENV_PART 2 |
| 32 | |
| Marek Vasut | ad43cd3 | 2017-07-21 23:15:21 +0200 | [diff] [blame] | 33 | #endif /* __ULCB_H */ |