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Liu Hui-R643434cf4cd72011-01-03 22:27:42 +00001/*
2 * Copyright (C) 2010 Freescale Semiconductor, Inc.
3 *
4 * Configuration settings for the MX53-EVK Freescale board.
5 *
Wolfgang Denkbd8ec7e2013-10-07 13:07:26 +02006 * SPDX-License-Identifier: GPL-2.0+
Liu Hui-R643434cf4cd72011-01-03 22:27:42 +00007 */
8
9#ifndef __CONFIG_H
10#define __CONFIG_H
11
Fabio Estevam17978382011-09-22 08:07:22 +000012#define CONFIG_MACH_TYPE MACH_TYPE_MX53_EVK
13
Liu Hui-R643434cf4cd72011-01-03 22:27:42 +000014#include <asm/arch/imx-regs.h>
15
Fabio Estevamb1574ff2011-10-27 01:32:43 +000016#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
Fabio Estevamb1574ff2011-10-27 01:32:43 +000017#define CONFIG_SETUP_MEMORY_TAGS
18#define CONFIG_INITRD_TAG
Fabio Estevam5db5f412013-04-24 14:44:26 +000019#define CONFIG_REVISION_TAG
Liu Hui-R643434cf4cd72011-01-03 22:27:42 +000020
Gong Qianyu52de2e52015-10-26 19:47:42 +080021#define CONFIG_SYS_FSL_CLK
Fabio Estevam31ab5852014-04-22 15:34:58 -030022
Liu Hui-R643434cf4cd72011-01-03 22:27:42 +000023/* Size of malloc() pool */
24#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 2 * 1024 * 1024)
25
Liu Hui-R643434cf4cd72011-01-03 22:27:42 +000026#define CONFIG_MXC_GPIO
27
28#define CONFIG_MXC_UART
Stefano Babic1ca47d92011-11-22 15:22:39 +010029#define CONFIG_MXC_UART_BASE UART1_BASE
Liu Hui-R643434cf4cd72011-01-03 22:27:42 +000030
31/* I2C Configs */
trem03997412013-09-21 18:13:36 +020032#define CONFIG_SYS_I2C
33#define CONFIG_SYS_I2C_MXC
Albert ARIBAUD \\(3ADEV\\)eb943872015-09-21 22:43:38 +020034#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
35#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
York Sunf1a52162015-03-20 10:20:40 -070036#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
Liu Hui-R643434cf4cd72011-01-03 22:27:42 +000037
38/* PMIC Configs */
Ɓukasz Majewski1b6d9ed2012-11-13 03:22:14 +000039#define CONFIG_POWER
40#define CONFIG_POWER_I2C
41#define CONFIG_POWER_FSL
Liu Hui-R643434cf4cd72011-01-03 22:27:42 +000042#define CONFIG_SYS_FSL_PMIC_I2C_ADDR 8
Simon Glass02229812014-05-20 06:01:34 -060043#define CONFIG_POWER_FSL_MC13892
Fabio Estevamaf98ea02011-10-25 01:44:19 +000044#define CONFIG_RTC_MC13XXX
Liu Hui-R643434cf4cd72011-01-03 22:27:42 +000045
46/* MMC Configs */
47#define CONFIG_FSL_ESDHC
48#define CONFIG_SYS_FSL_ESDHC_ADDR 0
49#define CONFIG_SYS_FSL_ESDHC_NUM 2
50
Liu Hui-R643434cf4cd72011-01-03 22:27:42 +000051/* Eth Configs */
Liu Hui-R643434cf4cd72011-01-03 22:27:42 +000052#define CONFIG_MII
Liu Hui-R643434cf4cd72011-01-03 22:27:42 +000053
54#define CONFIG_FEC_MXC
55#define IMX_FEC_BASE FEC_BASE_ADDR
56#define CONFIG_FEC_MXC_PHYADDR 0x1F
57
Liu Hui-R643434cf4cd72011-01-03 22:27:42 +000058/* allow to overwrite serial and ethaddr */
59#define CONFIG_ENV_OVERWRITE
60#define CONFIG_CONS_INDEX 1
Liu Hui-R643434cf4cd72011-01-03 22:27:42 +000061
62/* Command definition */
Liu Hui-R643434cf4cd72011-01-03 22:27:42 +000063
Wolfgang Grandegger96529e22011-10-17 08:21:56 +000064#define CONFIG_ETHPRIME "FEC0"
Liu Hui-R643434cf4cd72011-01-03 22:27:42 +000065
66#define CONFIG_LOADADDR 0x70800000 /* loadaddr env var */
67#define CONFIG_SYS_TEXT_BASE 0x77800000
68
69#define CONFIG_EXTRA_ENV_SETTINGS \
70 "script=boot.scr\0" \
71 "uimage=uImage\0" \
72 "mmcdev=0\0" \
73 "mmcpart=2\0" \
74 "mmcroot=/dev/mmcblk0p3 rw\0" \
75 "mmcrootfstype=ext3 rootwait\0" \
76 "mmcargs=setenv bootargs console=ttymxc0,${baudrate} " \
77 "root=${mmcroot} " \
78 "rootfstype=${mmcrootfstype}\0" \
79 "loadbootscript=" \
80 "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
81 "bootscript=echo Running bootscript from mmc ...; " \
82 "source\0" \
83 "loaduimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${uimage}\0" \
84 "mmcboot=echo Booting from mmc ...; " \
85 "run mmcargs; " \
86 "bootm\0" \
87 "netargs=setenv bootargs console=ttymxc0,${baudrate} " \
88 "root=/dev/nfs " \
89 "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
90 "netboot=echo Booting from net ...; " \
91 "run netargs; " \
92 "dhcp ${uimage}; bootm\0" \
93
94#define CONFIG_BOOTCOMMAND \
Andrew Bradforde1c7c8a2012-10-01 05:06:52 +000095 "mmc dev ${mmcdev}; if mmc rescan; then " \
Liu Hui-R643434cf4cd72011-01-03 22:27:42 +000096 "if run loadbootscript; then " \
97 "run bootscript; " \
98 "else " \
99 "if run loaduimage; then " \
100 "run mmcboot; " \
101 "else run netboot; " \
102 "fi; " \
103 "fi; " \
104 "else run netboot; fi"
105
106#define CONFIG_ARP_TIMEOUT 200UL
107
108/* Miscellaneous configurable options */
109#define CONFIG_SYS_LONGHELP /* undef to save memory */
Liu Hui-R643434cf4cd72011-01-03 22:27:42 +0000110#define CONFIG_AUTO_COMPLETE
Liu Hui-R643434cf4cd72011-01-03 22:27:42 +0000111
Liu Hui-R643434cf4cd72011-01-03 22:27:42 +0000112#define CONFIG_SYS_MEMTEST_START 0x70000000
Fabio Estevam8d790c72012-02-09 14:25:09 +0000113#define CONFIG_SYS_MEMTEST_END 0x70010000
Liu Hui-R643434cf4cd72011-01-03 22:27:42 +0000114
115#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
116
Liu Hui-R643434cf4cd72011-01-03 22:27:42 +0000117#define CONFIG_CMDLINE_EDITING
118
Liu Hui-R643434cf4cd72011-01-03 22:27:42 +0000119/* Physical Memory Map */
120#define CONFIG_NR_DRAM_BANKS 1
121#define PHYS_SDRAM_1 CSD0_BASE_ADDR
122#define PHYS_SDRAM_1_SIZE (512 * 1024 * 1024)
123
124#define CONFIG_SYS_SDRAM_BASE (PHYS_SDRAM_1)
125#define CONFIG_SYS_INIT_RAM_ADDR (IRAM_BASE_ADDR)
126#define CONFIG_SYS_INIT_RAM_SIZE (IRAM_SIZE)
127
128#define CONFIG_SYS_INIT_SP_OFFSET \
129 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
130#define CONFIG_SYS_INIT_SP_ADDR \
131 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
132
Masahiro Yamada8cea9b52017-02-11 22:43:54 +0900133/* environment organization */
Liu Hui-R643434cf4cd72011-01-03 22:27:42 +0000134#define CONFIG_ENV_OFFSET (6 * 64 * 1024)
135#define CONFIG_ENV_SIZE (8 * 1024)
Liu Hui-R643434cf4cd72011-01-03 22:27:42 +0000136#define CONFIG_SYS_MMC_ENV_DEV 0
137
Liu Hui-R643434cf4cd72011-01-03 22:27:42 +0000138#endif /* __CONFIG_H */