Andre Przywara | 3e435d1 | 2023-04-02 01:17:07 +0100 | [diff] [blame] | 1 | // SPDX-License-Identifier: (GPL-2.0+ OR MIT) |
| 2 | /* |
| 3 | * Copyright 2022 Arm Ltd, |
| 4 | * based on work: |
| 5 | * Copyright 2022 Icenowy Zheng <uwu@icenowy.me> |
| 6 | */ |
| 7 | |
| 8 | /dts-v1/; |
| 9 | #include "suniv-f1c100s.dtsi" |
| 10 | |
| 11 | #include <dt-bindings/gpio/gpio.h> |
| 12 | |
| 13 | / { |
| 14 | model = "Lctech Pi F1C200s"; |
| 15 | compatible = "lctech,pi-f1c200s", "allwinner,suniv-f1c200s", |
| 16 | "allwinner,suniv-f1c100s"; |
| 17 | |
| 18 | aliases { |
| 19 | serial0 = &uart1; |
| 20 | }; |
| 21 | |
| 22 | chosen { |
| 23 | stdout-path = "serial0:115200n8"; |
| 24 | }; |
| 25 | |
| 26 | reg_vcc3v3: regulator-3v3 { |
| 27 | compatible = "regulator-fixed"; |
| 28 | regulator-name = "vcc3v3"; |
| 29 | regulator-min-microvolt = <3300000>; |
| 30 | regulator-max-microvolt = <3300000>; |
| 31 | }; |
| 32 | }; |
| 33 | |
| 34 | &mmc0 { |
| 35 | broken-cd; |
| 36 | bus-width = <4>; |
| 37 | disable-wp; |
| 38 | vmmc-supply = <®_vcc3v3>; |
| 39 | status = "okay"; |
| 40 | }; |
| 41 | |
| 42 | &otg_sram { |
| 43 | status = "okay"; |
| 44 | }; |
| 45 | |
| 46 | &spi0 { |
| 47 | pinctrl-names = "default"; |
| 48 | pinctrl-0 = <&spi0_pc_pins>; |
| 49 | status = "okay"; |
| 50 | |
| 51 | flash@0 { |
| 52 | compatible = "spi-nand"; |
| 53 | reg = <0>; |
| 54 | spi-max-frequency = <40000000>; |
| 55 | }; |
| 56 | }; |
| 57 | |
| 58 | &uart1 { |
| 59 | pinctrl-names = "default"; |
| 60 | pinctrl-0 = <&uart1_pa_pins>; |
| 61 | status = "okay"; |
| 62 | }; |
| 63 | |
| 64 | /* |
| 65 | * This is a Type-C socket, but CC1/2 are not connected, and VBUS is connected |
| 66 | * to Vin, which supplies the board. Host mode works (if the board is powered |
| 67 | * otherwise), but peripheral is probably the intention. |
| 68 | */ |
| 69 | &usb_otg { |
| 70 | dr_mode = "peripheral"; |
| 71 | status = "okay"; |
| 72 | }; |
| 73 | |
| 74 | &usbphy { |
| 75 | status = "okay"; |
| 76 | }; |