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Marek Vasutc1876802019-06-09 18:46:42 +02001// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2/*
3 * Copyright (C) 2019 Marek Vasut <marex@denx.de>
4 */
5
6/dts-v1/;
7#include "imx53-m53.dtsi"
Marek Vasutc1876802019-06-09 18:46:42 +02008
9/ {
10 model = "MENLO M53 EMBEDDED DEVICE";
11 compatible = "menlo,m53menlo", "fsl,imx53";
12
Marcel Ziswiler342b0c92022-10-22 23:59:40 +020013 gpio-keys {
14 compatible = "gpio-keys";
15 pinctrl-0 = <&pinctrl_power_button>;
16 pinctrl-names = "default";
17
18 power-button {
19 label = "Power button";
20 gpios = <&gpio1 15 GPIO_ACTIVE_LOW>;
21 linux,code = <KEY_POWER>;
22 };
23 };
24
25 gpio-poweroff {
26 compatible = "gpio-poweroff";
27 pinctrl-0 = <&pinctrl_power_out>;
28 pinctrl-names = "default";
29 gpios = <&gpio1 13 GPIO_ACTIVE_LOW>;
30 };
31
Marek Vasutc1876802019-06-09 18:46:42 +020032 leds {
33 compatible = "gpio-leds";
34 pinctrl-names = "default";
35 pinctrl-0 = <&pinctrl_led>;
36
37 user1 {
38 label = "TestLed601";
39 gpios = <&gpio6 1 GPIO_ACTIVE_HIGH>;
40 linux,default-trigger = "mmc0";
41 };
42
43 user2 {
44 label = "TestLed602";
45 gpios = <&gpio6 2 GPIO_ACTIVE_HIGH>;
46 linux,default-trigger = "heartbeat";
47 };
48
49 eth {
50 label = "EthLedYe";
51 gpios = <&gpio2 11 GPIO_ACTIVE_LOW>;
Marcel Ziswiler342b0c92022-10-22 23:59:40 +020052 linux,default-trigger = "netdev";
53 };
54 };
55
56 lvds-decoder {
57 compatible = "ti,ds90cf364a", "lvds-decoder";
58
59 ports {
60 #address-cells = <1>;
61 #size-cells = <0>;
62
63 port@0 {
64 reg = <0>;
65
66 lvds_decoder_in: endpoint {
67 remote-endpoint = <&lvds0_out>;
68 };
69 };
70
71 port@1 {
72 reg = <1>;
73
74 lvds_decoder_out: endpoint {
75 remote-endpoint = <&panel_in>;
76 };
77 };
Marek Vasutc1876802019-06-09 18:46:42 +020078 };
79 };
80
81 panel {
Marcel Ziswiler342b0c92022-10-22 23:59:40 +020082 compatible = "edt,etm0700g0dh6";
83 pinctrl-0 = <&pinctrl_display_gpio>;
84 pinctrl-names = "default";
Marek Vasutc1876802019-06-09 18:46:42 +020085 enable-gpios = <&gpio6 0 GPIO_ACTIVE_HIGH>;
86
87 port {
88 panel_in: endpoint {
Marcel Ziswiler342b0c92022-10-22 23:59:40 +020089 remote-endpoint = <&lvds_decoder_out>;
Marek Vasutc1876802019-06-09 18:46:42 +020090 };
91 };
92 };
93
Marcel Ziswiler342b0c92022-10-22 23:59:40 +020094 beeper {
95 compatible = "gpio-beeper";
96 pinctrl-0 = <&pinctrl_beeper>;
97 gpios = <&gpio6 3 GPIO_ACTIVE_HIGH>;
98 };
99
Marek Vasutc1876802019-06-09 18:46:42 +0200100 reg_usbh1_vbus: regulator-usbh1-vbus {
101 compatible = "regulator-fixed";
102 regulator-name = "vbus";
103 regulator-min-microvolt = <5000000>;
104 regulator-max-microvolt = <5000000>;
Marcel Ziswiler342b0c92022-10-22 23:59:40 +0200105 gpio = <&gpio1 2 0>;
Marek Vasutc1876802019-06-09 18:46:42 +0200106 };
107};
108
109&can1 {
110 pinctrl-names = "default";
111 pinctrl-0 = <&pinctrl_can1>;
112 status = "okay";
113};
114
115&can2 {
116 pinctrl-names = "default";
117 pinctrl-0 = <&pinctrl_can2>;
118 status = "okay";
119};
120
121&clks {
122 assigned-clocks = <&clks IMX5_CLK_CKO1_SEL>,
123 <&clks IMX5_CLK_CKO1_PODF>,
124 <&clks IMX5_CLK_CKO1>;
125 assigned-clock-parents = <&clks IMX5_CLK_AHB>;
126 assigned-clock-rates = <133333334>, <33333334>, <33333334>;
127};
128
Marcel Ziswiler342b0c92022-10-22 23:59:40 +0200129&ecspi2 {
130 pinctrl-names = "default";
131 pinctrl-0 = <&pinctrl_ecspi2>;
132 cs-gpios = <&gpio2 26 GPIO_ACTIVE_LOW>, <&gpio2 27 GPIO_ACTIVE_LOW>;
133 status = "okay";
134
135 spidev@0 {
136 compatible = "menlo,m53cpld";
137 spi-max-frequency = <25000000>;
138 reg = <0>;
139 };
140
141 spidev@1 {
142 compatible = "menlo,m53cpld";
143 spi-max-frequency = <25000000>;
144 reg = <1>;
145 };
146};
147
Marek Vasutc1876802019-06-09 18:46:42 +0200148&esdhc1 {
149 pinctrl-names = "default";
150 pinctrl-0 = <&pinctrl_esdhc1>;
151 cd-gpios = <&gpio1 1 GPIO_ACTIVE_LOW>;
152 wp-gpios = <&gpio1 9 GPIO_ACTIVE_HIGH>;
153 status = "okay";
154};
155
156&fec {
157 pinctrl-names = "default";
158 pinctrl-0 = <&pinctrl_fec>;
159 phy-mode = "rmii";
Marcel Ziswiler342b0c92022-10-22 23:59:40 +0200160 phy-reset-gpios = <&gpio7 7 GPIO_ACTIVE_LOW>;
Marek Vasutc1876802019-06-09 18:46:42 +0200161 status = "okay";
Marcel Ziswiler342b0c92022-10-22 23:59:40 +0200162};
Marek Vasut8dd60ad2020-05-30 22:44:46 +0200163
Marcel Ziswiler342b0c92022-10-22 23:59:40 +0200164&gpio1 {
165 gpio-line-names =
166 "", "", "", "",
167 "", "", "", "",
168 "", "", "", "",
169 "", "", "", "",
170 "", "", "", "",
171 "", "", "", "",
172 "", "", "", "",
173 "", "", "", "";
174};
Marek Vasut8dd60ad2020-05-30 22:44:46 +0200175
Marcel Ziswiler342b0c92022-10-22 23:59:40 +0200176&gpio2 {
177 gpio-line-names =
178 "", "", "", "",
179 "", "", "", "",
180 "TestPin_SV2_3", "", "", "",
181 "", "", "", "",
182 "", "", "", "",
183 "", "", "", "",
184 "", "", "", "",
185 "", "", "", "";
Marek Vasutc1876802019-06-09 18:46:42 +0200186};
187
Marcel Ziswiler342b0c92022-10-22 23:59:40 +0200188&gpio3 {
189 gpio-line-names =
190 "", "", "", "",
191 "", "", "", "",
192 "", "", "", "",
193 "", "", "", "",
194 "", "", "", "",
195 "", "", "", "",
196 "CPLD_JTAG_TDI", "CPLD_JTAG_TMS", "", "",
197 "", "CPLD_JTAG_TDO", "", "";
198};
199
200&gpio5 {
201 gpio-line-names =
202 "", "", "", "",
203 "", "", "", "",
204 "", "", "", "",
205 "", "", "", "",
206 "", "", "CPLD_JTAG_TCK", "KBD_intK",
207 "CPLD_int", "CPLD_JTAG_internal", "CPLD_D[0]", "CPLD_D[1]",
208 "CPLD_D[2]", "CPLD_D[3]", "CPLD_D[4]", "CPLD_D[5]",
209 "CPLD_D[6]", "CPLD_D[7]", "DISP_reset", "KBD_intI";
210};
211
212&gpio6 {
213 gpio-line-names =
214 "", "", "", "",
215 "CPLD_reset", "", "", "",
216 "", "", "", "",
217 "", "", "", "",
218 "", "", "", "",
219 "", "", "", "",
220 "", "", "", "",
221 "", "", "", "";
222};
223
224&gpio7 {
225 gpio-line-names =
226 "", "", "", "",
227 "", "", "", "",
228 "", "", "", "",
229 "", "USB-OTG_OverCurrent", "", "",
230 "", "", "", "",
231 "", "", "", "",
232 "", "", "", "",
233 "", "", "", "";
234};
235
Marek Vasutc1876802019-06-09 18:46:42 +0200236&i2c1 {
237 pinctrl-names = "default";
238 pinctrl-0 = <&pinctrl_i2c1>;
239 status = "okay";
240
241 touchscreen@38 {
242 compatible = "edt,edt-ft5x06";
243 reg = <0x38>;
244 pinctrl-names = "default";
245 pinctrl-0 = <&pinctrl_edt_ft5x06>;
246 interrupt-parent = <&gpio6>;
247 interrupts = <5 IRQ_TYPE_EDGE_FALLING>;
248 reset-gpios = <&gpio2 9 GPIO_ACTIVE_LOW>;
249 wake-gpios = <&gpio2 10 GPIO_ACTIVE_HIGH>;
250 };
251
252 eeprom@50 {
253 compatible = "atmel,24c64";
254 reg = <0x50>;
255 pagesize = <32>;
256 };
257
258 dac@60 {
259 compatible = "microchip,mcp4725";
260 reg = <0x60>;
261 };
262};
263
264&i2c2 {
265 touchscreen@41 {
266 status = "disabled";
267 };
268};
269
270&i2c3 {
271 pinctrl-names = "default";
272 pinctrl-0 = <&pinctrl_i2c3>;
273 status = "okay";
274};
275
276&iomuxc {
277 pinctrl-names = "default";
278 pinctrl-0 = <&pinctrl_hog>;
279
280 imx53-m53evk {
281 hoggrp {
282 fsl,pins = <
Marcel Ziswiler342b0c92022-10-22 23:59:40 +0200283 MX53_PAD_GPIO_19__CCM_CLKO 0x1e4
284 MX53_PAD_CSI0_DATA_EN__GPIO5_20 0x1e4
285 MX53_PAD_CSI0_DAT4__GPIO5_22 0x1e4
286 MX53_PAD_CSI0_DAT5__GPIO5_23 0x1c4
287 MX53_PAD_CSI0_DAT6__GPIO5_24 0x1e4
288 MX53_PAD_CSI0_DAT7__GPIO5_25 0x1e4
289 MX53_PAD_CSI0_DAT8__GPIO5_26 0x1e4
290 MX53_PAD_CSI0_DAT9__GPIO5_27 0x1c4
291 MX53_PAD_CSI0_DAT10__GPIO5_28 0x1e4
292 MX53_PAD_CSI0_DAT11__GPIO5_29 0x1e4
293 MX53_PAD_PATA_DATA11__GPIO2_11 0x1e4
294 MX53_PAD_EIM_D24__GPIO3_24 0x1e4
295 MX53_PAD_EIM_D25__GPIO3_25 0x1e4
296 MX53_PAD_EIM_D29__GPIO3_29 0x1e4
297 MX53_PAD_CSI0_PIXCLK__GPIO5_18 0x1e4
298 MX53_PAD_CSI0_VSYNC__GPIO5_21 0x1e4
299 MX53_PAD_CSI0_DAT18__GPIO6_4 0x1c4
300 MX53_PAD_PATA_DATA8__GPIO2_8 0x1e4
Marek Vasutc1876802019-06-09 18:46:42 +0200301 >;
302 };
303
304 pinctrl_led: ledgrp {
305 fsl,pins = <
Marcel Ziswiler342b0c92022-10-22 23:59:40 +0200306 MX53_PAD_CSI0_DAT15__GPIO6_1 0x1c4
307 MX53_PAD_CSI0_DAT16__GPIO6_2 0x1c4
Marek Vasutc1876802019-06-09 18:46:42 +0200308 >;
309 };
310
Marcel Ziswiler342b0c92022-10-22 23:59:40 +0200311 pinctrl_beeper: beepergrp {
312 fsl,pins = <
313 MX53_PAD_CSI0_DAT17__GPIO6_3 0x1c4
314 >;
315 };
316
Marek Vasutc1876802019-06-09 18:46:42 +0200317 pinctrl_can1: can1grp {
318 fsl,pins = <
319 MX53_PAD_GPIO_7__CAN1_TXCAN 0x1c4
320 MX53_PAD_GPIO_8__CAN1_RXCAN 0x1c4
321 >;
322 };
323
324 pinctrl_can2: can2grp {
325 fsl,pins = <
Marcel Ziswiler342b0c92022-10-22 23:59:40 +0200326 MX53_PAD_KEY_COL4__CAN2_TXCAN 0x1e4
Marek Vasutc1876802019-06-09 18:46:42 +0200327 MX53_PAD_KEY_ROW4__CAN2_RXCAN 0x1c4
328 >;
329 };
330
331 pinctrl_display_gpio: display-gpiogrp {
332 fsl,pins = <
Marcel Ziswiler342b0c92022-10-22 23:59:40 +0200333 MX53_PAD_CSI0_DAT12__GPIO5_30 0x1c4 /* Reset */
334 MX53_PAD_CSI0_MCLK__GPIO5_19 0x1e4 /* Int-K */
335 MX53_PAD_CSI0_DAT13__GPIO5_31 0x1c4 /* Int-I */
336
337 MX53_PAD_CSI0_DAT14__GPIO6_0 0x1c4 /* Power down */
Marek Vasutc1876802019-06-09 18:46:42 +0200338 >;
339 };
340
341 pinctrl_edt_ft5x06: edt-ft5x06grp {
342 fsl,pins = <
Marcel Ziswiler342b0c92022-10-22 23:59:40 +0200343 MX53_PAD_PATA_DATA9__GPIO2_9 0x1e4 /* Reset */
344 MX53_PAD_CSI0_DAT19__GPIO6_5 0x1c4 /* Interrupt */
345 MX53_PAD_PATA_DATA10__GPIO2_10 0x1e4 /* Wake */
Marek Vasutc1876802019-06-09 18:46:42 +0200346 >;
347 };
348
Marcel Ziswiler342b0c92022-10-22 23:59:40 +0200349 pinctrl_ecspi2: ecspi2grp {
350 fsl,pins = <
351 MX53_PAD_EIM_CS0__ECSPI2_SCLK 0xe4
352 MX53_PAD_EIM_OE__ECSPI2_MISO 0xe4
353 MX53_PAD_EIM_CS1__ECSPI2_MOSI 0xe4
354 MX53_PAD_EIM_RW__GPIO2_26 0xe4
355 MX53_PAD_EIM_LBA__GPIO2_27 0xe4
356 >;
357 };
358
Marek Vasutc1876802019-06-09 18:46:42 +0200359 pinctrl_esdhc1: esdhc1grp {
360 fsl,pins = <
Marcel Ziswiler342b0c92022-10-22 23:59:40 +0200361 MX53_PAD_SD1_DATA0__ESDHC1_DAT0 0x1e4
362 MX53_PAD_SD1_DATA1__ESDHC1_DAT1 0x1e4
363 MX53_PAD_SD1_DATA2__ESDHC1_DAT2 0x1e4
364 MX53_PAD_SD1_DATA3__ESDHC1_DAT3 0x1e4
365 MX53_PAD_SD1_CMD__ESDHC1_CMD 0x1e4
366 MX53_PAD_SD1_CLK__ESDHC1_CLK 0x1e4
367 MX53_PAD_GPIO_1__GPIO1_1 0x1c4
368 MX53_PAD_GPIO_9__GPIO1_9 0x1e4
Marek Vasutc1876802019-06-09 18:46:42 +0200369 >;
370 };
371
372 pinctrl_fec: fecgrp {
373 fsl,pins = <
Marcel Ziswiler342b0c92022-10-22 23:59:40 +0200374 MX53_PAD_FEC_MDC__FEC_MDC 0x1e4
375 MX53_PAD_FEC_MDIO__FEC_MDIO 0x1e4
376 MX53_PAD_FEC_REF_CLK__FEC_TX_CLK 0x1e4
377 MX53_PAD_FEC_RX_ER__FEC_RX_ER 0x1e4
378 MX53_PAD_FEC_CRS_DV__FEC_RX_DV 0x1e4
379 MX53_PAD_FEC_RXD1__FEC_RDATA_1 0x1e4
380 MX53_PAD_FEC_RXD0__FEC_RDATA_0 0x1e4
381 MX53_PAD_FEC_TX_EN__FEC_TX_EN 0x1c4
382 MX53_PAD_FEC_TXD1__FEC_TDATA_1 0x1e4
383 MX53_PAD_FEC_TXD0__FEC_TDATA_0 0x1e4
384 MX53_PAD_PATA_DA_1__GPIO7_7 0x1e4
385 MX53_PAD_EIM_EB3__GPIO2_31 0x1e4
Marek Vasutc1876802019-06-09 18:46:42 +0200386 >;
387 };
388
389 pinctrl_i2c1: i2c1grp {
390 fsl,pins = <
391 MX53_PAD_EIM_D21__I2C1_SCL 0x400001e4
392 MX53_PAD_EIM_D28__I2C1_SDA 0x400001e4
393 >;
394 };
395
396 pinctrl_i2c3: i2c3grp {
397 fsl,pins = <
398 MX53_PAD_GPIO_6__I2C3_SDA 0x400001e4
399 MX53_PAD_GPIO_5__I2C3_SCL 0x400001e4
400 >;
401 };
402
403 pinctrl_lvds0: lvds0grp {
404 /* LVDS pins only have pin mux configuration */
405 fsl,pins = <
406 MX53_PAD_LVDS0_CLK_P__LDB_LVDS0_CLK 0x80000000
407 MX53_PAD_LVDS0_TX0_P__LDB_LVDS0_TX0 0x80000000
408 MX53_PAD_LVDS0_TX1_P__LDB_LVDS0_TX1 0x80000000
409 MX53_PAD_LVDS0_TX2_P__LDB_LVDS0_TX2 0x80000000
410 MX53_PAD_LVDS0_TX3_P__LDB_LVDS0_TX3 0x80000000
411 >;
412 };
413
Marcel Ziswiler342b0c92022-10-22 23:59:40 +0200414 pinctrl_power_button: powerbutgrp {
415 fsl,pins = <
416 MX53_PAD_SD2_DATA0__GPIO1_15 0x1e4
417 >;
418 };
419
420 pinctrl_power_out: poweroutgrp {
421 fsl,pins = <
422 MX53_PAD_SD2_DATA2__GPIO1_13 0x1e4
423 >;
424 };
425
Marek Vasutc1876802019-06-09 18:46:42 +0200426 pinctrl_uart1: uart1grp {
427 fsl,pins = <
428 MX53_PAD_PATA_DIOW__UART1_TXD_MUX 0x1e4
429 MX53_PAD_PATA_DMACK__UART1_RXD_MUX 0x1e4
Marcel Ziswiler342b0c92022-10-22 23:59:40 +0200430 MX53_PAD_PATA_IORDY__UART1_RTS 0x1e4
431 MX53_PAD_PATA_RESET_B__UART1_CTS 0x1e4
Marek Vasutc1876802019-06-09 18:46:42 +0200432 >;
433 };
434
435 pinctrl_uart2: uart2grp {
436 fsl,pins = <
437 MX53_PAD_PATA_BUFFER_EN__UART2_RXD_MUX 0x1e4
438 MX53_PAD_PATA_DMARQ__UART2_TXD_MUX 0x1e4
Marcel Ziswiler342b0c92022-10-22 23:59:40 +0200439 MX53_PAD_PATA_DIOR__UART2_RTS 0x1e4
440 MX53_PAD_PATA_INTRQ__UART2_CTS 0x1e4
Marek Vasutc1876802019-06-09 18:46:42 +0200441 >;
442 };
443
Marcel Ziswiler342b0c92022-10-22 23:59:40 +0200444 pinctrl_uart3: uart3grp {
445 fsl,pins = <
446 MX53_PAD_PATA_CS_1__UART3_RXD_MUX 0x1e4
447 MX53_PAD_PATA_CS_0__UART3_TXD_MUX 0x1e4
448 MX53_PAD_PATA_DA_2__UART3_RTS 0x1e4
449 >;
450 };
451
Marek Vasutc1876802019-06-09 18:46:42 +0200452 pinctrl_usb: usbgrp {
453 fsl,pins = <
Marcel Ziswiler342b0c92022-10-22 23:59:40 +0200454 MX53_PAD_GPIO_2__GPIO1_2 0x1c4
455 MX53_PAD_GPIO_3__USBOH3_USBH1_OC 0x1c4
456 MX53_PAD_GPIO_4__GPIO1_4 0x1c4
457 MX53_PAD_GPIO_18__GPIO7_13 0x1c4
Marek Vasutc1876802019-06-09 18:46:42 +0200458 >;
459 };
460 };
461};
462
463&ldb {
464 pinctrl-names = "default";
465 pinctrl-0 = <&pinctrl_lvds0>;
466 status = "okay";
467
468 lvds0: lvds-channel@0 {
469 reg = <0>;
470 fsl,data-mapping = "spwg";
471 fsl,data-width = <18>;
472 status = "okay";
473
474 port@2 {
475 reg = <2>;
476
477 lvds0_out: endpoint {
Marcel Ziswiler342b0c92022-10-22 23:59:40 +0200478 remote-endpoint = <&lvds_decoder_in>;
Marek Vasutc1876802019-06-09 18:46:42 +0200479 };
480 };
481 };
482};
483
484&uart1 {
485 pinctrl-names = "default";
486 pinctrl-0 = <&pinctrl_uart1>;
Marcel Ziswiler342b0c92022-10-22 23:59:40 +0200487 uart-has-rtscts;
Marek Vasutc1876802019-06-09 18:46:42 +0200488 status = "okay";
489};
490
491&uart2 {
492 pinctrl-names = "default";
493 pinctrl-0 = <&pinctrl_uart2>;
Marcel Ziswiler342b0c92022-10-22 23:59:40 +0200494 uart-has-rtscts;
Marek Vasutc1876802019-06-09 18:46:42 +0200495 status = "okay";
496};
497
Marcel Ziswiler342b0c92022-10-22 23:59:40 +0200498&uart3 {
499 pinctrl-names = "default";
500 pinctrl-0 = <&pinctrl_uart3>;
501 linux,rs485-enabled-at-boot-time;
502 status = "okay";
503};
504
Marek Vasutc1876802019-06-09 18:46:42 +0200505&usbh1 {
506 pinctrl-names = "default";
507 pinctrl-0 = <&pinctrl_usb>;
508 vbus-supply = <&reg_usbh1_vbus>;
509 phy_type = "utmi";
Marcel Ziswiler342b0c92022-10-22 23:59:40 +0200510 dr_mode = "host";
Marek Vasutc1876802019-06-09 18:46:42 +0200511 status = "okay";
512};
513
514&usbotg {
515 dr_mode = "peripheral";
516 status = "okay";
517};