Gitiles
Code Review Sign In
git01.mediatek.com / filogic / uboot / bf7c0cee160adfa8cbea76491b51fb492d1bf9ba / . / arch / arm / dts / rk3288-firefly-u-boot.dtsi
blob: b7d13bcb860d31e5f316733542fc7a8fc4e4fa1f [file] [log] [blame]
Kever Yangd47e8952019-07-09 21:58:50 +0800[diff] [blame]1// SPDX-License-Identifier: GPL-2.0+
2/*
3 * Copyright (C) 2019 Rockchip Electronics Co., Ltd
4 */
5
6#include "rk3288-u-boot.dtsi"
7
Johan Jonker8ba3d4062022-04-15 23:21:39 +0200[diff] [blame]8/ {
Jonas Karlman87426962024-12-12 22:09:42 +0000[diff] [blame]9 chosen {
10 stdout-path = "serial2:115200n8";
Johan Jonker8ba3d4062022-04-15 23:21:39 +0200[diff] [blame]11 };
12};
13
14&dmc {
15 rockchip,pctl-timing = <0x29a 0xc8 0x1f8 0x42 0x4e 0x4 0xea 0xa
16 0x5 0x0 0xa 0x7 0x19 0x24 0xa 0x7
17 0x5 0xa 0x5 0x200 0x5 0x10 0x40 0x0
18 0x1 0x7 0x7 0x4 0xc 0x43 0x100 0x0
19 0x5 0x0>;
20 rockchip,phy-timing = <0x48f9aab4 0xea0910 0x1002c200
21 0xa60 0x40 0x10 0x0>;
22 /* Add a dummy value to cause of-platdata think this is bytes */
23 rockchip,sdram-params = <0x30B25564 0x627 3 666000000 3 9 1>;
24};
25
Jonas Karlmand364ad62024-12-12 22:09:35 +0000[diff] [blame]26&emmc {
Jonas Karlman329c02c2024-12-12 22:09:38 +0000[diff] [blame]27 bootph-pre-ram;
28 bootph-some-ram;
29};
30
31&emmc_bus8 {
32 bootph-pre-ram;
33 bootph-some-ram;
34};
35
36&emmc_clk {
37 bootph-pre-ram;
38 bootph-some-ram;
Kever Yangd47e8952019-07-09 21:58:50 +0800[diff] [blame]39};
40
Jonas Karlman329c02c2024-12-12 22:09:38 +0000[diff] [blame]41&emmc_cmd {
42 bootph-pre-ram;
43 bootph-some-ram;
44};
45
46&emmc_pwr {
47 bootph-pre-ram;
48 bootph-some-ram;
49};
50
Jonas Karlmanb5c3db72024-12-12 22:09:43 +0000[diff] [blame]51&gmac {
52 snps,reset-delays-us = <0 10000 80000>;
53};
54
Jonas Karlman329c02c2024-12-12 22:09:38 +0000[diff] [blame]55&gpio7 {
56 /delete-property/ bootph-all;
Jonas Karlmancef07042024-12-12 22:09:39 +0000[diff] [blame]57 bootph-pre-ram;
Jonas Karlman329c02c2024-12-12 22:09:38 +0000[diff] [blame]58};
59
60&pcfg_pull_none {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]61 bootph-all;
Kever Yangd47e8952019-07-09 21:58:50 +0800[diff] [blame]62};
63
Jonas Karlman329c02c2024-12-12 22:09:38 +0000[diff] [blame]64&pcfg_pull_none_12ma {
Jonas Karlmand364ad62024-12-12 22:09:35 +0000[diff] [blame]65 bootph-pre-ram;
Jonas Karlman329c02c2024-12-12 22:09:38 +0000[diff] [blame]66 bootph-some-ram;
Kever Yangd47e8952019-07-09 21:58:50 +0800[diff] [blame]67};
68
Jonas Karlman329c02c2024-12-12 22:09:38 +0000[diff] [blame]69&pcfg_pull_up {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]70 bootph-all;
Kever Yangd47e8952019-07-09 21:58:50 +0800[diff] [blame]71};
72
Jonas Karlman329c02c2024-12-12 22:09:38 +0000[diff] [blame]73&pcfg_pull_up_drv_12ma {
74 bootph-pre-ram;
75 bootph-some-ram;
76};
77
Jonas Karlman87426962024-12-12 22:09:42 +0000[diff] [blame]78&power_led {
79 default-state = "on";
80};
81
Jonas Karlmand364ad62024-12-12 22:09:35 +0000[diff] [blame]82&sdmmc {
Jonas Karlman329c02c2024-12-12 22:09:38 +0000[diff] [blame]83 bootph-pre-ram;
84 bootph-some-ram;
Kever Yangd47e8952019-07-09 21:58:50 +0800[diff] [blame]85};
86
Kever Yangd47e8952019-07-09 21:58:50 +0800[diff] [blame]87&sdmmc_bus4 {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]88 bootph-pre-ram;
Jonas Karlman329c02c2024-12-12 22:09:38 +0000[diff] [blame]89 bootph-some-ram;
90};
91
92&sdmmc_cd {
93 bootph-pre-ram;
94 bootph-some-ram;
Kever Yangd47e8952019-07-09 21:58:50 +0800[diff] [blame]95};
96
97&sdmmc_clk {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]98 bootph-pre-ram;
Jonas Karlman329c02c2024-12-12 22:09:38 +0000[diff] [blame]99 bootph-some-ram;
Kever Yangd47e8952019-07-09 21:58:50 +0800[diff] [blame]100};
101
102&sdmmc_cmd {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]103 bootph-pre-ram;
Jonas Karlman329c02c2024-12-12 22:09:38 +0000[diff] [blame]104 bootph-some-ram;
Kever Yangd47e8952019-07-09 21:58:50 +0800[diff] [blame]105};
106
107&sdmmc_pwr {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]108 bootph-pre-ram;
Kever Yangd47e8952019-07-09 21:58:50 +0800[diff] [blame]109};
Jonas Karlmand364ad62024-12-12 22:09:35 +0000[diff] [blame]110
111&uart2 {
112 bootph-all;
113};
Jonas Karlman329c02c2024-12-12 22:09:38 +0000[diff] [blame]114
115&uart2_xfer {
116 bootph-pre-sram;
117 bootph-pre-ram;
118};
Jonas Karlmancef07042024-12-12 22:09:39 +0000[diff] [blame]119
120&vcc_sd {
121 bootph-pre-ram;
122};