| developer | 2de1f36 | 2025-01-23 16:55:01 +0800 | [diff] [blame] | 1 | // SPDX-License-Identifier: (GPL-2.0 OR MIT) |
| 2 | /* |
| 3 | * Copyright (C) 2025 MediaTek Inc. |
| 4 | * Author: Sam.Shih <sam.shih@mediatek.com> |
| 5 | */ |
| 6 | |
| 7 | #include <dt-bindings/clock/mediatek,mt7987-clk.h> |
| 8 | #include <dt-bindings/reset/mt7988-reset.h> |
| 9 | |
| 10 | &netsys { |
| 11 | eth0: ethernet@15110100 { |
| 12 | compatible = "mediatek,mt7987-eth", "syscon"; |
| 13 | reg = <0 0x15100000 0 0x20000>; |
| 14 | mediatek,gmac-id = <0>; |
| 15 | mediatek,ethsys = <ðsys>; |
| 16 | mediatek,sgmiisys = <&sgmiisys0>; |
| 17 | mediatek,infracfg = <&topmisc>; |
| 18 | resets = <ðsys ETHDMA_FE_RST>; |
| 19 | reset-names = "fe"; |
| 20 | #address-cells = <1>; |
| 21 | #size-cells = <0>; |
| 22 | status = "disabled"; |
| 23 | }; |
| 24 | |
| 25 | eth1: ethernet@15110200 { |
| 26 | compatible = "mediatek,mt7987-eth", "syscon"; |
| 27 | reg = <0 0x15100000 0 0x20000>; |
| 28 | mediatek,gmac-id = <1>; |
| 29 | mediatek,ethsys = <ðsys>; |
| 30 | mediatek,infracfg = <&topmisc>; |
| 31 | resets = <ðsys ETHDMA_FE_RST>; |
| 32 | reset-names = "fe"; |
| 33 | #address-cells = <1>; |
| 34 | #size-cells = <0>; |
| 35 | status = "disabled"; |
| 36 | }; |
| 37 | |
| 38 | eth2: ethernet@15110300 { |
| 39 | compatible = "mediatek,mt7987-eth", "syscon"; |
| 40 | reg = <0 0x15100000 0 0x20000>; |
| 41 | mediatek,gmac-id = <2>; |
| 42 | mediatek,ethsys = <ðsys>; |
| 43 | mediatek,sgmiisys = <&sgmiisys1>; |
| 44 | mediatek,infracfg = <&topmisc>; |
| 45 | resets = <ðsys ETHDMA_FE_RST>; |
| 46 | reset-names = "fe"; |
| 47 | #address-cells = <1>; |
| 48 | #size-cells = <0>; |
| 49 | status = "disabled"; |
| 50 | }; |
| 51 | }; |