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git01.mediatek.com / filogic / uboot / bf4645c55ab43be1e39745890ab6443530b32ea2 / . / configs / at91sam9x5ek_mmc_defconfig
blob: 63ddf7535cdd47996deef994579f83d5881c1bc5 [file] [log] [blame]
Masahiro Yamadad3ae6782014-07-30 14:08:14 +0900[diff] [blame]1CONFIG_ARM=y
Masahiro Yamadaaf908ee2015-02-20 17:04:01 +0900[diff] [blame]2CONFIG_ARCH_AT91=y
Tom Rini07edfae2018-02-03 12:10:38 -0500[diff] [blame]3CONFIG_SYS_TEXT_BASE=0x26f00000
Masahiro Yamadad3ae6782014-07-30 14:08:14 +0900[diff] [blame]4CONFIG_TARGET_AT91SAM9X5EK=y
Wenyou Yangf345e282017-04-18 14:51:54 +0800[diff] [blame]5CONFIG_SYS_MALLOC_F_LEN=0x2000
Tom Rinic9285bf2019-04-29 15:54:04 -0400[diff] [blame]6CONFIG_NR_DRAM_BANKS=1
Tom Rinie0056d72018-06-04 11:57:37 -0400[diff] [blame]7CONFIG_DEBUG_UART_BOARD_INIT=y
8CONFIG_DEBUG_UART_BASE=0xfffff200
9CONFIG_DEBUG_UART_CLOCK=132000000
Tom Rini256aa742017-06-19 09:47:40 -0400[diff] [blame]10CONFIG_DEBUG_UART=y
Eugen Hristev3c4c7eb2018-10-08 09:55:19 +0300[diff] [blame]11CONFIG_FIT=y
Wenyou Yange035ea72017-09-14 11:07:44 +0800[diff] [blame]12CONFIG_SD_BOOT=y
Heiko Schocher0b368b12016-06-07 08:31:14 +0200[diff] [blame]13CONFIG_BOOTDELAY=3
Sam Protsenkobd7bffe2017-08-14 20:22:17 +0300[diff] [blame]14CONFIG_USE_BOOTARGS=y
15CONFIG_BOOTARGS="mem=128M console=ttyS0,115200 mtdparts=atmel_nand:8M(bootstrap/uboot/kernel)ro,-(rootfs) root=/dev/mmcblk0p2 rw rootfstype=ext4 rootwait"
Simon Glass9fd2a022016-10-17 20:12:37 -0600[diff] [blame]16# CONFIG_CONSOLE_MUX is not set
17CONFIG_SYS_CONSOLE_IS_IN_ENV=y
Lokesh Vutla94d95e42016-10-11 21:33:46 -0400[diff] [blame]18# CONFIG_DISPLAY_BOARDINFO is not set
Tom Rinif852e732016-04-21 21:37:19 -0400[diff] [blame]19CONFIG_HUSH_PARSER=y
Bin Meng63c10982015-09-28 05:14:15 -0700[diff] [blame]20CONFIG_SYS_PROMPT="U-Boot> "
Tom Rini1d9ac832016-04-24 17:29:26 -0400[diff] [blame]21CONFIG_CMD_BOOTZ=y
Joe Hershberger5a9d7f12015-06-22 16:15:30 -0500[diff] [blame]22# CONFIG_CMD_FLASH is not set
Tom Rini1d9ac832016-04-24 17:29:26 -0400[diff] [blame]23CONFIG_CMD_MMC=y
Tom Rini00448d22017-07-28 21:31:42 -0400[diff] [blame]24CONFIG_CMD_NAND=y
25CONFIG_CMD_NAND_TRIMFFS=y
Tom Rini0f2dcb92016-04-22 16:41:25 -0400[diff] [blame]26CONFIG_CMD_SF=y
27CONFIG_CMD_USB=y
Joe Hershberger5a9d7f12015-06-22 16:15:30 -0500[diff] [blame]28# CONFIG_CMD_SETEXPR is not set
Tom Rini0f2dcb92016-04-22 16:41:25 -0400[diff] [blame]29CONFIG_CMD_DHCP=y
30CONFIG_CMD_PING=y
Tom Rini1d9ac832016-04-24 17:29:26 -0400[diff] [blame]31CONFIG_CMD_FAT=y
Tom Rini2b62b912018-11-13 19:54:45 -0500[diff] [blame]32CONFIG_CMD_MTDPARTS=y
Heiko Schocher09dbb852016-09-21 07:58:19 +0200[diff] [blame]33CONFIG_CMD_UBI=y
Wenyou Yangf345e282017-04-18 14:51:54 +0800[diff] [blame]34CONFIG_OF_CONTROL=y
Tom Rini74060322018-09-03 15:26:12 -0400[diff] [blame]35CONFIG_DEFAULT_DEVICE_TREE="at91sam9g35ek"
Tom Rini5b0b0402017-08-28 07:16:32 -0400[diff] [blame]36CONFIG_ENV_IS_IN_FAT=y
Wenyou Yangf345e282017-04-18 14:51:54 +0800[diff] [blame]37CONFIG_DM=y
38CONFIG_CLK=y
39CONFIG_CLK_AT91=y
Wenyou Yangf345e282017-04-18 14:51:54 +0800[diff] [blame]40CONFIG_DM_GPIO=y
41CONFIG_AT91_GPIO=y
42CONFIG_DM_MMC=y
43CONFIG_GENERIC_ATMEL_MCI=y
Adam Ford9c519182018-07-08 08:11:07 -0500[diff] [blame]44CONFIG_NAND=y
45CONFIG_NAND_ATMEL=y
Wenyou Yangf345e282017-04-18 14:51:54 +0800[diff] [blame]46CONFIG_DM_SPI_FLASH=y
Joe Hershberger17491a82015-06-22 16:15:29 -0500[diff] [blame]47CONFIG_SPI_FLASH=y
Patrick Delaunay0df81042019-02-27 15:20:36 +0100[diff] [blame]48CONFIG_SF_DEFAULT_SPEED=30000000
Bin Meng27f5b192015-11-25 05:34:54 -0800[diff] [blame]49CONFIG_SPI_FLASH_ATMEL=y
Wenyou Yangf345e282017-04-18 14:51:54 +0800[diff] [blame]50CONFIG_DM_ETH=y
51CONFIG_MACB=y
52CONFIG_PINCTRL=y
53CONFIG_PINCTRL_AT91=y
54CONFIG_DM_SERIAL=y
Wenyou Yanga9606f02017-04-18 14:51:56 +0800[diff] [blame]55CONFIG_DEBUG_UART_ATMEL=y
Wenyou Yanga9606f02017-04-18 14:51:56 +0800[diff] [blame]56CONFIG_DEBUG_UART_ANNOUNCE=y
Wenyou Yangf345e282017-04-18 14:51:54 +0800[diff] [blame]57CONFIG_ATMEL_USART=y
Adam Ford4e96ff82018-04-15 13:51:26 -0400[diff] [blame]58CONFIG_SPI=y
Wenyou Yangf345e282017-04-18 14:51:54 +0800[diff] [blame]59CONFIG_DM_SPI=y
Wenyou.Yang@microchip.com272167d2017-08-15 17:40:27 +0800[diff] [blame]60CONFIG_TIMER=y
61CONFIG_ATMEL_PIT_TIMER=y
Tom Rini6e9cb112016-09-08 16:31:26 -0400[diff] [blame]62CONFIG_USB=y
Wenyou Yangf345e282017-04-18 14:51:54 +0800[diff] [blame]63CONFIG_DM_USB=y
64CONFIG_USB_EHCI_HCD=y
Tom Rini6e9cb112016-09-08 16:31:26 -0400[diff] [blame]65CONFIG_USB_STORAGE=y
Wenyou Yangaa023532017-09-18 15:26:01 +0800[diff] [blame]66CONFIG_DM_VIDEO=y
67CONFIG_ATMEL_HLCD=y