Jagan Teki | 20759fa | 2021-11-15 23:08:20 +0530 | [diff] [blame] | 1 | // SPDX-License-Identifier: (GPL-2.0+ OR MIT) |
| 2 | /* |
| 3 | * Copyright (c) 2020 Fuzhou Rockchip Electronics Co., Ltd |
| 4 | * Copyright (c) 2020 Engicam srl |
| 5 | * Copyright (c) 2020 Amarula Solutions(India) |
| 6 | */ |
| 7 | |
| 8 | /dts-v1/; |
| 9 | #include "px30.dtsi" |
| 10 | #include "px30-engicam-edimm2.2.dtsi" |
| 11 | #include "px30-engicam-px30-core.dtsi" |
| 12 | |
| 13 | / { |
| 14 | model = "Engicam PX30.Core EDIMM2.2 Starter Kit"; |
| 15 | compatible = "engicam,px30-core-edimm2.2", "engicam,px30-core", |
| 16 | "rockchip,px30"; |
| 17 | |
| 18 | chosen { |
| 19 | stdout-path = "serial2:115200n8"; |
| 20 | }; |
| 21 | }; |
| 22 | |
| 23 | &pinctrl { |
| 24 | bt { |
| 25 | bt_enable_h: bt-enable-h { |
| 26 | rockchip,pins = <1 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>; |
| 27 | }; |
| 28 | }; |
| 29 | |
| 30 | sdio-pwrseq { |
| 31 | wifi_enable_h: wifi-enable-h { |
| 32 | rockchip,pins = <1 RK_PC3 RK_FUNC_GPIO &pcfg_pull_none>; |
| 33 | }; |
| 34 | }; |
| 35 | }; |
| 36 | |
| 37 | &sdio_pwrseq { |
| 38 | reset-gpios = <&gpio1 RK_PC3 GPIO_ACTIVE_LOW>; |
| 39 | }; |
| 40 | |
| 41 | &vcc3v3_btreg { |
| 42 | enable-gpio = <&gpio1 RK_PC2 GPIO_ACTIVE_HIGH>; |
| 43 | }; |