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Manoj Sai38b4c762022-08-26 18:03:37 +05301// SPDX-License-Identifier: GPL-2.0+
2/*
3 * Copyright 2019 NXP
4 * Copyright (c) 2020 Amarula Solutons(India)
5 */
6
7#include "imx8mp-u-boot.dtsi"
8
9/ {
10 wdt-reboot {
11 compatible = "wdt-reboot";
12 wdt = <&wdog1>;
13 u-boot,dm-spl;
14 };
15
16 firmware {
17 optee {
18 compatible = "linaro,optee-tz";
19 method = "smc";
20 };
21 };
22};
23
24&reg_usdhc2_vmmc {
25 u-boot,off-on-delay-us = <20000>;
26};
27
28&reg_usdhc2_vmmc {
29 u-boot,dm-spl;
30};
31
32&pinctrl_uart2 {
33 u-boot,dm-spl;
34};
35
36&pinctrl_usdhc2_gpio {
37 u-boot,dm-spl;
38};
39
40&pinctrl_usdhc2 {
41 u-boot,dm-spl;
42};
43
44&pinctrl_usdhc3 {
45 u-boot,dm-spl;
46};
47
48&gpio1 {
49 u-boot,dm-spl;
50};
51
52&gpio2 {
53 u-boot,dm-spl;
54};
55
56&gpio3 {
57 u-boot,dm-spl;
58};
59
60&gpio4 {
61 u-boot,dm-spl;
62};
63
64&gpio5 {
65 u-boot,dm-spl;
66};
67
68&uart2 {
69 u-boot,dm-spl;
70};
71
72&crypto {
73 u-boot,dm-spl;
74};
75
76&sec_jr0 {
77 u-boot,dm-spl;
78};
79
80&sec_jr1 {
81 u-boot,dm-spl;
82};
83
84&sec_jr2 {
85 u-boot,dm-spl;
86};
87
88&i2c1 {
89 u-boot,dm-spl;
90};
91
92&i2c2 {
93 u-boot,dm-spl;
94};
95
96&i2c3 {
97 u-boot,dm-spl;
98};
99
100&i2c4 {
101 u-boot,dm-spl;
102};
103
104&i2c5 {
105 u-boot,dm-spl;
106};
107
108&i2c6 {
109 u-boot,dm-spl;
110};
111
112&usdhc1 {
113 u-boot,dm-spl;
114};
115
116&usdhc2 {
117 u-boot,dm-spl;
118 sd-uhs-sdr104;
119 sd-uhs-ddr50;
120 no-1-8-v;
121};
122
123&usdhc3 {
124 u-boot,dm-spl;
125 mmc-hs400-1_8v;
126 mmc-hs400-enhanced-strobe;
127};
128
129&wdog1 {
130 u-boot,dm-spl;
131};
132
133&eqos {
134 /delete-property/ assigned-clocks;
135 /delete-property/ assigned-clock-parents;
136 /delete-property/ assigned-clock-rates;
137};
138
139&ethphy0 {
140 reset-gpios = <&gpio4 22 GPIO_ACTIVE_LOW>;
141 reset-delay-us = <15000>;
142 reset-post-delay-us = <100000>;
143};
144
145&fec {
146 phy-reset-gpios = <&gpio4 2 GPIO_ACTIVE_LOW>;
147 phy-reset-duration = <15>;
148 phy-reset-post-delay = <100>;
149};