Tom Rini | 10e4779 | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0+ */ |
Sedji Gaouaou | 538566d | 2009-07-09 10:16:29 +0200 | [diff] [blame] | 2 | /* |
| 3 | * (C) Copyright 2007-2008 |
Stelian Pop | 5ee0c7f | 2011-11-01 00:00:39 +0100 | [diff] [blame] | 4 | * Stelian Pop <stelian@popies.net> |
Sedji Gaouaou | 538566d | 2009-07-09 10:16:29 +0200 | [diff] [blame] | 5 | * Lead Tech Design <www.leadtechdesign.com> |
| 6 | * |
| 7 | * Configuation settings for the AT91SAM9M10G45EK board(and AT91SAM9G45EKES). |
Sedji Gaouaou | 538566d | 2009-07-09 10:16:29 +0200 | [diff] [blame] | 8 | */ |
| 9 | |
| 10 | #ifndef __CONFIG_H |
| 11 | #define __CONFIG_H |
| 12 | |
| 13 | /* ARM asynchronous clock */ |
Thomas Petazzoni | a5e8576 | 2011-08-04 11:08:50 +0000 | [diff] [blame] | 14 | #define CONFIG_SYS_AT91_SLOW_CLOCK 32768 |
| 15 | #define CONFIG_SYS_AT91_MAIN_CLOCK 12000000 /* from 12 MHz crystal */ |
Sedji Gaouaou | 538566d | 2009-07-09 10:16:29 +0200 | [diff] [blame] | 16 | |
Thomas Petazzoni | a5e8576 | 2011-08-04 11:08:50 +0000 | [diff] [blame] | 17 | /* general purpose I/O */ |
Thomas Petazzoni | a5e8576 | 2011-08-04 11:08:50 +0000 | [diff] [blame] | 18 | |
Sedji Gaouaou | 538566d | 2009-07-09 10:16:29 +0200 | [diff] [blame] | 19 | /* LCD */ |
Sedji Gaouaou | 538566d | 2009-07-09 10:16:29 +0200 | [diff] [blame] | 20 | #define LCD_BPP LCD_COLOR8 |
Sedji Gaouaou | 538566d | 2009-07-09 10:16:29 +0200 | [diff] [blame] | 21 | |
Sedji Gaouaou | 538566d | 2009-07-09 10:16:29 +0200 | [diff] [blame] | 22 | /* SDRAM */ |
Wenyou Yang | d19b901 | 2017-09-14 11:07:42 +0800 | [diff] [blame] | 23 | #define CONFIG_SYS_SDRAM_BASE 0x70000000 |
Thomas Petazzoni | a5e8576 | 2011-08-04 11:08:50 +0000 | [diff] [blame] | 24 | #define CONFIG_SYS_SDRAM_SIZE 0x08000000 |
Sedji Gaouaou | 538566d | 2009-07-09 10:16:29 +0200 | [diff] [blame] | 25 | |
Thomas Petazzoni | a5e8576 | 2011-08-04 11:08:50 +0000 | [diff] [blame] | 26 | #define CONFIG_SYS_INIT_SP_ADDR \ |
Wenyou Yang | 269c9d1 | 2017-04-18 15:15:48 +0800 | [diff] [blame] | 27 | (CONFIG_SYS_SDRAM_BASE + 16 * 1024 - GENERATED_GBL_DATA_SIZE) |
Sedji Gaouaou | 538566d | 2009-07-09 10:16:29 +0200 | [diff] [blame] | 28 | |
Sedji Gaouaou | 538566d | 2009-07-09 10:16:29 +0200 | [diff] [blame] | 29 | /* NAND flash */ |
| 30 | #ifdef CONFIG_CMD_NAND |
Sedji Gaouaou | 538566d | 2009-07-09 10:16:29 +0200 | [diff] [blame] | 31 | #define CONFIG_SYS_MAX_NAND_DEVICE 1 |
Thomas Petazzoni | a5e8576 | 2011-08-04 11:08:50 +0000 | [diff] [blame] | 32 | #define CONFIG_SYS_NAND_BASE ATMEL_BASE_CS3 |
| 33 | #define CONFIG_SYS_NAND_DBW_8 |
Sedji Gaouaou | 538566d | 2009-07-09 10:16:29 +0200 | [diff] [blame] | 34 | /* our ALE is AD21 */ |
| 35 | #define CONFIG_SYS_NAND_MASK_ALE (1 << 21) |
| 36 | /* our CLE is AD22 */ |
| 37 | #define CONFIG_SYS_NAND_MASK_CLE (1 << 22) |
| 38 | #define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PC14 |
| 39 | #define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PC8 |
Wolfgang Denk | 1f79774 | 2009-07-18 21:52:24 +0200 | [diff] [blame] | 40 | |
Sedji Gaouaou | 538566d | 2009-07-09 10:16:29 +0200 | [diff] [blame] | 41 | #endif |
| 42 | |
Wenyou Yang | e035ea7 | 2017-09-14 11:07:44 +0800 | [diff] [blame] | 43 | #ifdef CONFIG_NAND_BOOT |
Thomas Petazzoni | a5e8576 | 2011-08-04 11:08:50 +0000 | [diff] [blame] | 44 | /* bootstrap + u-boot + env in nandflash */ |
Wenyou Yang | e035ea7 | 2017-09-14 11:07:44 +0800 | [diff] [blame] | 45 | #elif CONFIG_SD_BOOT |
Wu, Josh | de85ca6 | 2014-05-21 10:42:16 +0800 | [diff] [blame] | 46 | /* bootstrap + u-boot + env + linux in mmc */ |
Wu, Josh | de85ca6 | 2014-05-21 10:42:16 +0800 | [diff] [blame] | 47 | #endif |
Sedji Gaouaou | 538566d | 2009-07-09 10:16:29 +0200 | [diff] [blame] | 48 | |
Bo Shen | c56e9f4 | 2015-03-27 14:23:34 +0800 | [diff] [blame] | 49 | /* Defines for SPL */ |
Bo Shen | c56e9f4 | 2015-03-27 14:23:34 +0800 | [diff] [blame] | 50 | #define CONFIG_SPL_MAX_SIZE 0x010000 |
| 51 | #define CONFIG_SPL_STACK 0x310000 |
| 52 | |
Bo Shen | c56e9f4 | 2015-03-27 14:23:34 +0800 | [diff] [blame] | 53 | #define CONFIG_SYS_MONITOR_LEN 0x80000 |
| 54 | |
Wenyou Yang | e035ea7 | 2017-09-14 11:07:44 +0800 | [diff] [blame] | 55 | #ifdef CONFIG_SD_BOOT |
Bo Shen | c56e9f4 | 2015-03-27 14:23:34 +0800 | [diff] [blame] | 56 | |
| 57 | #define CONFIG_SPL_BSS_START_ADDR 0x70000000 |
| 58 | #define CONFIG_SPL_BSS_MAX_SIZE 0x00080000 |
| 59 | #define CONFIG_SYS_SPL_MALLOC_START 0x70080000 |
| 60 | #define CONFIG_SYS_SPL_MALLOC_SIZE 0x00080000 |
| 61 | |
Bo Shen | c56e9f4 | 2015-03-27 14:23:34 +0800 | [diff] [blame] | 62 | #define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img" |
Bo Shen | c56e9f4 | 2015-03-27 14:23:34 +0800 | [diff] [blame] | 63 | |
Wenyou Yang | e035ea7 | 2017-09-14 11:07:44 +0800 | [diff] [blame] | 64 | #elif CONFIG_NAND_BOOT |
Bo Shen | c56e9f4 | 2015-03-27 14:23:34 +0800 | [diff] [blame] | 65 | #define CONFIG_SPL_NAND_SOFTECC |
Bo Shen | c56e9f4 | 2015-03-27 14:23:34 +0800 | [diff] [blame] | 66 | #define CONFIG_SYS_NAND_U_BOOT_SIZE 0x80000 |
Bo Shen | c56e9f4 | 2015-03-27 14:23:34 +0800 | [diff] [blame] | 67 | |
Bo Shen | c56e9f4 | 2015-03-27 14:23:34 +0800 | [diff] [blame] | 68 | #define CONFIG_SYS_NAND_ECCSIZE 256 |
| 69 | #define CONFIG_SYS_NAND_ECCBYTES 3 |
Bo Shen | c56e9f4 | 2015-03-27 14:23:34 +0800 | [diff] [blame] | 70 | #define CONFIG_SYS_NAND_ECCPOS { 40, 41, 42, 43, 44, 45, 46, 47, \ |
| 71 | 48, 49, 50, 51, 52, 53, 54, 55, \ |
| 72 | 56, 57, 58, 59, 60, 61, 62, 63, } |
| 73 | #endif |
| 74 | |
Bo Shen | c56e9f4 | 2015-03-27 14:23:34 +0800 | [diff] [blame] | 75 | #define CONFIG_SYS_MASTER_CLOCK 132096000 |
| 76 | #define CONFIG_SYS_AT91_PLLA 0x20c73f03 |
| 77 | #define CONFIG_SYS_MCKR 0x1301 |
| 78 | #define CONFIG_SYS_MCKR_CSS 0x1302 |
| 79 | |
Sedji Gaouaou | 538566d | 2009-07-09 10:16:29 +0200 | [diff] [blame] | 80 | #endif |