| Tom Rini | 10e4779 | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0 */ |
| Paul Burton | f5de32a | 2016-09-08 07:47:39 +0100 | [diff] [blame] | 2 | /* |
| 3 | * Copyright (C) 2016 Imagination Technologies |
| Paul Burton | f5de32a | 2016-09-08 07:47:39 +0100 | [diff] [blame] | 4 | */ |
| 5 | |
| 6 | #include <config.h> |
| 7 | |
| 8 | #include <asm/addrspace.h> |
| 9 | #include <asm/asm.h> |
| 10 | #include <asm/mipsregs.h> |
| 11 | #include <asm/regdef.h> |
| 12 | |
| 13 | #include "boston-regs.h" |
| 14 | |
| 15 | .data |
| 16 | |
| 17 | msg_ddr_cal: .ascii "DDR Cal " |
| 18 | msg_ddr_ok: .ascii "DDR OK " |
| 19 | |
| 20 | .text |
| 21 | |
| 22 | LEAF(lowlevel_init) |
| 23 | move s0, ra |
| 24 | |
| 25 | PTR_LA a0, msg_ddr_cal |
| 26 | bal lowlevel_display |
| 27 | |
| 28 | PTR_LI t0, BOSTON_PLAT_DDR3STAT |
| 29 | 1: lw t1, 0(t0) |
| 30 | andi t1, t1, BOSTON_PLAT_DDR3STAT_CALIB |
| 31 | beqz t1, 1b |
| 32 | |
| 33 | PTR_LA a0, msg_ddr_ok |
| 34 | bal lowlevel_display |
| 35 | |
| Paul Burton | f5de32a | 2016-09-08 07:47:39 +0100 | [diff] [blame] | 36 | jr s0 |
| 37 | END(lowlevel_init) |
| 38 | |
| 39 | LEAF(lowlevel_display) |
| 40 | .set push |
| 41 | .set noat |
| 42 | PTR_LI AT, BOSTON_LCD_BASE |
| 43 | #ifdef CONFIG_64BIT |
| 44 | ld k1, 0(a0) |
| 45 | sd k1, 0(AT) |
| 46 | #else |
| 47 | lw k1, 0(a0) |
| 48 | sw k1, 0(AT) |
| 49 | lw k1, 4(a0) |
| 50 | sw k1, 4(AT) |
| 51 | #endif |
| 52 | .set pop |
| Paul Burton | 7383b48 | 2017-09-15 11:34:31 -0700 | [diff] [blame] | 53 | jr ra |
| Paul Burton | f5de32a | 2016-09-08 07:47:39 +0100 | [diff] [blame] | 54 | END(lowlevel_display) |