blob: 5d864b901298e3b76da335676521f3846bf88002 [file] [log] [blame]
Wolfgang Denkadf20a12005-09-25 01:48:28 +02001/*
2 * (C) Copyright 2002
3 * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
4 * Marius Groeger <mgroeger@sysgo.de>
5 *
6 * (C) Copyright 2002
Detlev Zundelf1b3f2b2009-05-13 10:54:10 +02007 * Gary Jennejohn, DENX Software Engineering, <garyj@denx.de>
Wolfgang Denkadf20a12005-09-25 01:48:28 +02008 *
Wolfgang Denkbd8ec7e2013-10-07 13:07:26 +02009 * SPDX-License-Identifier: GPL-2.0+
Wolfgang Denkadf20a12005-09-25 01:48:28 +020010 */
11
12/*
13 * CPU specific code
14 */
15
16#include <common.h>
17#include <command.h>
Jean-Christophe PLAGNIOL-VILLARD9053b5a2009-04-05 13:02:43 +020018#include <asm/system.h>
Albert ARIBAUD21505f92014-04-15 16:13:48 +020019#include <asm/io.h>
Wolfgang Denkadf20a12005-09-25 01:48:28 +020020
Jean-Christophe PLAGNIOL-VILLARDe6b5f1b2009-04-05 13:06:31 +020021static void cache_flush(void);
Wolfgang Denkadf20a12005-09-25 01:48:28 +020022
Wolfgang Denkadf20a12005-09-25 01:48:28 +020023int cleanup_before_linux (void)
24{
25 /*
26 * this function is called just before we call linux
27 * it prepares the processor for linux
28 *
29 * we turn off caches etc ...
30 */
31
Wolfgang Denkadf20a12005-09-25 01:48:28 +020032 disable_interrupts ();
33
Wolfgang Denkc856ccc2005-09-25 02:00:47 +020034 /* ARM926E-S needs the protection unit enabled for the icache to have
35 * been enabled - left for possible later use
Wolfgang Denkadf20a12005-09-25 01:48:28 +020036 * should turn off the protection unit as well....
Wolfgang Denkc856ccc2005-09-25 02:00:47 +020037 */
Wolfgang Denkadf20a12005-09-25 01:48:28 +020038 /* turn off I/D-cache */
Jean-Christophe PLAGNIOL-VILLARDe6b5f1b2009-04-05 13:06:31 +020039 icache_disable();
40 dcache_disable();
Wolfgang Denkadf20a12005-09-25 01:48:28 +020041 /* flush I/D-cache */
Jean-Christophe PLAGNIOL-VILLARDe6b5f1b2009-04-05 13:06:31 +020042 cache_flush();
43
44 return 0;
Wolfgang Denkadf20a12005-09-25 01:48:28 +020045}
46
Jean-Christophe PLAGNIOL-VILLARDe6b5f1b2009-04-05 13:06:31 +020047/* flush I/D-cache */
48static void cache_flush (void)
Wolfgang Denkadf20a12005-09-25 01:48:28 +020049{
Jean-Christophe PLAGNIOL-VILLARDe6b5f1b2009-04-05 13:06:31 +020050 unsigned long i = 0;
Wolfgang Denkadf20a12005-09-25 01:48:28 +020051
Jean-Christophe PLAGNIOL-VILLARDe6b5f1b2009-04-05 13:06:31 +020052 asm ("mcr p15, 0, %0, c7, c5, 0": :"r" (i));
53 asm ("mcr p15, 0, %0, c7, c6, 0": :"r" (i));
Wolfgang Denkadf20a12005-09-25 01:48:28 +020054}
Albert ARIBAUD21505f92014-04-15 16:13:48 +020055
Masahiro Yamada665ab672015-04-21 21:59:38 +090056#ifndef CONFIG_ARCH_INTEGRATOR
Albert ARIBAUD21505f92014-04-15 16:13:48 +020057
58__attribute__((noreturn)) void reset_cpu(ulong addr __attribute__((unused)))
59{
60 writew(0x0, 0xfffece10);
61 writew(0x8, 0xfffece10);
62 for (;;)
63 ;
64}
65
Masahiro Yamada665ab672015-04-21 21:59:38 +090066#endif /* #ifdef CONFIG_ARCH_INTEGRATOR */