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Tom Rini10e47792018-05-06 17:58:06 -04001/* SPDX-License-Identifier: GPL-2.0+ */
Marek Vasut00671d92017-10-09 21:51:10 +02002/*
3 * DHCOM DH-iMX6 PDK board configuration
4 *
5 * Copyright (C) 2017 Marek Vasut <marex@denx.de>
Marek Vasut00671d92017-10-09 21:51:10 +02006 */
7
8#ifndef __DH_IMX6_CONFIG_H
9#define __DH_IMX6_CONFIG_H
10
11#include <asm/arch/imx-regs.h>
12
Marek Vasut00671d92017-10-09 21:51:10 +020013#include "mx6_common.h"
14
15/*
16 * SPI NOR layout:
17 * 0x00_0000-0x00_ffff ... U-Boot SPL
18 * 0x01_0000-0x0f_ffff ... U-Boot
19 * 0x10_0000-0x10_ffff ... U-Boot env #1
20 * 0x11_0000-0x11_ffff ... U-Boot env #2
21 * 0x12_0000-0x1f_ffff ... UNUSED
22 */
23
24/* SPL */
25#include "imx6_spl.h" /* common IMX6 SPL configuration */
Marek Vasut00671d92017-10-09 21:51:10 +020026#define CONFIG_SPL_TARGET "u-boot-with-spl.imx"
27
28/* Miscellaneous configurable options */
Marek Vasut00671d92017-10-09 21:51:10 +020029
30#define CONFIG_CMDLINE_TAG
31#define CONFIG_SETUP_MEMORY_TAGS
32#define CONFIG_INITRD_TAG
33#define CONFIG_REVISION_TAG
34
Marek Vasut00671d92017-10-09 21:51:10 +020035/* Size of malloc() pool */
36#define CONFIG_SYS_MALLOC_LEN (4 * SZ_1M)
37
38/* Bootcounter */
Marek Vasut00671d92017-10-09 21:51:10 +020039#define CONFIG_SYS_BOOTCOUNT_BE
40
41/* FEC ethernet */
Marek Vasut00671d92017-10-09 21:51:10 +020042#define IMX_FEC_BASE ENET_BASE_ADDR
43#define CONFIG_FEC_XCV_TYPE RMII
44#define CONFIG_ETHPRIME "FEC"
45#define CONFIG_FEC_MXC_PHYADDR 0
46#define CONFIG_ARP_TIMEOUT 200UL
47
Marek Vasut00671d92017-10-09 21:51:10 +020048/* MMC Configs */
Marek Vasut00671d92017-10-09 21:51:10 +020049#define CONFIG_SYS_FSL_ESDHC_ADDR 0
50#define CONFIG_SYS_FSL_USDHC_NUM 3
Marek Vasut00671d92017-10-09 21:51:10 +020051
52/* SATA Configs */
Marek Vasut00671d92017-10-09 21:51:10 +020053#define CONFIG_LBA48
Marek Vasut00671d92017-10-09 21:51:10 +020054
55/* SPI Flash Configs */
Marek Vasut29a4cae2019-05-17 16:58:54 +020056#if defined(CONFIG_SPL_BUILD)
57#undef CONFIG_DM_SPI
58#undef CONFIG_DM_SPI_FLASH
Marek Vasut29a4cae2019-05-17 16:58:54 +020059#endif
Marek Vasut00671d92017-10-09 21:51:10 +020060
61/* UART */
Marek Vasut00671d92017-10-09 21:51:10 +020062#define CONFIG_MXC_UART_BASE UART1_BASE
Marek Vasut00671d92017-10-09 21:51:10 +020063
64/* USB Configs */
65#ifdef CONFIG_CMD_USB
66#define CONFIG_EHCI_HCD_INIT_AFTER_RESET
67#define CONFIG_USB_HOST_ETHER
68#define CONFIG_USB_ETHER_ASIX
69#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
70#define CONFIG_MXC_USB_FLAGS 0
71#define CONFIG_USB_MAX_CONTROLLER_COUNT 2 /* Enabled USB controller number */
Marek Vasut861b6892017-10-22 10:22:40 +020072
73/* USB Gadget (DFU, UMS) */
74#if defined(CONFIG_CMD_DFU) || defined(CONFIG_CMD_USB_MASS_STORAGE)
Marek Vasut861b6892017-10-22 10:22:40 +020075#define CONFIG_SYS_DFU_DATA_BUF_SIZE (16 * 1024 * 1024)
76#define DFU_DEFAULT_POLL_TIMEOUT 300
77
78/* USB IDs */
79#define CONFIG_G_DNL_UMS_VENDOR_NUM 0x0525
80#define CONFIG_G_DNL_UMS_PRODUCT_NUM 0xA4A5
81#endif
Marek Vasut00671d92017-10-09 21:51:10 +020082#endif
83
84/* Watchdog */
Claudius Heine8f7fe482019-11-29 08:59:03 +010085#if defined(CONFIG_SPL_BUILD)
86#undef CONFIG_WDT
87#undef CONFIG_WATCHDOG
88#define CONFIG_HW_WATCHDOG
89#endif
Marek Vasut00671d92017-10-09 21:51:10 +020090
Marek Vasut00671d92017-10-09 21:51:10 +020091#define CONFIG_LOADADDR 0x12000000
92#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
93
94#ifndef CONFIG_SPL_BUILD
95#define CONFIG_EXTRA_ENV_SETTINGS \
96 "console=ttymxc0,115200\0" \
97 "fdt_addr=0x18000000\0" \
98 "fdt_high=0xffffffff\0" \
99 "initrd_high=0xffffffff\0" \
100 "kernel_addr_r=0x10008000\0" \
101 "fdt_addr_r=0x13000000\0" \
102 "ramdisk_addr_r=0x18000000\0" \
103 "scriptaddr=0x14000000\0" \
104 "fdtfile=imx6q-dhcom-pdk2.dtb\0"\
105 BOOTENV
106
107#define CONFIG_BOOTCOMMAND "run distro_bootcmd"
108
109#define BOOT_TARGET_DEVICES(func) \
110 func(MMC, mmc, 0) \
111 func(MMC, mmc, 2) \
112 func(USB, usb, 1) \
113 func(SATA, sata, 0) \
114 func(DHCP, dhcp, na)
115
116#include <config_distro_bootcmd.h>
117#endif
118
119/* Physical Memory Map */
Marek Vasut00671d92017-10-09 21:51:10 +0200120#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
121
122#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
123#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
124#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
125
126#define CONFIG_SYS_INIT_SP_OFFSET \
127 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
128
129#define CONFIG_SYS_INIT_SP_ADDR \
130 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
131
Marek Vasut00671d92017-10-09 21:51:10 +0200132/* Environment */
Marek Vasut00671d92017-10-09 21:51:10 +0200133
134#endif /* __DH_IMX6_CONFIG_H */