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Tom Rini10e47792018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
Jean-Jacques Hiblotd7cb71b2017-04-24 11:51:31 +02002/*
3 * DWC SATA platform driver
4 *
5 * (C) Copyright 2016
6 * Texas Instruments Incorporated, <www.ti.com>
7 *
8 * Author: Mugunthan V N <mugunthanvnm@ti.com>
Jean-Jacques Hiblotd7cb71b2017-04-24 11:51:31 +02009 */
10
11#include <common.h>
12#include <dm.h>
13#include <ahci.h>
14#include <scsi.h>
15#include <sata.h>
Jonas Karlman4006cb02023-07-22 14:02:12 +000016#ifdef CONFIG_ARCH_OMAP2PLUS
Jean-Jacques Hiblotd7cb71b2017-04-24 11:51:31 +020017#include <asm/arch/sata.h>
Jonas Karlman4006cb02023-07-22 14:02:12 +000018#endif
Jean-Jacques Hiblotd7cb71b2017-04-24 11:51:31 +020019#include <asm/io.h>
20#include <generic-phy.h>
Simon Glassbdd5f812023-09-14 18:21:46 -060021#include <linux/printk.h>
Jean-Jacques Hiblotd7cb71b2017-04-24 11:51:31 +020022
Jean-Jacques Hiblotd7cb71b2017-04-24 11:51:31 +020023struct dwc_ahci_priv {
24 void *base;
25 void *wrapper_base;
26};
27
Jean-Jacques Hiblotd05ef522018-04-06 11:13:53 +020028static int dwc_ahci_bind(struct udevice *dev)
29{
30 struct udevice *scsi_dev;
31
32 return ahci_bind_scsi(dev, &scsi_dev);
33}
34
Simon Glassaad29ae2020-12-03 16:55:21 -070035static int dwc_ahci_of_to_plat(struct udevice *dev)
Jean-Jacques Hiblotd7cb71b2017-04-24 11:51:31 +020036{
37 struct dwc_ahci_priv *priv = dev_get_priv(dev);
Jean-Jacques Hiblotd7cb71b2017-04-24 11:51:31 +020038 fdt_addr_t addr;
39
Masahiro Yamadaa89b4de2020-07-17 14:36:48 +090040 priv->base = map_physmem(dev_read_addr(dev), sizeof(void *),
Jean-Jacques Hiblotd7cb71b2017-04-24 11:51:31 +020041 MAP_NOCACHE);
42
Simon Glassba1dea42017-05-17 17:18:05 -060043 addr = devfdt_get_addr_index(dev, 1);
Jean-Jacques Hiblotd7cb71b2017-04-24 11:51:31 +020044 if (addr != FDT_ADDR_T_NONE) {
45 priv->wrapper_base = map_physmem(addr, sizeof(void *),
46 MAP_NOCACHE);
47 } else {
48 priv->wrapper_base = NULL;
49 }
50
51 return 0;
52}
53
54static int dwc_ahci_probe(struct udevice *dev)
55{
56 struct dwc_ahci_priv *priv = dev_get_priv(dev);
57 int ret;
58 struct phy phy;
59
60 ret = generic_phy_get_by_name(dev, "sata-phy", &phy);
61 if (ret) {
Masahiro Yamada81e10422017-09-16 14:10:41 +090062 pr_err("can't get the phy from DT\n");
Jean-Jacques Hiblotd7cb71b2017-04-24 11:51:31 +020063 return ret;
64 }
65
66 ret = generic_phy_init(&phy);
67 if (ret) {
Patrick Delaunay0cc23242020-07-03 17:36:44 +020068 pr_debug("unable to initialize the sata phy\n");
Jean-Jacques Hiblotd7cb71b2017-04-24 11:51:31 +020069 return ret;
70 }
71
72 ret = generic_phy_power_on(&phy);
73 if (ret) {
Patrick Delaunay0cc23242020-07-03 17:36:44 +020074 pr_debug("unable to power on the sata phy\n");
Jean-Jacques Hiblotd7cb71b2017-04-24 11:51:31 +020075 return ret;
76 }
77
Jonas Karlman4006cb02023-07-22 14:02:12 +000078#ifdef CONFIG_ARCH_OMAP2PLUS
Jean-Jacques Hiblotd7cb71b2017-04-24 11:51:31 +020079 if (priv->wrapper_base) {
80 u32 val = TI_SATA_IDLE_NO | TI_SATA_STANDBY_NO;
81
82 /* Enable SATA module, No Idle, No Standby */
83 writel(val, priv->wrapper_base + TI_SATA_SYSCONFIG);
84 }
Jonas Karlman4006cb02023-07-22 14:02:12 +000085#endif
Jean-Jacques Hiblotd7cb71b2017-04-24 11:51:31 +020086
Jean-Jacques Hiblotd05ef522018-04-06 11:13:53 +020087 return ahci_probe_scsi(dev, (ulong)priv->base);
Jean-Jacques Hiblotd7cb71b2017-04-24 11:51:31 +020088}
89
90static const struct udevice_id dwc_ahci_ids[] = {
91 { .compatible = "snps,dwc-ahci" },
92 { }
93};
94
95U_BOOT_DRIVER(dwc_ahci) = {
96 .name = "dwc_ahci",
Jean-Jacques Hiblotd05ef522018-04-06 11:13:53 +020097 .id = UCLASS_AHCI,
Jean-Jacques Hiblotd7cb71b2017-04-24 11:51:31 +020098 .of_match = dwc_ahci_ids,
Jean-Jacques Hiblotd05ef522018-04-06 11:13:53 +020099 .bind = dwc_ahci_bind,
Simon Glassaad29ae2020-12-03 16:55:21 -0700100 .of_to_plat = dwc_ahci_of_to_plat,
Simon Glassc4dfa892017-06-14 21:28:43 -0600101 .ops = &scsi_ops,
Jean-Jacques Hiblotd7cb71b2017-04-24 11:51:31 +0200102 .probe = dwc_ahci_probe,
Simon Glass8a2b47f2020-12-03 16:55:17 -0700103 .priv_auto = sizeof(struct dwc_ahci_priv),
Jean-Jacques Hiblotd7cb71b2017-04-24 11:51:31 +0200104};