blob: 8fdaacd5e04c05a65e857403b1351410d94b62e5 [file] [log] [blame]
Tom Rini10e47792018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
Dipen Dudhat00c42942011-01-20 16:29:35 +05302/*
3 * Copyright 2010-2011 Freescale Semiconductor, Inc.
4 * Author: Dipen Dudhat <dipen.dudhat@freescale.com>
Dipen Dudhat00c42942011-01-20 16:29:35 +05305 */
6
7#include <common.h>
York Sun37562f62013-10-22 12:39:02 -07008#include <fsl_ifc.h>
Simon Glass655306c2020-05-10 11:39:58 -06009#include <part.h>
Dipen Dudhat00c42942011-01-20 16:29:35 +053010
Rajesh Bhagat76e1d472018-12-27 04:37:51 +000011#ifdef CONFIG_TFABOOT
Pankit Garg92d443b2018-11-05 18:01:33 +000012struct ifc_regs ifc_cfg_default_boot[CONFIG_SYS_FSL_IFC_BANK_COUNT] = {
13 {
14 "cs0",
Dipen Dudhat00c42942011-01-20 16:29:35 +053015#if defined(CONFIG_SYS_CSPR0) && defined(CONFIG_SYS_CSOR0)
Pankit Garg92d443b2018-11-05 18:01:33 +000016 CONFIG_SYS_CSPR0,
Kumar Gala7bc4f622012-08-17 08:20:25 +000017#ifdef CONFIG_SYS_CSPR0_EXT
Pankit Garg92d443b2018-11-05 18:01:33 +000018 CONFIG_SYS_CSPR0_EXT,
19#else
20 0,
Kumar Gala7bc4f622012-08-17 08:20:25 +000021#endif
Pankit Garg92d443b2018-11-05 18:01:33 +000022#ifdef CONFIG_SYS_AMASK0
23 CONFIG_SYS_AMASK0,
24#else
25 0,
26#endif
27 CONFIG_SYS_CSOR0,
28 {
29 CONFIG_SYS_CS0_FTIM0,
30 CONFIG_SYS_CS0_FTIM1,
31 CONFIG_SYS_CS0_FTIM2,
32 CONFIG_SYS_CS0_FTIM3,
33 },
Prabhakar Kushwahaa3aaf1d2013-10-04 10:05:36 +053034#ifdef CONFIG_SYS_CSOR0_EXT
Pankit Garg92d443b2018-11-05 18:01:33 +000035 CONFIG_SYS_CSOR0_EXT,
36#else
37 0,
38#endif
39#ifdef CONFIG_SYS_CSPR0_FINAL
40 CONFIG_SYS_CSPR0_FINAL,
41#else
42 0,
Prabhakar Kushwahaa3aaf1d2013-10-04 10:05:36 +053043#endif
Pankit Garg92d443b2018-11-05 18:01:33 +000044#ifdef CONFIG_SYS_AMASK0_FINAL
45 CONFIG_SYS_AMASK0_FINAL,
46#else
47 0,
Dipen Dudhat00c42942011-01-20 16:29:35 +053048#endif
Poonam Aggrwal46b86ca2011-07-07 20:36:47 +053049#endif
Pankit Garg92d443b2018-11-05 18:01:33 +000050 },
Dipen Dudhat00c42942011-01-20 16:29:35 +053051
Pankit Garg92d443b2018-11-05 18:01:33 +000052#if CONFIG_SYS_FSL_IFC_BANK_COUNT >= 2
53 {
54 "cs1",
55#if defined(CONFIG_SYS_CSPR1) && defined(CONFIG_SYS_CSOR1)
56 CONFIG_SYS_CSPR1,
Kumar Gala7bc4f622012-08-17 08:20:25 +000057#ifdef CONFIG_SYS_CSPR1_EXT
Pankit Garg92d443b2018-11-05 18:01:33 +000058 CONFIG_SYS_CSPR1_EXT,
59#else
60 0,
Kumar Gala7bc4f622012-08-17 08:20:25 +000061#endif
Pankit Garg92d443b2018-11-05 18:01:33 +000062#ifdef CONFIG_SYS_AMASK1
63 CONFIG_SYS_AMASK1,
64#else
65 0,
66#endif
67 CONFIG_SYS_CSOR1,
68 {
69 CONFIG_SYS_CS1_FTIM0,
70 CONFIG_SYS_CS1_FTIM1,
71 CONFIG_SYS_CS1_FTIM2,
72 CONFIG_SYS_CS1_FTIM3,
73 },
Prabhakar Kushwahaa3aaf1d2013-10-04 10:05:36 +053074#ifdef CONFIG_SYS_CSOR1_EXT
Pankit Garg92d443b2018-11-05 18:01:33 +000075 CONFIG_SYS_CSOR1_EXT,
76#else
77 0,
Prabhakar Kushwahaa3aaf1d2013-10-04 10:05:36 +053078#endif
Pankit Garg92d443b2018-11-05 18:01:33 +000079#ifdef CONFIG_SYS_CSPR1_FINAL
80 CONFIG_SYS_CSPR1_FINAL,
81#else
82 0,
83#endif
84#ifdef CONFIG_SYS_AMASK1_FINAL
85 CONFIG_SYS_AMASK1_FINAL,
86#else
87 0,
88#endif
89#endif
90 },
Dipen Dudhat00c42942011-01-20 16:29:35 +053091#endif
92
Pankit Garg92d443b2018-11-05 18:01:33 +000093#if CONFIG_SYS_FSL_IFC_BANK_COUNT >= 3
94 {
95 "cs2",
96#if defined(CONFIG_SYS_CSPR2) && defined(CONFIG_SYS_CSOR2)
97 CONFIG_SYS_CSPR2,
Kumar Gala7bc4f622012-08-17 08:20:25 +000098#ifdef CONFIG_SYS_CSPR2_EXT
Pankit Garg92d443b2018-11-05 18:01:33 +000099 CONFIG_SYS_CSPR2_EXT,
100#else
101 0,
Kumar Gala7bc4f622012-08-17 08:20:25 +0000102#endif
Pankit Garg92d443b2018-11-05 18:01:33 +0000103#ifdef CONFIG_SYS_AMASK2
104 CONFIG_SYS_AMASK2,
105#else
106 0,
107#endif
108 CONFIG_SYS_CSOR2,
109 {
110 CONFIG_SYS_CS2_FTIM0,
111 CONFIG_SYS_CS2_FTIM1,
112 CONFIG_SYS_CS2_FTIM2,
113 CONFIG_SYS_CS2_FTIM3,
114 },
Prabhakar Kushwahaa3aaf1d2013-10-04 10:05:36 +0530115#ifdef CONFIG_SYS_CSOR2_EXT
Pankit Garg92d443b2018-11-05 18:01:33 +0000116 CONFIG_SYS_CSOR2_EXT,
117#else
118 0,
Prabhakar Kushwahaa3aaf1d2013-10-04 10:05:36 +0530119#endif
Pankit Garg92d443b2018-11-05 18:01:33 +0000120#ifdef CONFIG_SYS_CSPR2_FINAL
121 CONFIG_SYS_CSPR2_FINAL,
122#else
123 0,
124#endif
125#ifdef CONFIG_SYS_AMASK2_FINAL
126 CONFIG_SYS_AMASK2_FINAL,
127#else
128 0,
129#endif
130#endif
131 },
Dipen Dudhat00c42942011-01-20 16:29:35 +0530132#endif
133
Pankit Garg92d443b2018-11-05 18:01:33 +0000134#if CONFIG_SYS_FSL_IFC_BANK_COUNT >= 4
135 {
136 "cs3",
137#if defined(CONFIG_SYS_CSPR3) && defined(CONFIG_SYS_CSOR3)
138 CONFIG_SYS_CSPR3,
Kumar Gala7bc4f622012-08-17 08:20:25 +0000139#ifdef CONFIG_SYS_CSPR3_EXT
Pankit Garg92d443b2018-11-05 18:01:33 +0000140 CONFIG_SYS_CSPR3_EXT,
141#else
142 0,
143#endif
144#ifdef CONFIG_SYS_AMASK3
145 CONFIG_SYS_AMASK3,
146#else
147 0,
Kumar Gala7bc4f622012-08-17 08:20:25 +0000148#endif
Pankit Garg92d443b2018-11-05 18:01:33 +0000149 CONFIG_SYS_CSOR3,
150 {
151 CONFIG_SYS_CS3_FTIM0,
152 CONFIG_SYS_CS3_FTIM1,
153 CONFIG_SYS_CS3_FTIM2,
154 CONFIG_SYS_CS3_FTIM3,
155 },
Prabhakar Kushwahaa3aaf1d2013-10-04 10:05:36 +0530156#ifdef CONFIG_SYS_CSOR3_EXT
Pankit Garg92d443b2018-11-05 18:01:33 +0000157 CONFIG_SYS_CSOR3_EXT,
158#else
159 0,
Prabhakar Kushwahaa3aaf1d2013-10-04 10:05:36 +0530160#endif
Pankit Garg92d443b2018-11-05 18:01:33 +0000161#ifdef CONFIG_SYS_CSPR3_FINAL
162 CONFIG_SYS_CSPR3_FINAL,
163#else
164 0,
165#endif
166#ifdef CONFIG_SYS_AMASK3_FINAL
167 CONFIG_SYS_AMASK3_FINAL,
168#else
169 0,
170#endif
171#endif
172 },
Dipen Dudhat00c42942011-01-20 16:29:35 +0530173#endif
Mingkai Hu6f024c92013-05-16 10:18:13 +0800174
Pankit Garg92d443b2018-11-05 18:01:33 +0000175#if CONFIG_SYS_FSL_IFC_BANK_COUNT >= 5
176 {
177 "cs4",
178#if defined(CONFIG_SYS_CSPR4) && defined(CONFIG_SYS_CSOR4)
179 CONFIG_SYS_CSPR4,
Mingkai Hu6f024c92013-05-16 10:18:13 +0800180#ifdef CONFIG_SYS_CSPR4_EXT
Pankit Garg92d443b2018-11-05 18:01:33 +0000181 CONFIG_SYS_CSPR4_EXT,
182#else
183 0,
Mingkai Hu6f024c92013-05-16 10:18:13 +0800184#endif
Pankit Garg92d443b2018-11-05 18:01:33 +0000185#ifdef CONFIG_SYS_AMASK4
186 CONFIG_SYS_AMASK4,
187#else
188 0,
189#endif
190 CONFIG_SYS_CSOR4,
191 {
192 CONFIG_SYS_CS4_FTIM0,
193 CONFIG_SYS_CS4_FTIM1,
194 CONFIG_SYS_CS4_FTIM2,
195 CONFIG_SYS_CS4_FTIM3,
196 },
Prabhakar Kushwahaa3aaf1d2013-10-04 10:05:36 +0530197#ifdef CONFIG_SYS_CSOR4_EXT
Pankit Garg92d443b2018-11-05 18:01:33 +0000198 CONFIG_SYS_CSOR4_EXT,
199#else
200 0,
Prabhakar Kushwahaa3aaf1d2013-10-04 10:05:36 +0530201#endif
Pankit Garg92d443b2018-11-05 18:01:33 +0000202#ifdef CONFIG_SYS_CSPR4_FINAL
203 CONFIG_SYS_CSPR4_FINAL,
204#else
205 0,
206#endif
207#ifdef CONFIG_SYS_AMASK4_FINAL
208 CONFIG_SYS_AMASK4_FINAL,
209#else
210 0,
211#endif
212#endif
213 },
Mingkai Hu6f024c92013-05-16 10:18:13 +0800214#endif
215
Pankit Garg92d443b2018-11-05 18:01:33 +0000216#if CONFIG_SYS_FSL_IFC_BANK_COUNT >= 6
217 {
218 "cs5",
219#if defined(CONFIG_SYS_CSPR5) && defined(CONFIG_SYS_CSOR5)
220 CONFIG_SYS_CSPR5,
Mingkai Hu6f024c92013-05-16 10:18:13 +0800221#ifdef CONFIG_SYS_CSPR5_EXT
Pankit Garg92d443b2018-11-05 18:01:33 +0000222 CONFIG_SYS_CSPR5_EXT,
223#else
224 0,
Mingkai Hu6f024c92013-05-16 10:18:13 +0800225#endif
Pankit Garg92d443b2018-11-05 18:01:33 +0000226#ifdef CONFIG_SYS_AMASK5
227 CONFIG_SYS_AMASK5,
228#else
229 0,
230#endif
231 CONFIG_SYS_CSOR5,
232 {
233 CONFIG_SYS_CS5_FTIM0,
234 CONFIG_SYS_CS5_FTIM1,
235 CONFIG_SYS_CS5_FTIM2,
236 CONFIG_SYS_CS5_FTIM3,
237 },
Prabhakar Kushwahaa3aaf1d2013-10-04 10:05:36 +0530238#ifdef CONFIG_SYS_CSOR5_EXT
Pankit Garg92d443b2018-11-05 18:01:33 +0000239 CONFIG_SYS_CSOR5_EXT,
240#else
241 0,
Prabhakar Kushwahaa3aaf1d2013-10-04 10:05:36 +0530242#endif
Pankit Garg92d443b2018-11-05 18:01:33 +0000243#ifdef CONFIG_SYS_CSPR5_FINAL
244 CONFIG_SYS_CSPR5_FINAL,
245#else
246 0,
247#endif
248#ifdef CONFIG_SYS_AMASK5_FINAL
249 CONFIG_SYS_AMASK5_FINAL,
250#else
251 0,
252#endif
253#endif
254 },
Mingkai Hu6f024c92013-05-16 10:18:13 +0800255#endif
256
Pankit Garg92d443b2018-11-05 18:01:33 +0000257#if CONFIG_SYS_FSL_IFC_BANK_COUNT >= 7
258 {
259 "cs6",
260#if defined(CONFIG_SYS_CSPR6) && defined(CONFIG_SYS_CSOR6)
261 CONFIG_SYS_CSPR6,
Mingkai Hu6f024c92013-05-16 10:18:13 +0800262#ifdef CONFIG_SYS_CSPR6_EXT
Pankit Garg92d443b2018-11-05 18:01:33 +0000263 CONFIG_SYS_CSPR6_EXT,
264#else
265 0,
266#endif
267#ifdef CONFIG_SYS_AMASK6
268 CONFIG_SYS_AMASK6,
269#else
270 0,
Mingkai Hu6f024c92013-05-16 10:18:13 +0800271#endif
Pankit Garg92d443b2018-11-05 18:01:33 +0000272 CONFIG_SYS_CSOR6,
273 {
274 CONFIG_SYS_CS6_FTIM0,
275 CONFIG_SYS_CS6_FTIM1,
276 CONFIG_SYS_CS6_FTIM2,
277 CONFIG_SYS_CS6_FTIM3,
278 },
Prabhakar Kushwahaa3aaf1d2013-10-04 10:05:36 +0530279#ifdef CONFIG_SYS_CSOR6_EXT
Pankit Garg92d443b2018-11-05 18:01:33 +0000280 CONFIG_SYS_CSOR6_EXT,
281#else
282 0,
Prabhakar Kushwahaa3aaf1d2013-10-04 10:05:36 +0530283#endif
Pankit Garg92d443b2018-11-05 18:01:33 +0000284#ifdef CONFIG_SYS_CSPR6_FINAL
285 CONFIG_SYS_CSPR6_FINAL,
286#else
287 0,
Mingkai Hu6f024c92013-05-16 10:18:13 +0800288#endif
Pankit Garg92d443b2018-11-05 18:01:33 +0000289#ifdef CONFIG_SYS_AMASK6_FINAL
290 CONFIG_SYS_AMASK6_FINAL,
291#else
292 0,
Mingkai Hu6f024c92013-05-16 10:18:13 +0800293#endif
Prabhakar Kushwahaa3aaf1d2013-10-04 10:05:36 +0530294#endif
Pankit Garg92d443b2018-11-05 18:01:33 +0000295 },
Mingkai Hu6f024c92013-05-16 10:18:13 +0800296#endif
York Sund377b612014-03-19 13:52:34 -0700297
Pankit Garg92d443b2018-11-05 18:01:33 +0000298#if CONFIG_SYS_FSL_IFC_BANK_COUNT >= 8
299 {
300 "cs7",
301#if defined(CONFIG_SYS_CSPR7) && defined(CONFIG_SYS_CSOR7)
302 CONFIG_SYS_CSPR7,
303#ifdef CONFIG_SYS_CSPR7_EXT
304 CONFIG_SYS_CSPR7_EXT,
305#else
306 0,
York Sund377b612014-03-19 13:52:34 -0700307#endif
Pankit Garg92d443b2018-11-05 18:01:33 +0000308#ifdef CONFIG_SYS_AMASK7
309 CONFIG_SYS_AMASK7,
310#else
311 0,
Scott Wood8e728cd2015-03-24 13:25:02 -0700312#endif
Pankit Garg92d443b2018-11-05 18:01:33 +0000313 CONFIG_SYS_CSOR7,
314#ifdef CONFIG_SYS_CSOR7_EXT
315 CONFIG_SYS_CSOR7_EXT,
316#else
317 0,
Prabhakar Kushwaha1c56fb22015-03-19 09:20:48 -0700318#endif
Pankit Garg92d443b2018-11-05 18:01:33 +0000319 {
320 CONFIG_SYS_CS7_FTIM0,
321 CONFIG_SYS_CS7_FTIM1,
322 CONFIG_SYS_CS7_FTIM2,
323 CONFIG_SYS_CS7_FTIM3,
324 },
325#ifdef CONFIG_SYS_CSPR7_FINAL
326 CONFIG_SYS_CSPR7_FINAL,
327#else
328 0,
Scott Wood8e728cd2015-03-24 13:25:02 -0700329#endif
Pankit Garg92d443b2018-11-05 18:01:33 +0000330#ifdef CONFIG_SYS_AMASK7_FINAL
331 CONFIG_SYS_AMASK7_FINAL,
332#else
333 0,
Scott Wood8e728cd2015-03-24 13:25:02 -0700334#endif
Prabhakar Kushwaha1c56fb22015-03-19 09:20:48 -0700335#endif
Pankit Garg92d443b2018-11-05 18:01:33 +0000336 },
Scott Wood8e728cd2015-03-24 13:25:02 -0700337#endif
Pankit Garg92d443b2018-11-05 18:01:33 +0000338};
339
340__weak void ifc_cfg_boot_info(struct ifc_regs_info *regs_info)
341{
342 regs_info->regs = ifc_cfg_default_boot;
343 regs_info->cs_size = CONFIG_SYS_FSL_IFC_BANK_COUNT;
344}
Rajesh Bhagat76e1d472018-12-27 04:37:51 +0000345#endif
Pankit Garg92d443b2018-11-05 18:01:33 +0000346
347void print_ifc_regs(void)
348{
349 int i, j;
350
351 printf("IFC Controller Registers\n");
352 for (i = 0; i < CONFIG_SYS_FSL_IFC_BANK_COUNT; i++) {
353 printf("CSPR%d:0x%08X\tAMASK%d:0x%08X\tCSOR%d:0x%08X\n",
354 i, get_ifc_cspr(i), i, get_ifc_amask(i),
355 i, get_ifc_csor(i));
356 for (j = 0; j < 4; j++)
357 printf("IFC_FTIM%d:0x%08X\n", j, get_ifc_ftim(i, j));
358 }
359}
360
Rajesh Bhagat76e1d472018-12-27 04:37:51 +0000361#ifdef CONFIG_TFABOOT
Pankit Garg92d443b2018-11-05 18:01:33 +0000362void init_early_memctl_regs(void)
363{
364 int i, j;
365 struct ifc_regs *regs;
366 struct ifc_regs_info regs_info = {0};
367
368 ifc_cfg_boot_info(&regs_info);
369 regs = regs_info.regs;
370
371 for (i = 0 ; i < regs_info.cs_size; i++) {
372 if (regs[i].pr && (regs[i].pr & CSPR_V)) {
373 /* skip setting cspr/csor_ext in below condition */
374 if (!(CONFIG_IS_ENABLED(A003399_NOR_WORKAROUND) &&
375 i == 0 &&
376 ((regs[0].pr & CSPR_MSEL) == CSPR_MSEL_NOR))) {
377 if (regs[i].pr_ext)
378 set_ifc_cspr_ext(i, regs[i].pr_ext);
379 if (regs[i].or_ext)
380 set_ifc_csor_ext(i, regs[i].or_ext);
381 }
382
383 for (j = 0; j < ARRAY_SIZE(regs->ftim); j++)
384 set_ifc_ftim(i, j, regs[i].ftim[j]);
385
386 set_ifc_csor(i, regs[i].or);
387 set_ifc_amask(i, regs[i].amask);
388 set_ifc_cspr(i, regs[i].pr);
389 }
390 }
391}
392
393void init_final_memctl_regs(void)
394{
395 int i;
396 struct ifc_regs *regs;
397 struct ifc_regs_info regs_info;
398
399 ifc_cfg_boot_info(&regs_info);
400 regs = regs_info.regs;
401
402 for (i = 0 ; i < regs_info.cs_size && i < ARRAY_SIZE(regs->ftim); i++) {
403 if (!(regs[i].pr_final & CSPR_V))
404 continue;
405 if (regs[i].pr_final)
406 set_ifc_cspr(i, regs[i].pr_final);
407 if (regs[i].amask_final)
408 set_ifc_amask(i, (i == 1) ? regs[i].amask_final :
409 regs[i].amask);
410 }
York Sund377b612014-03-19 13:52:34 -0700411}
Rajesh Bhagat76e1d472018-12-27 04:37:51 +0000412#else
413void init_early_memctl_regs(void)
414{
415#if defined(CONFIG_SYS_CSPR0) && defined(CONFIG_SYS_CSOR0)
416 set_ifc_ftim(IFC_CS0, IFC_FTIM0, CONFIG_SYS_CS0_FTIM0);
417 set_ifc_ftim(IFC_CS0, IFC_FTIM1, CONFIG_SYS_CS0_FTIM1);
418 set_ifc_ftim(IFC_CS0, IFC_FTIM2, CONFIG_SYS_CS0_FTIM2);
419 set_ifc_ftim(IFC_CS0, IFC_FTIM3, CONFIG_SYS_CS0_FTIM3);
420
421#ifndef CONFIG_A003399_NOR_WORKAROUND
422#ifdef CONFIG_SYS_CSPR0_EXT
423 set_ifc_cspr_ext(IFC_CS0, CONFIG_SYS_CSPR0_EXT);
424#endif
425#ifdef CONFIG_SYS_CSOR0_EXT
426 set_ifc_csor_ext(IFC_CS0, CONFIG_SYS_CSOR0_EXT);
427#endif
428 set_ifc_cspr(IFC_CS0, CONFIG_SYS_CSPR0);
429 set_ifc_amask(IFC_CS0, CONFIG_SYS_AMASK0);
430 set_ifc_csor(IFC_CS0, CONFIG_SYS_CSOR0);
431#endif
432#endif
433
434#ifdef CONFIG_SYS_CSPR1_EXT
435 set_ifc_cspr_ext(IFC_CS1, CONFIG_SYS_CSPR1_EXT);
436#endif
437#ifdef CONFIG_SYS_CSOR1_EXT
438 set_ifc_csor_ext(IFC_CS1, CONFIG_SYS_CSOR1_EXT);
439#endif
440#if defined(CONFIG_SYS_CSPR1) && defined(CONFIG_SYS_CSOR1)
441 set_ifc_ftim(IFC_CS1, IFC_FTIM0, CONFIG_SYS_CS1_FTIM0);
442 set_ifc_ftim(IFC_CS1, IFC_FTIM1, CONFIG_SYS_CS1_FTIM1);
443 set_ifc_ftim(IFC_CS1, IFC_FTIM2, CONFIG_SYS_CS1_FTIM2);
444 set_ifc_ftim(IFC_CS1, IFC_FTIM3, CONFIG_SYS_CS1_FTIM3);
445
446 set_ifc_csor(IFC_CS1, CONFIG_SYS_CSOR1);
447 set_ifc_amask(IFC_CS1, CONFIG_SYS_AMASK1);
448 set_ifc_cspr(IFC_CS1, CONFIG_SYS_CSPR1);
449#endif
450
451#ifdef CONFIG_SYS_CSPR2_EXT
452 set_ifc_cspr_ext(IFC_CS2, CONFIG_SYS_CSPR2_EXT);
453#endif
454#ifdef CONFIG_SYS_CSOR2_EXT
455 set_ifc_csor_ext(IFC_CS2, CONFIG_SYS_CSOR2_EXT);
456#endif
457#if defined(CONFIG_SYS_CSPR2) && defined(CONFIG_SYS_CSOR2)
458 set_ifc_ftim(IFC_CS2, IFC_FTIM0, CONFIG_SYS_CS2_FTIM0);
459 set_ifc_ftim(IFC_CS2, IFC_FTIM1, CONFIG_SYS_CS2_FTIM1);
460 set_ifc_ftim(IFC_CS2, IFC_FTIM2, CONFIG_SYS_CS2_FTIM2);
461 set_ifc_ftim(IFC_CS2, IFC_FTIM3, CONFIG_SYS_CS2_FTIM3);
462
463 set_ifc_csor(IFC_CS2, CONFIG_SYS_CSOR2);
464 set_ifc_amask(IFC_CS2, CONFIG_SYS_AMASK2);
465 set_ifc_cspr(IFC_CS2, CONFIG_SYS_CSPR2);
466#endif
467
468#ifdef CONFIG_SYS_CSPR3_EXT
469 set_ifc_cspr_ext(IFC_CS3, CONFIG_SYS_CSPR3_EXT);
470#endif
471#ifdef CONFIG_SYS_CSOR3_EXT
472 set_ifc_csor_ext(IFC_CS3, CONFIG_SYS_CSOR3_EXT);
473#endif
474#if defined(CONFIG_SYS_CSPR3) && defined(CONFIG_SYS_CSOR3)
475 set_ifc_ftim(IFC_CS3, IFC_FTIM0, CONFIG_SYS_CS3_FTIM0);
476 set_ifc_ftim(IFC_CS3, IFC_FTIM1, CONFIG_SYS_CS3_FTIM1);
477 set_ifc_ftim(IFC_CS3, IFC_FTIM2, CONFIG_SYS_CS3_FTIM2);
478 set_ifc_ftim(IFC_CS3, IFC_FTIM3, CONFIG_SYS_CS3_FTIM3);
479
480 set_ifc_cspr(IFC_CS3, CONFIG_SYS_CSPR3);
481 set_ifc_amask(IFC_CS3, CONFIG_SYS_AMASK3);
482 set_ifc_csor(IFC_CS3, CONFIG_SYS_CSOR3);
483#endif
484
485#ifdef CONFIG_SYS_CSPR4_EXT
486 set_ifc_cspr_ext(IFC_CS4, CONFIG_SYS_CSPR4_EXT);
487#endif
488#ifdef CONFIG_SYS_CSOR4_EXT
489 set_ifc_csor_ext(IFC_CS4, CONFIG_SYS_CSOR4_EXT);
490#endif
491#if defined(CONFIG_SYS_CSPR4) && defined(CONFIG_SYS_CSOR4)
492 set_ifc_ftim(IFC_CS4, IFC_FTIM0, CONFIG_SYS_CS4_FTIM0);
493 set_ifc_ftim(IFC_CS4, IFC_FTIM1, CONFIG_SYS_CS4_FTIM1);
494 set_ifc_ftim(IFC_CS4, IFC_FTIM2, CONFIG_SYS_CS4_FTIM2);
495 set_ifc_ftim(IFC_CS4, IFC_FTIM3, CONFIG_SYS_CS4_FTIM3);
496
497 set_ifc_cspr(IFC_CS4, CONFIG_SYS_CSPR4);
498 set_ifc_amask(IFC_CS4, CONFIG_SYS_AMASK4);
499 set_ifc_csor(IFC_CS4, CONFIG_SYS_CSOR4);
500#endif
501
502#ifdef CONFIG_SYS_CSPR5_EXT
503 set_ifc_cspr_ext(IFC_CS5, CONFIG_SYS_CSPR5_EXT);
504#endif
505#ifdef CONFIG_SYS_CSOR5_EXT
506 set_ifc_csor_ext(IFC_CS5, CONFIG_SYS_CSOR5_EXT);
507#endif
508#if defined(CONFIG_SYS_CSPR5) && defined(CONFIG_SYS_CSOR5)
509 set_ifc_ftim(IFC_CS5, IFC_FTIM0, CONFIG_SYS_CS5_FTIM0);
510 set_ifc_ftim(IFC_CS5, IFC_FTIM1, CONFIG_SYS_CS5_FTIM1);
511 set_ifc_ftim(IFC_CS5, IFC_FTIM2, CONFIG_SYS_CS5_FTIM2);
512 set_ifc_ftim(IFC_CS5, IFC_FTIM3, CONFIG_SYS_CS5_FTIM3);
513
514 set_ifc_cspr(IFC_CS5, CONFIG_SYS_CSPR5);
515 set_ifc_amask(IFC_CS5, CONFIG_SYS_AMASK5);
516 set_ifc_csor(IFC_CS5, CONFIG_SYS_CSOR5);
517#endif
518
519#ifdef CONFIG_SYS_CSPR6_EXT
520 set_ifc_cspr_ext(IFC_CS6, CONFIG_SYS_CSPR6_EXT);
521#endif
522#ifdef CONFIG_SYS_CSOR6_EXT
523 set_ifc_csor_ext(IFC_CS6, CONFIG_SYS_CSOR6_EXT);
524#endif
525#if defined(CONFIG_SYS_CSPR6) && defined(CONFIG_SYS_CSOR6)
526 set_ifc_ftim(IFC_CS6, IFC_FTIM0, CONFIG_SYS_CS6_FTIM0);
527 set_ifc_ftim(IFC_CS6, IFC_FTIM1, CONFIG_SYS_CS6_FTIM1);
528 set_ifc_ftim(IFC_CS6, IFC_FTIM2, CONFIG_SYS_CS6_FTIM2);
529 set_ifc_ftim(IFC_CS6, IFC_FTIM3, CONFIG_SYS_CS6_FTIM3);
530
531 set_ifc_cspr(IFC_CS6, CONFIG_SYS_CSPR6);
532 set_ifc_amask(IFC_CS6, CONFIG_SYS_AMASK6);
533 set_ifc_csor(IFC_CS6, CONFIG_SYS_CSOR6);
534#endif
535
536#ifdef CONFIG_SYS_CSPR7_EXT
537 set_ifc_cspr_ext(IFC_CS7, CONFIG_SYS_CSPR7_EXT);
538#endif
539#ifdef CONFIG_SYS_CSOR7_EXT
540 set_ifc_csor_ext(IFC_CS7, CONFIG_SYS_CSOR7_EXT);
541#endif
542#if defined(CONFIG_SYS_CSPR7) && defined(CONFIG_SYS_CSOR7)
543 set_ifc_ftim(IFC_CS7, IFC_FTIM0, CONFIG_SYS_CS7_FTIM0);
544 set_ifc_ftim(IFC_CS7, IFC_FTIM1, CONFIG_SYS_CS7_FTIM1);
545 set_ifc_ftim(IFC_CS7, IFC_FTIM2, CONFIG_SYS_CS7_FTIM2);
546 set_ifc_ftim(IFC_CS7, IFC_FTIM3, CONFIG_SYS_CS7_FTIM3);
547
548 set_ifc_cspr(IFC_CS7, CONFIG_SYS_CSPR7);
549 set_ifc_amask(IFC_CS7, CONFIG_SYS_AMASK7);
550 set_ifc_csor(IFC_CS7, CONFIG_SYS_CSOR7);
551#endif
552}
553
554void init_final_memctl_regs(void)
555{
556#ifdef CONFIG_SYS_CSPR0_FINAL
557 set_ifc_cspr(IFC_CS0, CONFIG_SYS_CSPR0_FINAL);
558#endif
559#ifdef CONFIG_SYS_AMASK0_FINAL
560 set_ifc_amask(IFC_CS0, CONFIG_SYS_AMASK0);
561#endif
562#ifdef CONFIG_SYS_CSPR1_FINAL
563 set_ifc_cspr(IFC_CS1, CONFIG_SYS_CSPR1_FINAL);
564#endif
565#ifdef CONFIG_SYS_AMASK1_FINAL
566 set_ifc_amask(IFC_CS1, CONFIG_SYS_AMASK1_FINAL);
567#endif
568#ifdef CONFIG_SYS_CSPR2_FINAL
569 set_ifc_cspr(IFC_CS2, CONFIG_SYS_CSPR2_FINAL);
570#endif
571#ifdef CONFIG_SYS_AMASK2_FINAL
572 set_ifc_amask(IFC_CS2, CONFIG_SYS_AMASK2);
573#endif
574#ifdef CONFIG_SYS_CSPR3_FINAL
575 set_ifc_cspr(IFC_CS3, CONFIG_SYS_CSPR3_FINAL);
576#endif
577#ifdef CONFIG_SYS_AMASK3_FINAL
578 set_ifc_amask(IFC_CS3, CONFIG_SYS_AMASK3);
579#endif
580}
581#endif