blob: 5765c5532a4d59cb2958bce95ecc888efdae3b0a [file] [log] [blame]
Wolfgang Denke1ebacb2005-09-25 15:59:01 +02001/*
2 * (C) Copyright 2002
3 * Kyle Harris, Nexus Technologies, Inc. kharris@nexus-tech.net
4 *
5 * (C) Copyright 2002
6 * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
7 * Marius Groeger <mgroeger@sysgo.de>
8 *
9 * (C) Copyright 2004
10 * BEC Systems <http://bec-systems.com>
11 * Cliff Brake <cliff.brake@gmail.com>
12 * Support for Accelent/Vibren PXA255 IDP
13 *
14 * See file CREDITS for list of people who contributed to this
15 * project.
16 *
17 * This program is free software; you can redistribute it and/or
18 * modify it under the terms of the GNU General Public License as
19 * published by the Free Software Foundation; either version 2 of
20 * the License, or (at your option) any later version.
21 *
22 * This program is distributed in the hope that it will be useful,
23 * but WITHOUT ANY WARRANTY; without even the implied warranty of
24 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
25 * GNU General Public License for more details.
26 *
27 * You should have received a copy of the GNU General Public License
28 * along with this program; if not, write to the Free Software
29 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
30 * MA 02111-1307 USA
31 */
32
33#include <common.h>
34#include <command.h>
35
Wolfgang Denk6405a152006-03-31 18:32:53 +020036DECLARE_GLOBAL_DATA_PTR;
Wolfgang Denke1ebacb2005-09-25 15:59:01 +020037
38/*
39 * Miscelaneous platform dependent initialisations
40 */
41
42int board_init (void)
43{
Wolfgang Denke1ebacb2005-09-25 15:59:01 +020044 /* memory and cpu-speed are setup before relocation */
45 /* so we do _nothing_ here */
46
47 /* arch number of Lubbock-Board */
48 gd->bd->bi_arch_number = MACH_TYPE_PXA_IDP;
49
50 /* adress of boot parameters */
51 gd->bd->bi_boot_params = 0xa0000100;
52
53 /* turn on serial ports */
54 *(volatile unsigned int *)(PXA_CS5_PHYS + 0x03C0002c) = 0x13;
55
56 /* set PWM for LCD */
57 /* a value that works is 60Hz, 77% duty cycle */
58 CKEN |= CKEN0_PWM0;
59 PWM_CTRL0 = 0x3f;
60 PWM_PERVAL0 = 0x3ff;
61 PWM_PWDUTY0 = 792;
62
63 /* clear reset to AC97 codec */
64 CKEN |= CKEN2_AC97;
65 GCR = GCR_COLD_RST;
66
67 /* enable LCD backlight */
68 /* *(volatile unsigned int *)(PXA_CS5_PHYS + 0x03C00030) = 0x7; */
69
70 /* test display */
71 /* lcd_puts("This is a test\nTest #2\n"); */
72
73 return 0;
74}
75
76int board_late_init(void)
77{
78 setenv("stdout", "serial");
79 setenv("stderr", "serial");
80 return 0;
81}
82
83
84int dram_init (void)
85{
Wolfgang Denke1ebacb2005-09-25 15:59:01 +020086 gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
87 gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
88 gd->bd->bi_dram[1].start = PHYS_SDRAM_2;
89 gd->bd->bi_dram[1].size = PHYS_SDRAM_2_SIZE;
90 gd->bd->bi_dram[2].start = PHYS_SDRAM_3;
91 gd->bd->bi_dram[2].size = PHYS_SDRAM_3_SIZE;
92 gd->bd->bi_dram[3].start = PHYS_SDRAM_4;
93 gd->bd->bi_dram[3].size = PHYS_SDRAM_4_SIZE;
94
95 return 0;
96}
97
98
99#ifdef DEBUG_BLINKC_ENABLE
100
101void delay_c(void)
102{
103 /* reset OSCR to 0 */
104 OSCR = 0;
105 while(OSCR > 0x10000)
106 ;
107
108 while(OSCR < 0xd4000)
109 ;
110}
111
112void blink_c(void)
113{
114 int led_bit = (1<<10);
115
116 GPDR0 = led_bit;
117 GPCR0 = led_bit;
118 delay_c();
119 GPSR0 = led_bit;
120 delay_c();
121 GPCR0 = led_bit;
122}
123
124int do_idpcmd(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
125{
126 printf("IDPCMD started\n");
127 return 0;
128}
129
130U_BOOT_CMD(idpcmd, CFG_MAXARGS, 0, do_idpcmd,
131 "idpcmd - custom IDP command\n",
132 "no args at this time\n"
133);
134
135#endif