Peng Fan | e85e26a | 2020-12-27 14:18:13 +0800 | [diff] [blame] | 1 | // SPDX-License-Identifier: (GPL-2.0+ OR MIT) |
| 2 | /* |
| 3 | * Copyright 2020 NXP |
| 4 | */ |
| 5 | |
| 6 | /dts-v1/; |
| 7 | |
| 8 | #include <dt-bindings/usb/pd.h> |
| 9 | #include "imx8mm.dtsi" |
| 10 | |
| 11 | / { |
| 12 | chosen { |
| 13 | stdout-path = &uart2; |
| 14 | }; |
| 15 | |
| 16 | memory@40000000 { |
| 17 | device_type = "memory"; |
| 18 | reg = <0x0 0x40000000 0 0x80000000>; |
| 19 | }; |
| 20 | |
| 21 | leds { |
| 22 | compatible = "gpio-leds"; |
| 23 | pinctrl-names = "default"; |
| 24 | pinctrl-0 = <&pinctrl_gpio_led>; |
| 25 | |
| 26 | status { |
| 27 | label = "status"; |
| 28 | gpios = <&gpio3 16 GPIO_ACTIVE_HIGH>; |
| 29 | default-state = "on"; |
| 30 | }; |
| 31 | }; |
| 32 | |
| 33 | reg_usdhc2_vmmc: regulator-usdhc2 { |
| 34 | compatible = "regulator-fixed"; |
| 35 | pinctrl-names = "default"; |
| 36 | pinctrl-0 = <&pinctrl_reg_usdhc2_vmmc>; |
| 37 | regulator-name = "VSD_3V3"; |
| 38 | regulator-min-microvolt = <3300000>; |
| 39 | regulator-max-microvolt = <3300000>; |
| 40 | gpio = <&gpio2 19 GPIO_ACTIVE_HIGH>; |
| 41 | enable-active-high; |
| 42 | }; |
| 43 | |
| 44 | ir-receiver { |
| 45 | compatible = "gpio-ir-receiver"; |
| 46 | gpios = <&gpio1 13 GPIO_ACTIVE_LOW>; |
| 47 | pinctrl-names = "default"; |
| 48 | pinctrl-0 = <&pinctrl_ir>; |
| 49 | linux,autosuspend-period = <125>; |
| 50 | }; |
| 51 | |
| 52 | wm8524: audio-codec { |
| 53 | #sound-dai-cells = <0>; |
| 54 | compatible = "wlf,wm8524"; |
| 55 | pinctrl-names = "default"; |
| 56 | pinctrl-0 = <&pinctrl_gpio_wlf>; |
| 57 | wlf,mute-gpios = <&gpio5 21 GPIO_ACTIVE_LOW>; |
| 58 | }; |
| 59 | |
| 60 | sound-wm8524 { |
| 61 | compatible = "simple-audio-card"; |
| 62 | simple-audio-card,name = "wm8524-audio"; |
| 63 | simple-audio-card,format = "i2s"; |
| 64 | simple-audio-card,frame-master = <&cpudai>; |
| 65 | simple-audio-card,bitclock-master = <&cpudai>; |
| 66 | simple-audio-card,widgets = |
| 67 | "Line", "Left Line Out Jack", |
| 68 | "Line", "Right Line Out Jack"; |
| 69 | simple-audio-card,routing = |
| 70 | "Left Line Out Jack", "LINEVOUTL", |
| 71 | "Right Line Out Jack", "LINEVOUTR"; |
| 72 | |
| 73 | cpudai: simple-audio-card,cpu { |
| 74 | sound-dai = <&sai3>; |
| 75 | dai-tdm-slot-num = <2>; |
| 76 | dai-tdm-slot-width = <32>; |
| 77 | }; |
| 78 | |
| 79 | simple-audio-card,codec { |
| 80 | sound-dai = <&wm8524>; |
| 81 | clocks = <&clk IMX8MM_CLK_SAI3_ROOT>; |
| 82 | }; |
| 83 | }; |
| 84 | }; |
| 85 | |
| 86 | &A53_0 { |
| 87 | cpu-supply = <&buck2_reg>; |
| 88 | }; |
| 89 | |
| 90 | &A53_1 { |
| 91 | cpu-supply = <&buck2_reg>; |
| 92 | }; |
| 93 | |
| 94 | &A53_2 { |
| 95 | cpu-supply = <&buck2_reg>; |
| 96 | }; |
| 97 | |
| 98 | &A53_3 { |
| 99 | cpu-supply = <&buck2_reg>; |
| 100 | }; |
| 101 | |
| 102 | &fec1 { |
| 103 | pinctrl-names = "default"; |
| 104 | pinctrl-0 = <&pinctrl_fec1>; |
| 105 | phy-mode = "rgmii-id"; |
| 106 | phy-handle = <ðphy0>; |
| 107 | fsl,magic-packet; |
| 108 | status = "okay"; |
| 109 | |
| 110 | mdio { |
| 111 | #address-cells = <1>; |
| 112 | #size-cells = <0>; |
| 113 | |
| 114 | ethphy0: ethernet-phy@0 { |
| 115 | compatible = "ethernet-phy-ieee802.3-c22"; |
| 116 | reg = <0>; |
| 117 | reset-gpios = <&gpio4 22 GPIO_ACTIVE_LOW>; |
| 118 | reset-assert-us = <10000>; |
| 119 | }; |
| 120 | }; |
| 121 | }; |
| 122 | |
| 123 | &i2c1 { |
| 124 | clock-frequency = <400000>; |
| 125 | pinctrl-names = "default"; |
| 126 | pinctrl-0 = <&pinctrl_i2c1>; |
| 127 | status = "okay"; |
| 128 | |
Ye Li | 79e6970 | 2021-03-19 15:56:55 +0800 | [diff] [blame] | 129 | pmic: pca9450@25 { |
| 130 | reg = <0x25>; |
| 131 | compatible = "nxp,pca9450a"; |
| 132 | /* PMIC PCA9450 PMIC_nINT GPIO1_IO3 */ |
Peng Fan | e85e26a | 2020-12-27 14:18:13 +0800 | [diff] [blame] | 133 | pinctrl-0 = <&pinctrl_pmic>; |
Ye Li | 79e6970 | 2021-03-19 15:56:55 +0800 | [diff] [blame] | 134 | gpio_intr = <&gpio1 3 GPIO_ACTIVE_LOW>; |
Peng Fan | e85e26a | 2020-12-27 14:18:13 +0800 | [diff] [blame] | 135 | |
| 136 | regulators { |
Ye Li | 79e6970 | 2021-03-19 15:56:55 +0800 | [diff] [blame] | 137 | #address-cells = <1>; |
| 138 | #size-cells = <0>; |
| 139 | |
| 140 | pca9450,pmic-buck2-uses-i2c-dvs; |
| 141 | /* Run/Standby voltage */ |
| 142 | pca9450,pmic-buck2-dvs-voltage = <950000>, <850000>; |
| 143 | |
| 144 | buck1_reg: regulator@0 { |
| 145 | reg = <0>; |
| 146 | regulator-compatible = "buck1"; |
| 147 | regulator-min-microvolt = <600000>; |
| 148 | regulator-max-microvolt = <2187500>; |
Peng Fan | e85e26a | 2020-12-27 14:18:13 +0800 | [diff] [blame] | 149 | regulator-boot-on; |
| 150 | regulator-always-on; |
Ye Li | 79e6970 | 2021-03-19 15:56:55 +0800 | [diff] [blame] | 151 | regulator-ramp-delay = <3125>; |
Peng Fan | e85e26a | 2020-12-27 14:18:13 +0800 | [diff] [blame] | 152 | }; |
| 153 | |
Ye Li | 79e6970 | 2021-03-19 15:56:55 +0800 | [diff] [blame] | 154 | buck2_reg: regulator@1 { |
| 155 | reg = <1>; |
| 156 | regulator-compatible = "buck2"; |
| 157 | regulator-min-microvolt = <600000>; |
| 158 | regulator-max-microvolt = <2187500>; |
Peng Fan | e85e26a | 2020-12-27 14:18:13 +0800 | [diff] [blame] | 159 | regulator-boot-on; |
| 160 | regulator-always-on; |
Ye Li | 79e6970 | 2021-03-19 15:56:55 +0800 | [diff] [blame] | 161 | regulator-ramp-delay = <3125>; |
Peng Fan | e85e26a | 2020-12-27 14:18:13 +0800 | [diff] [blame] | 162 | }; |
| 163 | |
Ye Li | 79e6970 | 2021-03-19 15:56:55 +0800 | [diff] [blame] | 164 | buck3_reg: regulator@2 { |
| 165 | reg = <2>; |
| 166 | regulator-compatible = "buck3"; |
| 167 | regulator-min-microvolt = <600000>; |
| 168 | regulator-max-microvolt = <2187500>; |
Peng Fan | e85e26a | 2020-12-27 14:18:13 +0800 | [diff] [blame] | 169 | regulator-boot-on; |
| 170 | regulator-always-on; |
| 171 | }; |
| 172 | |
Ye Li | 79e6970 | 2021-03-19 15:56:55 +0800 | [diff] [blame] | 173 | buck4_reg: regulator@3 { |
| 174 | reg = <3>; |
| 175 | regulator-compatible = "buck4"; |
| 176 | regulator-min-microvolt = <600000>; |
| 177 | regulator-max-microvolt = <3400000>; |
Peng Fan | e85e26a | 2020-12-27 14:18:13 +0800 | [diff] [blame] | 178 | regulator-boot-on; |
| 179 | regulator-always-on; |
| 180 | }; |
| 181 | |
Ye Li | 79e6970 | 2021-03-19 15:56:55 +0800 | [diff] [blame] | 182 | buck5_reg: regulator@4 { |
| 183 | reg = <4>; |
| 184 | regulator-compatible = "buck5"; |
| 185 | regulator-min-microvolt = <600000>; |
| 186 | regulator-max-microvolt = <3400000>; |
Peng Fan | e85e26a | 2020-12-27 14:18:13 +0800 | [diff] [blame] | 187 | regulator-boot-on; |
| 188 | regulator-always-on; |
| 189 | }; |
| 190 | |
Ye Li | 79e6970 | 2021-03-19 15:56:55 +0800 | [diff] [blame] | 191 | buck6_reg: regulator@5 { |
| 192 | reg = <5>; |
| 193 | regulator-compatible = "buck6"; |
| 194 | regulator-min-microvolt = <600000>; |
| 195 | regulator-max-microvolt = <3400000>; |
Peng Fan | e85e26a | 2020-12-27 14:18:13 +0800 | [diff] [blame] | 196 | regulator-boot-on; |
| 197 | regulator-always-on; |
| 198 | }; |
| 199 | |
Ye Li | 79e6970 | 2021-03-19 15:56:55 +0800 | [diff] [blame] | 200 | ldo1_reg: regulator@6 { |
| 201 | reg = <6>; |
| 202 | regulator-compatible = "ldo1"; |
Peng Fan | e85e26a | 2020-12-27 14:18:13 +0800 | [diff] [blame] | 203 | regulator-min-microvolt = <1600000>; |
| 204 | regulator-max-microvolt = <3300000>; |
| 205 | regulator-boot-on; |
| 206 | regulator-always-on; |
| 207 | }; |
| 208 | |
Ye Li | 79e6970 | 2021-03-19 15:56:55 +0800 | [diff] [blame] | 209 | ldo2_reg: regulator@7 { |
| 210 | reg = <7>; |
| 211 | regulator-compatible = "ldo2"; |
Peng Fan | e85e26a | 2020-12-27 14:18:13 +0800 | [diff] [blame] | 212 | regulator-min-microvolt = <800000>; |
Ye Li | 79e6970 | 2021-03-19 15:56:55 +0800 | [diff] [blame] | 213 | regulator-max-microvolt = <1150000>; |
Peng Fan | e85e26a | 2020-12-27 14:18:13 +0800 | [diff] [blame] | 214 | regulator-boot-on; |
| 215 | regulator-always-on; |
| 216 | }; |
| 217 | |
Ye Li | 79e6970 | 2021-03-19 15:56:55 +0800 | [diff] [blame] | 218 | ldo3_reg: regulator@8 { |
| 219 | reg = <8>; |
| 220 | regulator-compatible = "ldo3"; |
| 221 | regulator-min-microvolt = <800000>; |
Peng Fan | e85e26a | 2020-12-27 14:18:13 +0800 | [diff] [blame] | 222 | regulator-max-microvolt = <3300000>; |
| 223 | regulator-boot-on; |
| 224 | regulator-always-on; |
| 225 | }; |
| 226 | |
Ye Li | 79e6970 | 2021-03-19 15:56:55 +0800 | [diff] [blame] | 227 | ldo4_reg: regulator@9 { |
| 228 | reg = <9>; |
| 229 | regulator-compatible = "ldo4"; |
| 230 | regulator-min-microvolt = <800000>; |
| 231 | regulator-max-microvolt = <3300000>; |
Peng Fan | e85e26a | 2020-12-27 14:18:13 +0800 | [diff] [blame] | 232 | regulator-boot-on; |
| 233 | regulator-always-on; |
| 234 | }; |
| 235 | |
Ye Li | 79e6970 | 2021-03-19 15:56:55 +0800 | [diff] [blame] | 236 | ldo5_reg: regulator@10 { |
| 237 | reg = <10>; |
| 238 | regulator-compatible = "ldo5"; |
| 239 | regulator-min-microvolt = <1800000>; |
| 240 | regulator-max-microvolt = <3300000>; |
Peng Fan | e85e26a | 2020-12-27 14:18:13 +0800 | [diff] [blame] | 241 | }; |
Ye Li | 79e6970 | 2021-03-19 15:56:55 +0800 | [diff] [blame] | 242 | |
Peng Fan | e85e26a | 2020-12-27 14:18:13 +0800 | [diff] [blame] | 243 | }; |
| 244 | }; |
| 245 | }; |
| 246 | |
| 247 | &i2c2 { |
| 248 | clock-frequency = <400000>; |
| 249 | pinctrl-names = "default"; |
| 250 | pinctrl-0 = <&pinctrl_i2c2>; |
| 251 | status = "okay"; |
| 252 | |
| 253 | ptn5110: tcpc@50 { |
| 254 | compatible = "nxp,ptn5110"; |
| 255 | pinctrl-names = "default"; |
| 256 | pinctrl-0 = <&pinctrl_typec1>; |
| 257 | reg = <0x50>; |
| 258 | interrupt-parent = <&gpio2>; |
| 259 | interrupts = <11 8>; |
| 260 | status = "okay"; |
| 261 | |
| 262 | port { |
| 263 | typec1_dr_sw: endpoint { |
| 264 | remote-endpoint = <&usb1_drd_sw>; |
| 265 | }; |
| 266 | }; |
| 267 | |
| 268 | typec1_con: connector { |
| 269 | compatible = "usb-c-connector"; |
| 270 | label = "USB-C"; |
| 271 | power-role = "dual"; |
| 272 | data-role = "dual"; |
| 273 | try-power-role = "sink"; |
| 274 | source-pdos = <PDO_FIXED(5000, 3000, PDO_FIXED_USB_COMM)>; |
| 275 | sink-pdos = <PDO_FIXED(5000, 3000, PDO_FIXED_USB_COMM) |
| 276 | PDO_VAR(5000, 20000, 3000)>; |
| 277 | op-sink-microwatt = <15000000>; |
| 278 | self-powered; |
| 279 | }; |
| 280 | }; |
| 281 | }; |
| 282 | |
| 283 | &i2c3 { |
| 284 | clock-frequency = <400000>; |
| 285 | pinctrl-names = "default"; |
| 286 | pinctrl-0 = <&pinctrl_i2c3>; |
| 287 | status = "okay"; |
| 288 | |
| 289 | pca6416: gpio@20 { |
| 290 | compatible = "ti,tca6416"; |
| 291 | reg = <0x20>; |
| 292 | gpio-controller; |
| 293 | #gpio-cells = <2>; |
| 294 | }; |
| 295 | }; |
| 296 | |
| 297 | &sai3 { |
| 298 | pinctrl-names = "default"; |
| 299 | pinctrl-0 = <&pinctrl_sai3>; |
| 300 | assigned-clocks = <&clk IMX8MM_CLK_SAI3>; |
| 301 | assigned-clock-parents = <&clk IMX8MM_AUDIO_PLL1_OUT>; |
| 302 | assigned-clock-rates = <24576000>; |
| 303 | status = "okay"; |
| 304 | }; |
| 305 | |
| 306 | &snvs_pwrkey { |
| 307 | status = "okay"; |
| 308 | }; |
| 309 | |
| 310 | &uart2 { /* console */ |
| 311 | pinctrl-names = "default"; |
| 312 | pinctrl-0 = <&pinctrl_uart2>; |
| 313 | status = "okay"; |
| 314 | }; |
| 315 | |
| 316 | &usbotg1 { |
| 317 | dr_mode = "otg"; |
| 318 | hnp-disable; |
| 319 | srp-disable; |
| 320 | adp-disable; |
| 321 | usb-role-switch; |
| 322 | samsung,picophy-pre-emp-curr-control = <3>; |
| 323 | samsung,picophy-dc-vol-level-adjust = <7>; |
| 324 | status = "okay"; |
| 325 | |
| 326 | port { |
| 327 | usb1_drd_sw: endpoint { |
| 328 | remote-endpoint = <&typec1_dr_sw>; |
| 329 | }; |
| 330 | }; |
| 331 | }; |
| 332 | |
| 333 | &usdhc2 { |
| 334 | assigned-clocks = <&clk IMX8MM_CLK_USDHC2>; |
| 335 | assigned-clock-rates = <200000000>; |
| 336 | pinctrl-names = "default", "state_100mhz", "state_200mhz"; |
| 337 | pinctrl-0 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>; |
| 338 | pinctrl-1 = <&pinctrl_usdhc2_100mhz>, <&pinctrl_usdhc2_gpio>; |
| 339 | pinctrl-2 = <&pinctrl_usdhc2_200mhz>, <&pinctrl_usdhc2_gpio>; |
| 340 | cd-gpios = <&gpio1 15 GPIO_ACTIVE_LOW>; |
| 341 | bus-width = <4>; |
| 342 | vmmc-supply = <®_usdhc2_vmmc>; |
| 343 | status = "okay"; |
| 344 | }; |
| 345 | |
| 346 | &wdog1 { |
| 347 | pinctrl-names = "default"; |
| 348 | pinctrl-0 = <&pinctrl_wdog>; |
| 349 | fsl,ext-reset-output; |
| 350 | status = "okay"; |
| 351 | }; |
| 352 | |
| 353 | &iomuxc { |
| 354 | pinctrl_fec1: fec1grp { |
| 355 | fsl,pins = < |
| 356 | MX8MM_IOMUXC_ENET_MDC_ENET1_MDC 0x3 |
| 357 | MX8MM_IOMUXC_ENET_MDIO_ENET1_MDIO 0x3 |
| 358 | MX8MM_IOMUXC_ENET_TD3_ENET1_RGMII_TD3 0x1f |
| 359 | MX8MM_IOMUXC_ENET_TD2_ENET1_RGMII_TD2 0x1f |
| 360 | MX8MM_IOMUXC_ENET_TD1_ENET1_RGMII_TD1 0x1f |
| 361 | MX8MM_IOMUXC_ENET_TD0_ENET1_RGMII_TD0 0x1f |
| 362 | MX8MM_IOMUXC_ENET_RD3_ENET1_RGMII_RD3 0x91 |
| 363 | MX8MM_IOMUXC_ENET_RD2_ENET1_RGMII_RD2 0x91 |
| 364 | MX8MM_IOMUXC_ENET_RD1_ENET1_RGMII_RD1 0x91 |
| 365 | MX8MM_IOMUXC_ENET_RD0_ENET1_RGMII_RD0 0x91 |
| 366 | MX8MM_IOMUXC_ENET_TXC_ENET1_RGMII_TXC 0x1f |
| 367 | MX8MM_IOMUXC_ENET_RXC_ENET1_RGMII_RXC 0x91 |
| 368 | MX8MM_IOMUXC_ENET_RX_CTL_ENET1_RGMII_RX_CTL 0x91 |
| 369 | MX8MM_IOMUXC_ENET_TX_CTL_ENET1_RGMII_TX_CTL 0x1f |
| 370 | MX8MM_IOMUXC_SAI2_RXC_GPIO4_IO22 0x19 |
| 371 | >; |
| 372 | }; |
| 373 | |
| 374 | pinctrl_gpio_led: gpioledgrp { |
| 375 | fsl,pins = < |
| 376 | MX8MM_IOMUXC_NAND_READY_B_GPIO3_IO16 0x19 |
| 377 | >; |
| 378 | }; |
| 379 | |
| 380 | pinctrl_ir: irgrp { |
| 381 | fsl,pins = < |
| 382 | MX8MM_IOMUXC_GPIO1_IO13_GPIO1_IO13 0x4f |
| 383 | >; |
| 384 | }; |
| 385 | |
| 386 | pinctrl_gpio_wlf: gpiowlfgrp { |
| 387 | fsl,pins = < |
| 388 | MX8MM_IOMUXC_I2C4_SDA_GPIO5_IO21 0xd6 |
| 389 | >; |
| 390 | }; |
| 391 | |
| 392 | pinctrl_i2c1: i2c1grp { |
| 393 | fsl,pins = < |
| 394 | MX8MM_IOMUXC_I2C1_SCL_I2C1_SCL 0x400001c3 |
| 395 | MX8MM_IOMUXC_I2C1_SDA_I2C1_SDA 0x400001c3 |
| 396 | >; |
| 397 | }; |
| 398 | |
| 399 | pinctrl_i2c2: i2c2grp { |
| 400 | fsl,pins = < |
| 401 | MX8MM_IOMUXC_I2C2_SCL_I2C2_SCL 0x400001c3 |
| 402 | MX8MM_IOMUXC_I2C2_SDA_I2C2_SDA 0x400001c3 |
| 403 | >; |
| 404 | }; |
| 405 | |
| 406 | pinctrl_i2c3: i2c3grp { |
| 407 | fsl,pins = < |
| 408 | MX8MM_IOMUXC_I2C3_SCL_I2C3_SCL 0x400001c3 |
| 409 | MX8MM_IOMUXC_I2C3_SDA_I2C3_SDA 0x400001c3 |
| 410 | >; |
| 411 | }; |
| 412 | |
| 413 | pinctrl_pmic: pmicirqgrp { |
| 414 | fsl,pins = < |
| 415 | MX8MM_IOMUXC_GPIO1_IO03_GPIO1_IO3 0x141 |
| 416 | >; |
| 417 | }; |
| 418 | |
| 419 | pinctrl_reg_usdhc2_vmmc: regusdhc2vmmcgrp { |
| 420 | fsl,pins = < |
| 421 | MX8MM_IOMUXC_SD2_RESET_B_GPIO2_IO19 0x41 |
| 422 | >; |
| 423 | }; |
| 424 | |
| 425 | pinctrl_sai3: sai3grp { |
| 426 | fsl,pins = < |
| 427 | MX8MM_IOMUXC_SAI3_TXFS_SAI3_TX_SYNC 0xd6 |
| 428 | MX8MM_IOMUXC_SAI3_TXC_SAI3_TX_BCLK 0xd6 |
| 429 | MX8MM_IOMUXC_SAI3_MCLK_SAI3_MCLK 0xd6 |
| 430 | MX8MM_IOMUXC_SAI3_TXD_SAI3_TX_DATA0 0xd6 |
| 431 | >; |
| 432 | }; |
| 433 | |
| 434 | pinctrl_typec1: typec1grp { |
| 435 | fsl,pins = < |
| 436 | MX8MM_IOMUXC_SD1_STROBE_GPIO2_IO11 0x159 |
| 437 | >; |
| 438 | }; |
| 439 | |
| 440 | pinctrl_uart2: uart2grp { |
| 441 | fsl,pins = < |
| 442 | MX8MM_IOMUXC_UART2_RXD_UART2_DCE_RX 0x140 |
| 443 | MX8MM_IOMUXC_UART2_TXD_UART2_DCE_TX 0x140 |
| 444 | >; |
| 445 | }; |
| 446 | |
| 447 | pinctrl_usdhc2_gpio: usdhc2grpgpiogrp { |
| 448 | fsl,pins = < |
| 449 | MX8MM_IOMUXC_GPIO1_IO15_GPIO1_IO15 0x1c4 |
| 450 | >; |
| 451 | }; |
| 452 | |
| 453 | pinctrl_usdhc2: usdhc2grp { |
| 454 | fsl,pins = < |
| 455 | MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK 0x190 |
| 456 | MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD 0x1d0 |
| 457 | MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0 0x1d0 |
| 458 | MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1 0x1d0 |
| 459 | MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x1d0 |
| 460 | MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x1d0 |
| 461 | MX8MM_IOMUXC_GPIO1_IO04_USDHC2_VSELECT 0x1d0 |
| 462 | >; |
| 463 | }; |
| 464 | |
| 465 | pinctrl_usdhc2_100mhz: usdhc2-100mhzgrp { |
| 466 | fsl,pins = < |
| 467 | MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK 0x194 |
| 468 | MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD 0x1d4 |
| 469 | MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0 0x1d4 |
| 470 | MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1 0x1d4 |
| 471 | MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x1d4 |
| 472 | MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x1d4 |
| 473 | MX8MM_IOMUXC_GPIO1_IO04_USDHC2_VSELECT 0x1d0 |
| 474 | >; |
| 475 | }; |
| 476 | |
| 477 | pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp { |
| 478 | fsl,pins = < |
| 479 | MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK 0x196 |
| 480 | MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD 0x1d6 |
| 481 | MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0 0x1d6 |
| 482 | MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1 0x1d6 |
| 483 | MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x1d6 |
| 484 | MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x1d6 |
| 485 | MX8MM_IOMUXC_GPIO1_IO04_USDHC2_VSELECT 0x1d0 |
| 486 | >; |
| 487 | }; |
| 488 | |
| 489 | pinctrl_wdog: wdoggrp { |
| 490 | fsl,pins = < |
| 491 | MX8MM_IOMUXC_GPIO1_IO02_WDOG1_WDOG_B 0x166 |
| 492 | >; |
| 493 | }; |
| 494 | }; |