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Patrick Delaunayc5c90692019-11-06 16:16:32 +01001// SPDX-License-Identifier: GPL-2.0+ OR X11
Michael Kurzbccef712017-01-22 16:04:23 +01002/*
Patrice Chotard24dffa52019-02-19 16:49:05 +01003 * Copyright 2017 - Vikas MANOCHA <vikas.manocha@st.com>
Michael Kurzbccef712017-01-22 16:04:23 +01004 *
Michael Kurzbccef712017-01-22 16:04:23 +01005 */
6
7/dts-v1/;
8#include "stm32f746.dtsi"
Patrice Chotard24dffa52019-02-19 16:49:05 +01009#include "stm32f746-pinctrl.dtsi"
Patrice Chotardda8f8ef2018-08-06 09:38:18 +020010#include <dt-bindings/gpio/gpio.h>
Dario Binacchi2d89c642023-09-03 22:48:45 +020011#include <dt-bindings/input/input.h>
12#include <dt-bindings/interrupt-controller/irq.h>
Michael Kurzbccef712017-01-22 16:04:23 +010013
14/ {
15 model = "STMicroelectronics STM32F746-DISCO board";
16 compatible = "st,stm32f746-disco", "st,stm32f746";
17
18 chosen {
Patrice Chotard24dffa52019-02-19 16:49:05 +010019 bootargs = "root=/dev/ram";
Michael Kurzbccef712017-01-22 16:04:23 +010020 stdout-path = "serial0:115200n8";
21 };
22
Patrice Chotard62f56162020-11-06 08:11:58 +010023 memory@c0000000 {
Patrick Delaunayc5c90692019-11-06 16:16:32 +010024 device_type = "memory";
Michael Kurzbccef712017-01-22 16:04:23 +010025 reg = <0xC0000000 0x800000>;
26 };
27
Dario Binacchi6aa2dca2023-09-03 22:48:49 +020028 reserved-memory {
29 #address-cells = <1>;
30 #size-cells = <1>;
31 ranges;
32
33 linux,cma {
34 compatible = "shared-dma-pool";
35 no-map;
36 size = <0x80000>;
37 linux,dma-default;
38 };
39 };
40
Michael Kurzbccef712017-01-22 16:04:23 +010041 aliases {
Vikas Manochada913d32017-02-12 10:25:47 -080042 serial0 = &usart1;
Michael Kurzbccef712017-01-22 16:04:23 +010043 };
Vikas Manocha9c7573e2017-04-10 15:03:00 -070044
Patrice Chotard24dffa52019-02-19 16:49:05 +010045 usbotg_hs_phy: usb-phy {
46 #phy-cells = <0>;
47 compatible = "usb-nop-xceiv";
48 clocks = <&rcc 0 STM32F7_AHB1_CLOCK(OTGHSULPI)>;
49 clock-names = "main_clk";
50 };
51
52 /* This turns on vbus for otg fs for host mode (dwc2) */
53 vcc5v_otg_fs: vcc5v-otg-fs-regulator {
54 compatible = "regulator-fixed";
55 gpio = <&gpiod 5 0>;
56 regulator-name = "vcc5_host1";
57 regulator-always-on;
58 };
59
Dario Binacchi5701e552023-09-03 22:48:48 +020060 vcc_3v3: vcc-3v3 {
Patrice Chotard24dffa52019-02-19 16:49:05 +010061 compatible = "regulator-fixed";
Dario Binacchi5701e552023-09-03 22:48:48 +020062 regulator-name = "vcc_3v3";
Patrice Chotard24dffa52019-02-19 16:49:05 +010063 regulator-min-microvolt = <3300000>;
64 regulator-max-microvolt = <3300000>;
65 };
Dario Binacchi6aa2dca2023-09-03 22:48:49 +020066
67 backlight: backlight {
68 compatible = "gpio-backlight";
69 gpios = <&gpiok 3 GPIO_ACTIVE_HIGH>;
70 status = "okay";
71 };
72
73 panel_rgb: panel-rgb {
74 compatible = "rocktech,rk043fn48h";
75 power-supply = <&vcc_3v3>;
76 backlight = <&backlight>;
77 enable-gpios = <&gpioi 12 GPIO_ACTIVE_HIGH>;
78 status = "okay";
79 port {
80 panel_in_rgb: endpoint {
81 remote-endpoint = <&ltdc_out_rgb>;
82 };
83 };
84 };
Michael Kurzbccef712017-01-22 16:04:23 +010085};
86
Vikas Manochada913d32017-02-12 10:25:47 -080087&clk_hse {
88 clock-frequency = <25000000>;
89};
90
Patrice Chotard24dffa52019-02-19 16:49:05 +010091&i2c1 {
92 pinctrl-0 = <&i2c1_pins_b>;
Vikas Manocha6ad568c2017-02-12 10:25:51 -080093 pinctrl-names = "default";
Patrice Chotard24dffa52019-02-19 16:49:05 +010094 i2c-scl-rising-time-ns = <185>;
95 i2c-scl-falling-time-ns = <20>;
Vikas Manocha6ad568c2017-02-12 10:25:51 -080096 status = "okay";
Dario Binacchi2d89c642023-09-03 22:48:45 +020097};
98
99&i2c3 {
100 pinctrl-0 = <&i2c3_pins_a>;
101 pinctrl-names = "default";
102 clock-frequency = <400000>;
103 status = "okay";
104
105 touchscreen@38 {
106 compatible = "edt,edt-ft5306";
107 reg = <0x38>;
108 interrupt-parent = <&gpioi>;
109 interrupts = <13 IRQ_TYPE_EDGE_FALLING>;
110 touchscreen-size-x = <480>;
111 touchscreen-size-y = <272>;
112 };
Vikas Manocha6ad568c2017-02-12 10:25:51 -0800113};
114
Dario Binacchi6aa2dca2023-09-03 22:48:49 +0200115&ltdc {
116 pinctrl-0 = <&ltdc_pins_a>;
117 pinctrl-names = "default";
118 status = "okay";
119
120 port {
121 ltdc_out_rgb: endpoint {
122 remote-endpoint = <&panel_in_rgb>;
123 };
124 };
125};
126
Patrice Chotard24dffa52019-02-19 16:49:05 +0100127&sdio1 {
Patrice Chotard0d24b0d2017-12-12 10:14:59 +0100128 status = "okay";
Dario Binacchi5701e552023-09-03 22:48:48 +0200129 vmmc-supply = <&vcc_3v3>;
Patrice Chotardda8f8ef2018-08-06 09:38:18 +0200130 cd-gpios = <&gpioc 13 GPIO_ACTIVE_LOW>;
Patrice Chotard0d24b0d2017-12-12 10:14:59 +0100131 pinctrl-names = "default", "opendrain";
Patrice Chotard24dffa52019-02-19 16:49:05 +0100132 pinctrl-0 = <&sdio_pins_a>;
133 pinctrl-1 = <&sdio_pins_od_a>;
Patrice Chotard0d24b0d2017-12-12 10:14:59 +0100134 bus-width = <4>;
Patrice Chotard24dffa52019-02-19 16:49:05 +0100135};
136
Patrice Chotard83975322022-09-23 13:20:33 +0200137&timers5 {
138 /* Override timer5 to act as clockevent */
139 compatible = "st,stm32-timer";
140 interrupts = <50>;
141 status = "okay";
142 /delete-property/#address-cells;
143 /delete-property/#size-cells;
144 /delete-property/clock-names;
145 /delete-node/pwm;
146 /delete-node/timer@4;
147};
148
Patrice Chotard24dffa52019-02-19 16:49:05 +0100149&usart1 {
150 pinctrl-0 = <&usart1_pins_b>;
151 pinctrl-names = "default";
152 status = "okay";
153};
154
155&usbotg_fs {
156 dr_mode = "host";
157 pinctrl-0 = <&usbotg_fs_pins_a>;
158 pinctrl-names = "default";
159 status = "okay";
160};
161
162&usbotg_hs {
163 dr_mode = "host";
164 phys = <&usbotg_hs_phy>;
165 phy-names = "usb2-phy";
166 pinctrl-0 = <&usbotg_hs_pins_b>;
167 pinctrl-names = "default";
168 status = "okay";
Patrice Chotard0d24b0d2017-12-12 10:14:59 +0100169};