Jason Liu | dec1112 | 2011-11-25 00:18:02 +0000 | [diff] [blame] | 1 | /* |
| 2 | * (C) Copyright 2009 |
| 3 | * Stefano Babic, DENX Software Engineering, sbabic@denx.de. |
| 4 | * |
Wolfgang Denk | d79de1d | 2013-07-08 09:37:19 +0200 | [diff] [blame] | 5 | * SPDX-License-Identifier: GPL-2.0+ |
Jason Liu | dec1112 | 2011-11-25 00:18:02 +0000 | [diff] [blame] | 6 | */ |
| 7 | |
| 8 | #ifndef __ASM_ARCH_CLOCK_H |
| 9 | #define __ASM_ARCH_CLOCK_H |
| 10 | |
Benoît Thébaudeau | afac165 | 2012-09-27 10:19:58 +0000 | [diff] [blame] | 11 | #include <common.h> |
| 12 | |
| 13 | #ifdef CONFIG_SYS_MX6_HCLK |
| 14 | #define MXC_HCLK CONFIG_SYS_MX6_HCLK |
| 15 | #else |
| 16 | #define MXC_HCLK 24000000 |
| 17 | #endif |
| 18 | |
| 19 | #ifdef CONFIG_SYS_MX6_CLK32 |
| 20 | #define MXC_CLK32 CONFIG_SYS_MX6_CLK32 |
| 21 | #else |
| 22 | #define MXC_CLK32 32768 |
| 23 | #endif |
| 24 | |
Jason Liu | dec1112 | 2011-11-25 00:18:02 +0000 | [diff] [blame] | 25 | enum mxc_clock { |
| 26 | MXC_ARM_CLK = 0, |
| 27 | MXC_PER_CLK, |
| 28 | MXC_AHB_CLK, |
| 29 | MXC_IPG_CLK, |
| 30 | MXC_IPG_PERCLK, |
| 31 | MXC_UART_CLK, |
| 32 | MXC_CSPI_CLK, |
| 33 | MXC_AXI_CLK, |
| 34 | MXC_EMI_SLOW_CLK, |
| 35 | MXC_DDR_CLK, |
| 36 | MXC_ESDHC_CLK, |
| 37 | MXC_ESDHC2_CLK, |
| 38 | MXC_ESDHC3_CLK, |
| 39 | MXC_ESDHC4_CLK, |
| 40 | MXC_SATA_CLK, |
| 41 | MXC_NFC_CLK, |
Matthias Weisser | 99ba342 | 2012-09-24 02:46:53 +0000 | [diff] [blame] | 42 | MXC_I2C_CLK, |
Jason Liu | dec1112 | 2011-11-25 00:18:02 +0000 | [diff] [blame] | 43 | }; |
| 44 | |
Akshay Bhat | 4e364e6 | 2016-04-12 18:13:56 -0400 | [diff] [blame] | 45 | enum ldb_di_clock { |
| 46 | MXC_PLL5_CLK = 0, |
| 47 | MXC_PLL2_PFD0_CLK, |
| 48 | MXC_PLL2_PFD2_CLK, |
| 49 | MXC_MMDC_CH1_CLK, |
| 50 | MXC_PLL3_SW_CLK, |
| 51 | }; |
| 52 | |
Fabio Estevam | b2903ae | 2014-01-03 15:55:57 -0200 | [diff] [blame] | 53 | enum enet_freq { |
Stefan Roese | d7e0731 | 2014-11-27 13:46:43 +0100 | [diff] [blame] | 54 | ENET_25MHZ, |
| 55 | ENET_50MHZ, |
| 56 | ENET_100MHZ, |
| 57 | ENET_125MHZ, |
Fabio Estevam | b2903ae | 2014-01-03 15:55:57 -0200 | [diff] [blame] | 58 | }; |
| 59 | |
Jason Liu | dec1112 | 2011-11-25 00:18:02 +0000 | [diff] [blame] | 60 | u32 imx_get_uartclk(void); |
| 61 | u32 imx_get_fecclk(void); |
| 62 | unsigned int mxc_get_clock(enum mxc_clock clk); |
Nikita Kiryanov | 98b76b4 | 2014-08-20 15:08:49 +0300 | [diff] [blame] | 63 | void setup_gpmi_io_clk(u32 cfg); |
Nitin Garg | b1ce701 | 2014-09-16 13:33:25 -0500 | [diff] [blame] | 64 | void hab_caam_clock_enable(unsigned char enable); |
Benoît Thébaudeau | 20db631 | 2013-04-23 10:17:44 +0000 | [diff] [blame] | 65 | void enable_ocotp_clk(unsigned char enable); |
Wolfgang Grandegger | 1859b70 | 2012-02-08 22:33:25 +0000 | [diff] [blame] | 66 | void enable_usboh3_clk(unsigned char enable); |
Nikita Kiryanov | 98b76b4 | 2014-08-20 15:08:49 +0300 | [diff] [blame] | 67 | void enable_uart_clk(unsigned char enable); |
Nikita Kiryanov | 98b76b4 | 2014-08-20 15:08:49 +0300 | [diff] [blame] | 68 | int enable_usdhc_clk(unsigned char enable, unsigned bus_num); |
Eric Nelson | fdba076 | 2012-03-27 09:52:21 +0000 | [diff] [blame] | 69 | int enable_sata_clock(void); |
Nikita Kiryanov | 63659b7 | 2014-11-21 12:47:22 +0200 | [diff] [blame] | 70 | void disable_sata_clock(void); |
Marek Vasut | 563dfb2 | 2013-12-14 06:27:26 +0100 | [diff] [blame] | 71 | int enable_pcie_clock(void); |
Troy Kisky | d4fdc99 | 2012-07-19 08:18:25 +0000 | [diff] [blame] | 72 | int enable_i2c_clk(unsigned char enable, unsigned i2c_num); |
Heiko Schocher | 472a68f | 2014-07-18 06:07:20 +0200 | [diff] [blame] | 73 | int enable_spi_clk(unsigned char enable, unsigned spi_num); |
Pardeep Kumar Singla | c1fa130 | 2013-07-25 12:12:13 -0500 | [diff] [blame] | 74 | void enable_ipu_clock(void); |
Peng Fan | 967a83b | 2015-08-12 17:46:50 +0800 | [diff] [blame] | 75 | int enable_fec_anatop_clock(int fec_id, enum enet_freq freq); |
Nikita Kiryanov | 98b76b4 | 2014-08-20 15:08:49 +0300 | [diff] [blame] | 76 | void enable_enet_clk(unsigned char enable); |
Peng Fan | 4bbd742 | 2016-12-11 19:24:28 +0800 | [diff] [blame] | 77 | int enable_lcdif_clock(u32 base_addr, bool enable); |
Peng Fan | 828e468 | 2014-12-31 11:01:38 +0800 | [diff] [blame] | 78 | void enable_qspi_clk(int qspi_num); |
Nitin Garg | 59f3be3 | 2014-11-20 21:14:12 +0800 | [diff] [blame] | 79 | void enable_thermal_clk(void); |
Peng Fan | 53ebda8 | 2015-10-29 15:54:47 +0800 | [diff] [blame] | 80 | void mxs_set_lcdclk(u32 base_addr, u32 freq); |
Akshay Bhat | 4e364e6 | 2016-04-12 18:13:56 -0400 | [diff] [blame] | 81 | void select_ldb_di_clock_source(enum ldb_di_clock clk); |
Lukasz Majewski | 529498e | 2016-11-28 07:18:14 +0100 | [diff] [blame] | 82 | void enable_eim_clk(unsigned char enable); |
Diego Dorta | bc043a8 | 2017-10-05 09:15:57 -0300 | [diff] [blame^] | 83 | int do_mx6_showclocks(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]); |
Jason Liu | dec1112 | 2011-11-25 00:18:02 +0000 | [diff] [blame] | 84 | #endif /* __ASM_ARCH_CLOCK_H */ |