| Chander Kashyap | 0d2f277 | 2013-08-21 10:38:56 +0530 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (C) 2013 Samsung Electronics |
| 3 | * |
| 4 | * SPDX-License-Identifier: GPL-2.0+ |
| 5 | * |
| 6 | * Configuration settings for the SAMSUNG Arndale board. |
| 7 | */ |
| 8 | |
| 9 | #ifndef __CONFIG_ARNDALE_H |
| 10 | #define __CONFIG_ARNDALE_H |
| 11 | |
| Ian Campbell | 3ecaa40 | 2014-11-09 10:44:32 +0000 | [diff] [blame] | 12 | #define EXYNOS_FDTFILE_SETTING \ |
| 13 | "fdtfile=exynos5250-arndale.dtb\0" |
| 14 | |
| Simon Glass | 50dfd2c | 2014-10-07 22:01:48 -0600 | [diff] [blame] | 15 | #include "exynos5250-common.h" |
| Simon Glass | 0b18b80 | 2015-08-03 08:19:29 -0600 | [diff] [blame] | 16 | #include <configs/exynos5-common.h> |
| Chander Kashyap | 0d2f277 | 2013-08-21 10:38:56 +0530 | [diff] [blame] | 17 | |
| 18 | /* SD/MMC configuration */ |
| Chander Kashyap | 0d2f277 | 2013-08-21 10:38:56 +0530 | [diff] [blame] | 19 | #define CONFIG_SUPPORT_EMMC_BOOT |
| Chander Kashyap | 0d2f277 | 2013-08-21 10:38:56 +0530 | [diff] [blame] | 20 | |
| 21 | /* allow to overwrite serial and ethaddr */ |
| 22 | #define CONFIG_ENV_OVERWRITE |
| 23 | |
| Chander Kashyap | 0d2f277 | 2013-08-21 10:38:56 +0530 | [diff] [blame] | 24 | /* MMC SPL */ |
| Rajeshwari Birje | 5b475ae | 2013-12-26 09:44:24 +0530 | [diff] [blame] | 25 | #define CONFIG_EXYNOS_SPL |
| Chander Kashyap | 0d2f277 | 2013-08-21 10:38:56 +0530 | [diff] [blame] | 26 | |
| 27 | /* Miscellaneous configurable options */ |
| Chander Kashyap | 0d2f277 | 2013-08-21 10:38:56 +0530 | [diff] [blame] | 28 | #define CONFIG_DEFAULT_CONSOLE "console=ttySAC2,115200n8\0" |
| Chander Kashyap | 0d2f277 | 2013-08-21 10:38:56 +0530 | [diff] [blame] | 29 | |
| Chander Kashyap | 0d2f277 | 2013-08-21 10:38:56 +0530 | [diff] [blame] | 30 | #define CONFIG_ENV_IS_IN_MMC |
| Chander Kashyap | 0d2f277 | 2013-08-21 10:38:56 +0530 | [diff] [blame] | 31 | #define CONFIG_ENV_OFFSET (CONFIG_BL2_OFFSET + CONFIG_BL2_SIZE) |
| 32 | |
| Chander Kashyap | 0d2f277 | 2013-08-21 10:38:56 +0530 | [diff] [blame] | 33 | #define CONFIG_IRAM_STACK 0x02050000 |
| 34 | |
| 35 | #define CONFIG_SYS_INIT_SP_ADDR CONFIG_IRAM_STACK |
| 36 | |
| Chander Kashyap | 0d2f277 | 2013-08-21 10:38:56 +0530 | [diff] [blame] | 37 | /* PMIC */ |
| Simon Glass | 0b18b80 | 2015-08-03 08:19:29 -0600 | [diff] [blame] | 38 | #define CONFIG_POWER |
| Chander Kashyap | 0d2f277 | 2013-08-21 10:38:56 +0530 | [diff] [blame] | 39 | #define CONFIG_PMIC |
| Simon Glass | 0222981 | 2014-05-20 06:01:34 -0600 | [diff] [blame] | 40 | #define CONFIG_POWER_I2C |
| Chander Kashyap | 0d2f277 | 2013-08-21 10:38:56 +0530 | [diff] [blame] | 41 | |
| Tushar Behera | bcf2363 | 2014-06-10 14:54:18 +0530 | [diff] [blame] | 42 | #define CONFIG_PREBOOT |
| 43 | |
| Andre Przywara | 64d4c22 | 2014-08-01 13:35:44 +0200 | [diff] [blame] | 44 | #define CONFIG_S5P_PA_SYSRAM 0x02020000 |
| 45 | #define CONFIG_SMP_PEN_ADDR CONFIG_S5P_PA_SYSRAM |
| 46 | |
| 47 | /* The PERIPHBASE in the CBAR register is wrong on the Arndale, so override it */ |
| 48 | #define CONFIG_ARM_GIC_BASE_ADDRESS 0x10480000 |
| 49 | |
| Ian Campbell | 363e424 | 2015-09-29 10:27:09 +0100 | [diff] [blame] | 50 | /* CPU Errata */ |
| 51 | #define CONFIG_ARM_ERRATA_773022 |
| 52 | #define CONFIG_ARM_ERRATA_774769 |
| 53 | |
| Simon Glass | 76fc3ad | 2015-08-03 08:19:28 -0600 | [diff] [blame] | 54 | /* Power */ |
| 55 | #define CONFIG_POWER |
| 56 | #define CONFIG_POWER_I2C |
| 57 | |
| Chander Kashyap | 0d2f277 | 2013-08-21 10:38:56 +0530 | [diff] [blame] | 58 | #endif /* __CONFIG_H */ |