| Siva Durga Prasad Paladugu | da92c97 | 2018-01-05 16:16:16 +0530 | [diff] [blame] | 1 | /* |
| 2 | * dts file for Xilinx ZynqMP Mini Configuration |
| 3 | * |
| 4 | * (C) Copyright 2018, Xilinx, Inc. |
| 5 | * |
| 6 | * Siva Durga Prasad <siva.durga.paladugu@xilinx.com> |
| 7 | * |
| 8 | * SPDX-License-Identifier: GPL-2.0+ |
| 9 | */ |
| 10 | |
| 11 | /dts-v1/; |
| 12 | |
| 13 | / { |
| 14 | model = "ZynqMP MINI EMMC"; |
| 15 | compatible = "xlnx,zynqmp"; |
| 16 | #address-cells = <2>; |
| 17 | #size-cells = <2>; |
| 18 | |
| 19 | aliases { |
| 20 | serial0 = &dcc; |
| 21 | mmc0 = &sdhci0; |
| 22 | mmc1 = &sdhci1; |
| 23 | }; |
| 24 | |
| 25 | chosen { |
| 26 | stdout-path = "serial0:115200n8"; |
| 27 | }; |
| 28 | |
| 29 | memory@0 { |
| 30 | device_type = "memory"; |
| 31 | reg = <0x0 0x0 0x0 0x20000000>; |
| 32 | }; |
| 33 | |
| 34 | dcc: dcc { |
| 35 | compatible = "arm,dcc"; |
| 36 | status = "disabled"; |
| 37 | u-boot,dm-pre-reloc; |
| 38 | }; |
| 39 | |
| 40 | amba: amba { |
| 41 | compatible = "simple-bus"; |
| 42 | #address-cells = <2>; |
| 43 | #size-cells = <2>; |
| 44 | ranges; |
| 45 | |
| 46 | sdhci0: sdhci@ff160000 { |
| 47 | u-boot,dm-pre-reloc; |
| 48 | compatible = "xlnx,zynqmp-8.9a", "arasan,sdhci-8.9a"; |
| 49 | status = "disabled"; |
| 50 | reg = <0x0 0xff160000 0x0 0x1000>; |
| 51 | clock-names = "clk_xin", "clk_ahb"; |
| 52 | xlnx,device_id = <0>; |
| 53 | }; |
| 54 | |
| 55 | sdhci1: sdhci@ff170000 { |
| 56 | u-boot,dm-pre-reloc; |
| 57 | compatible = "xlnx,zynqmp-8.9a", "arasan,sdhci-8.9a"; |
| 58 | status = "disabled"; |
| 59 | reg = <0x0 0xff170000 0x0 0x1000>; |
| 60 | clock-names = "clk_xin", "clk_ahb"; |
| 61 | xlnx,device_id = <1>; |
| 62 | }; |
| 63 | }; |
| 64 | }; |
| 65 | |
| 66 | &dcc { |
| 67 | status = "okay"; |
| 68 | }; |
| 69 | |
| 70 | &sdhci0 { |
| 71 | status = "okay"; |
| 72 | }; |
| 73 | |
| 74 | &sdhci1 { |
| 75 | status = "okay"; |
| 76 | }; |