blob: 9f5cdd571078b032a8e0737f4f46c8342378d803 [file] [log] [blame]
Ashish Kumarb25faa22017-08-31 16:12:53 +05301/*
2 * Copyright 2017 NXP
3 *
4 * SPDX-License-Identifier: GPL-2.0+
5 */
6
7#include <common.h>
8#include <asm/arch/fsl_serdes.h>
9
10struct serdes_config {
11 u8 ip_protocol;
12 u8 lanes[SRDS_MAX_LANES];
13 u8 rcw_lanes[SRDS_MAX_LANES];
14};
15
16static struct serdes_config serdes1_cfg_tbl[] = {
17 /* SerDes 1 */
18 {0x12, {SGMII3, SGMII7, SGMII1, SGMII2 }, {3, 3, 3, 3 } },
19 {0x15, {SGMII3, SGMII7, XFI1, XFI2 }, {3, 3, 1, 1 } },
20 {0x16, {SGMII3, SGMII7, SGMII1, XFI2 }, {3, 3, 3, 1 } },
21 {0x17, {SGMII3, SGMII7, SGMII1, SGMII2 }, {3, 3, 3, 2 } },
22 {0x18, {SGMII3, SGMII7, SGMII1, SGMII2 }, {3, 3, 2, 2 } },
23 {0x19, {SGMII3, QSGMII_B, XFI1, XFI2}, {3, 4, 1, 1 } },
24 {0x1A, {SGMII3, QSGMII_B, SGMII1, XFI2 }, {3, 4, 3, 1 } },
25 {0x1B, {SGMII3, QSGMII_B, SGMII1, SGMII2 }, {3, 4, 3, 2 } },
26 {0x1C, {SGMII3, QSGMII_B, SGMII1, SGMII2 }, {3, 4, 2, 2 } },
27 {0x1D, {QSGMII_A, QSGMII_B, XFI1, XFI2 }, {4, 4, 1, 1 } },
28 {0x1E, {QSGMII_A, QSGMII_B, SGMII1, XFI2 }, {4, 4, 3, 1 } },
29 {0x1F, {QSGMII_A, QSGMII_B, SGMII1, SGMII2 }, {4, 4, 3, 2 } },
30 {0x20, {QSGMII_A, QSGMII_B, SGMII1, SGMII2 }, {4, 4, 2, 2 } },
31 {0x35, {SGMII3, QSGMII_B, SGMII1, SGMII2 }, {3, 4, 3, 3 } },
32 {0x36, {QSGMII_A, QSGMII_B, SGMII1, SGMII2 }, {4, 4, 3, 3 } },
33 {0x3A, {SGMII3, PCIE1, SGMII1, SGMII2 }, {3, 5, 3, 3 } },
34 {}
35};
36static struct serdes_config serdes2_cfg_tbl[] = {
37 /* SerDes 2 */
38 {0x0C, {PCIE1, PCIE1, PCIE1, PCIE1 }, {8, 8, 8, 8 } },
39 {0x0D, {PCIE1, PCIE2, PCIE3, SATA1 }, {5, 5, 5, 9 } },
40 {0x0E, {PCIE1, PCIE1, PCIE2, SATA1 }, {7, 7, 6, 9 } },
41 {0x13, {PCIE1, PCIE1, PCIE3, PCIE3 }, {7, 7, 7, 7 } },
42 {0x14, {PCIE1, PCIE2, PCIE3, PCIE3 }, {5, 5, 7, 7 } },
43 {0x3C, {NONE, PCIE2, NONE, PCIE3 }, {0, 5, 0, 6 } },
44 {}
45};
46
47static struct serdes_config *serdes_cfg_tbl[] = {
48 serdes1_cfg_tbl,
49 serdes2_cfg_tbl,
50};
51
52int serdes_get_number(int serdes, int cfg)
53{
54 struct serdes_config *ptr;
55 int i, j, index, lnk;
56 int is_found, max_lane = SRDS_MAX_LANES;
57
58 if (serdes >= ARRAY_SIZE(serdes_cfg_tbl))
59 return 0;
60
61 ptr = serdes_cfg_tbl[serdes];
62
63 while (ptr->ip_protocol) {
64 is_found = 1;
65 for (i = 0, j = max_lane - 1; i < max_lane; i++, j--) {
66 lnk = cfg & (0xf << 4 * i);
67 lnk = lnk >> (4 * i);
68
69 index = (serdes == FSL_SRDS_1) ? j : i;
70
71 if (ptr->rcw_lanes[index] == lnk && is_found)
72 is_found = 1;
73 else
74 is_found = 0;
75 }
76
77 if (is_found)
78 return ptr->ip_protocol;
79 ptr++;
80 }
81
82 return 0;
83}
84
85enum srds_prtcl serdes_get_prtcl(int serdes, int cfg, int lane)
86{
87 struct serdes_config *ptr;
88
89 if (serdes >= ARRAY_SIZE(serdes_cfg_tbl))
90 return 0;
91
92 ptr = serdes_cfg_tbl[serdes];
93 while (ptr->ip_protocol) {
94 if (ptr->ip_protocol == cfg)
95 return ptr->lanes[lane];
96 ptr++;
97 }
98
99 return 0;
100}
101
102int is_serdes_prtcl_valid(int serdes, u32 prtcl)
103{
104 int i;
105 struct serdes_config *ptr;
106
107 if (serdes >= ARRAY_SIZE(serdes_cfg_tbl))
108 return 0;
109
110 ptr = serdes_cfg_tbl[serdes];
111 while (ptr->ip_protocol) {
112 if (ptr->ip_protocol == prtcl)
113 break;
114 ptr++;
115 }
116
117 if (!ptr->ip_protocol)
118 return 0;
119
120 for (i = 0; i < SRDS_MAX_LANES; i++) {
121 if (ptr->lanes[i] != NONE)
122 return 1;
123 }
124
125 return 0;
126}